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comparison libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/TIM/6Steps/stm32f10x_it.c @ 0:c59513fd84fb

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Initial commit of STM32 test code.
author Daniel O'Connor <darius@dons.net.au>
date Mon, 03 Oct 2011 21:19:15 +1030
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1 /**
2 ******************************************************************************
3 * @file TIM/6Steps/stm32f10x_it.c
4 * @author MCD Application Team
5 * @version V3.5.0
6 * @date 08-April-2011
7 * @brief Main Interrupt Service Routines.
8 * This file provides template for all exceptions handler and peripherals
9 * interrupt service routine.
10 ******************************************************************************
11 * @attention
12 *
13 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
14 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
15 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
16 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
17 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
18 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
19 *
20 * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
21 ******************************************************************************
22 */
23
24 /* Includes ------------------------------------------------------------------*/
25 #include "stm32f10x_it.h"
26
27 /** @addtogroup STM32F10x_StdPeriph_Examples
28 * @{
29 */
30
31 /** @addtogroup TIM_6Steps
32 * @{
33 */
34
35 /* Private typedef -----------------------------------------------------------*/
36 /* Private define ------------------------------------------------------------*/
37 /* Private macro -------------------------------------------------------------*/
38 /* Private variables ---------------------------------------------------------*/
39 __IO uint32_t step = 1;
40
41 /* Private function prototypes -----------------------------------------------*/
42 /* Private functions ---------------------------------------------------------*/
43
44 /******************************************************************************/
45 /* Cortex-M3 Processor Exceptions Handlers */
46 /******************************************************************************/
47
48 /**
49 * @brief This function handles NMI exception.
50 * @param None
51 * @retval None
52 */
53 void NMI_Handler(void)
54 {
55 }
56
57 /**
58 * @brief This function handles Hard Fault exception.
59 * @param None
60 * @retval None
61 */
62 void HardFault_Handler(void)
63 {
64 /* Go to infinite loop when Hard Fault exception occurs */
65 while (1)
66 {}
67 }
68
69 /**
70 * @brief This function handles Memory Manage exception.
71 * @param None
72 * @retval None
73 */
74 void MemManage_Handler(void)
75 {
76 /* Go to infinite loop when Memory Manage exception occurs */
77 while (1)
78 {}
79 }
80
81 /**
82 * @brief This function handles Bus Fault exception.
83 * @param None
84 * @retval None
85 */
86 void BusFault_Handler(void)
87 {
88 /* Go to infinite loop when Bus Fault exception occurs */
89 while (1)
90 {}
91 }
92
93 /**
94 * @brief This function handles Usage Fault exception.
95 * @param None
96 * @retval None
97 */
98 void UsageFault_Handler(void)
99 {
100 /* Go to infinite loop when Usage Fault exception occurs */
101 while (1)
102 {}
103 }
104
105 /**
106 * @brief This function handles Debug Monitor exception.
107 * @param None
108 * @retval None
109 */
110 void DebugMon_Handler(void)
111 {}
112
113 /**
114 * @brief This function handles SVCall exception.
115 * @param None
116 * @retval None
117 */
118 void SVC_Handler(void)
119 {}
120
121 /**
122 * @brief This function handles PendSV_Handler exception.
123 * @param None
124 * @retval None
125 */
126 void PendSV_Handler(void)
127 {}
128
129 /**
130 * @brief This function handles SysTick Handler.
131 * @param None
132 * @retval None
133 */
134 void SysTick_Handler(void)
135 {
136 /* Generate TIM1 COM event by software */
137 TIM_GenerateEvent(TIM1, TIM_EventSource_COM);
138 }
139
140 /******************************************************************************/
141 /* STM32F10x Peripherals Interrupt Handlers */
142 /******************************************************************************/
143
144 /**
145 * @brief This function handles TIM1 Trigger and commutation interrupts
146 * requests.
147 * @param None
148 * @retval None
149 */
150 #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL)
151 void TIM1_TRG_COM_TIM17_IRQHandler(void)
152 #else
153 void TIM1_TRG_COM_IRQHandler(void)
154 #endif
155 {
156 /* Clear TIM1 COM pending bit */
157 TIM_ClearITPendingBit(TIM1, TIM_IT_COM);
158
159 if (step == 1)
160 {
161 /* Next step: Step 2 Configuration ---------------------------- */
162 /* Channel3 configuration */
163 TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Disable);
164 TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Disable);
165
166 /* Channel1 configuration */
167 TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_OCMode_PWM1);
168 TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Enable);
169 TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Disable);
170
171 /* Channel2 configuration */
172 TIM_SelectOCxM(TIM1, TIM_Channel_2, TIM_OCMode_PWM1 );
173 TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Disable);
174 TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Enable);
175 step++;
176 }
177 else if (step == 2)
178 {
179 /* Next step: Step 3 Configuration ---------------------------- */
180 /* Channel2 configuration */
181 TIM_SelectOCxM(TIM1, TIM_Channel_2, TIM_OCMode_PWM1);
182 TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Disable);
183 TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Enable);
184
185 /* Channel3 configuration */
186 TIM_SelectOCxM(TIM1, TIM_Channel_3, TIM_OCMode_PWM1);
187 TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Enable);
188 TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Disable);
189
190 /* Channel1 configuration */
191 TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Disable);
192 TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Disable);
193 step++;
194 }
195 else if (step == 3)
196 {
197 /* Next step: Step 4 Configuration ---------------------------- */
198 /* Channel3 configuration */
199 TIM_SelectOCxM(TIM1, TIM_Channel_3, TIM_OCMode_PWM1);
200 TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Enable);
201 TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Disable);
202
203 /* Channel2 configuration */
204 TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Disable);
205 TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Disable);
206
207 /* Channel1 configuration */
208 TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_OCMode_PWM1);
209 TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Disable);
210 TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Enable);
211 step++;
212 }
213 else if (step == 4)
214 {
215 /* Next step: Step 5 Configuration ---------------------------- */
216 /* Channel3 configuration */
217 TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Disable);
218 TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Disable);
219
220 /* Channel1 configuration */
221 TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_OCMode_PWM1);
222 TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Disable);
223 TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Enable);
224
225 /* Channel2 configuration */
226 TIM_SelectOCxM(TIM1, TIM_Channel_2, TIM_OCMode_PWM1);
227 TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Enable);
228 TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Disable);
229 step++;
230 }
231 else if (step == 5)
232 {
233 /* Next step: Step 6 Configuration ---------------------------- */
234 /* Channel3 configuration */
235 TIM_SelectOCxM(TIM1, TIM_Channel_3, TIM_OCMode_PWM1);
236 TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Disable);
237 TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Enable);
238
239 /* Channel1 configuration */
240 TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Disable);
241 TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Disable);
242
243 /* Channel2 configuration */
244 TIM_SelectOCxM(TIM1, TIM_Channel_2, TIM_OCMode_PWM1);
245 TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Enable);
246 TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Disable);
247 step++;
248 }
249 else
250 {
251 /* Next step: Step 1 Configuration ---------------------------- */
252 /* Channel1 configuration */
253 TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_OCMode_PWM1);
254 TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Enable);
255 TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Disable);
256
257 /* Channel3 configuration */
258 TIM_SelectOCxM(TIM1, TIM_Channel_3, TIM_OCMode_PWM1);
259 TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Disable);
260 TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Enable);
261
262 /* Channel2 configuration */
263 TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Disable);
264 TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Disable);
265 step = 1;
266 }
267 }
268
269 /******************************************************************************/
270 /* STM32F10x Peripherals Interrupt Handlers */
271 /* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
272 /* available peripheral interrupt handler's name please refer to the startup */
273 /* file (startup_stm32f10x_xx.s). */
274 /******************************************************************************/
275
276 /**
277 * @brief This function handles PPP interrupt request.
278 * @param None
279 * @retval None
280 */
281 /*void PPP_IRQHandler(void)
282 {
283 }*/
284
285 /**
286 * @}
287 */
288
289 /**
290 * @}
291 */
292
293 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/