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comparison libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/SPI/FullDuplex_SoftNSS/readme.txt @ 0:c59513fd84fb
Initial commit of STM32 test code.
author | Daniel O'Connor <darius@dons.net.au> |
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date | Mon, 03 Oct 2011 21:19:15 +1030 |
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1 /** | |
2 @page SPI_FullDuplex_SoftNSS SPI Full Duplex Software NSS example | |
3 | |
4 @verbatim | |
5 ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* | |
6 * @file SPI/FullDuplex_SoftNSS/readme.txt | |
7 * @author MCD Application Team | |
8 * @version V3.5.0 | |
9 * @date 08-April-2011 | |
10 * @brief Description of the SPI Full Duplex Software NSS example. | |
11 ****************************************************************************** | |
12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS | |
13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE | |
14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY | |
15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING | |
16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE | |
17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. | |
18 ****************************************************************************** | |
19 @endverbatim | |
20 | |
21 @par Example Description | |
22 | |
23 This example provides a description of how to set a communication between SPIy and | |
24 SPIz in full-duplex mode and performs a transfer from Master to Slave and then | |
25 Slave to Master in the same application with software NSS management. | |
26 SPIy and SPIz can be SPI1 and SPI2 or SPI3 and SPI2, depending on the STMicroelectronics | |
27 EVAL board you are using. | |
28 | |
29 Both SPIs are configured with 8bit data frame and a 9Mbit/s communication speed. | |
30 (for Value line devices the speed is set at 6Mbit/s). | |
31 In the first phase, the master SPIy starts the SPIy_Buffer_Tx transfer while the | |
32 slave SPIz transmit SPIz_Buffer_Tx. Once the transfer is completed a comparison | |
33 is done and TransferStatus1 and TransferStatus2 gives the data transfer status for | |
34 each data transfer direction where it is PASSED if transmitted and received data | |
35 are the same otherwise it is FAILED. | |
36 | |
37 As the NSS pin is managed by software, this permit to SPIy to become slave and SPIz | |
38 to become master without hardware modification. | |
39 In the second step, the slave SPIy starts the SPIy_Buffer_Tx transfer while the | |
40 master SPIz transmit SPIz_Buffer_Tx. Once the transfer is completed a comparison | |
41 is done and TransferStatus3 and TransferStatus4 gives the data transfer status for | |
42 each data transfer direction where it is PASSED if transmitted and received data | |
43 are the same otherwise it is FAILED. | |
44 | |
45 | |
46 @par Directory contents | |
47 | |
48 - SPI/FullDuplex_SoftNSS/platform_config.h Evaluation board specific configuration file | |
49 - SPI/FullDuplex_SoftNSS/stm32f10x_conf.h Library Configuration file | |
50 - SPI/FullDuplex_SoftNSS/stm32f10x_it.c Interrupt handlers | |
51 - SPI/FullDuplex_SoftNSS/stm32f10x_it.h Interrupt handlers header file | |
52 - SPI/FullDuplex_SoftNSS/main.c Main program | |
53 - SPI/FullDuplex_SoftNSS/system_stm32f10x.c STM32F10x system source file | |
54 | |
55 @par Hardware and Software environment | |
56 | |
57 - This example runs on STM32F10x Connectivity line, High-Density, High-Density | |
58 Value line, Medium-Density, XL-Density, Medium-Density Value line, Low-Density | |
59 and Low-Density Value line Devices. | |
60 | |
61 - This example has been tested with STMicroelectronics STM32100E-EVAL (High-Density | |
62 Value line), STM32100B-EVAL (Medium-Density Value line), STM3210C-EVAL (Connectivity line), | |
63 STM3210E-EVAL (High-Density and XL-Density) and STM3210B-EVAL (Medium-Density) | |
64 evaluation boards and can be easily tailored to any other supported device | |
65 and development board. | |
66 To select the STMicroelectronics evaluation board used to run the example, | |
67 uncomment the corresponding line in SPI/FullDuplex_SoftNSS/platform_config.h file. | |
68 | |
69 - STM32100E-EVAL Set-up | |
70 - Connect SPI1 SCK pin (PA.05) to SPI2 SCK pin (PB.13) | |
71 - Connect SPI1 MISO pin (PA.06) to SPI2 MISO pin (PB.14) | |
72 - Connect SPI1 MOSI pin (PA.07) to SPI2 MOSI pin (PB.15) | |
73 | |
74 - STM32100B-EVAL Set-up | |
75 - Connect SPI1 SCK pin (PA.05) to SPI2 SCK pin (PB.13) | |
76 - Connect SPI1 MISO pin (PA.06) to SPI2 MISO pin (PB.14) | |
77 - Connect SPI1 MOSI pin (PA.07) to SPI2 MOSI pin (PB.15) | |
78 | |
79 - STM3210C-EVAL Set-up | |
80 - Connect SPI3 SCK pin (PC.10) to SPI2 SCK pin (PB.13) | |
81 - Connect SPI3 MISO pin (PC.11) to SPI2 MISO pin (PB.14) | |
82 - Connect SPI3 MOSI pin (PC.12) to SPI2 MOSI pin (PB.15) | |
83 @note In this case SPI3 pins are remapped by software. | |
84 | |
85 - STM3210E-EVAL Set-up | |
86 - Connect SPI1 SCK pin (PA.05) to SPI2 SCK pin (PB.13) | |
87 - Connect SPI1 MISO pin (PA.06) to SPI2 MISO pin (PB.14) | |
88 - Connect SPI1 MOSI pin (PA.07) to SPI2 MOSI pin (PB.15) | |
89 @note The jumper 14 (USB Disconnect) must be set in position 1<->2 in order | |
90 to not interfer with SPI2 MISO pin PB14. | |
91 | |
92 - STM3210B-EVAL Set-up | |
93 - Connect SPI1 SCK pin (PA.05) to SPI2 SCK pin (PB.13) | |
94 - Connect SPI1 MISO pin (PA.06) to SPI2 MISO pin (PB.14) | |
95 - Connect SPI1 MOSI pin (PA.07) to SPI2 MOSI pin (PB.15) | |
96 | |
97 @par How to use it ? | |
98 | |
99 In order to make the program work, you must do the following : | |
100 - Copy all source files from this example folder to the template folder under | |
101 Project\STM32F10x_StdPeriph_Template | |
102 - Open your preferred toolchain | |
103 - Rebuild all files and load your image into target memory | |
104 - Run the example | |
105 | |
106 @note | |
107 - Low-density Value line devices are STM32F100xx microcontrollers where the | |
108 Flash memory density ranges between 16 and 32 Kbytes. | |
109 - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx | |
110 microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. | |
111 - Medium-density Value line devices are STM32F100xx microcontrollers where | |
112 the Flash memory density ranges between 64 and 128 Kbytes. | |
113 - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx | |
114 microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes. | |
115 - High-density Value line devices are STM32F100xx microcontrollers where | |
116 the Flash memory density ranges between 256 and 512 Kbytes. | |
117 - High-density devices are STM32F101xx and STM32F103xx microcontrollers where | |
118 the Flash memory density ranges between 256 and 512 Kbytes. | |
119 - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where | |
120 the Flash memory density ranges between 512 and 1024 Kbytes. | |
121 - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. | |
122 | |
123 * <h3><center>© COPYRIGHT 2011 STMicroelectronics</center></h3> | |
124 */ |