comparison libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/RIDE/stm32f10x_flash_offset.ld @ 0:c59513fd84fb

Initial commit of STM32 test code.
author Daniel O'Connor <darius@dons.net.au>
date Mon, 03 Oct 2011 21:19:15 +1030
parents
children
comparison
equal deleted inserted replaced
-1:000000000000 0:c59513fd84fb
1 /*
2 Default linker script for STM32F10x_1024K_96K
3 Copyright RAISONANCE S.A.S. 2008
4 */
5
6 /* include the common STM32F10x sub-script */
7
8 /* Common part of the linker scripts for STM32 devices*/
9
10
11 /* default stack sizes.
12
13 These are used by the startup in order to allocate stacks for the different modes.
14 */
15
16 __Stack_Size = 1024 ;
17
18 PROVIDE ( _Stack_Size = __Stack_Size ) ;
19
20 __Stack_Init = _estack - __Stack_Size ;
21
22 /*"PROVIDE" allows to easily override these values from an object file or the commmand line.*/
23 PROVIDE ( _Stack_Init = __Stack_Init ) ;
24
25 /*
26 There will be a link error if there is not this amount of RAM free at the end.
27 */
28 _Minimum_Stack_Size = 0x100 ;
29
30
31 /* include the memory spaces definitions sub-script */
32 /*
33 Linker subscript for STM32F10x definitions with 1024K Flash and 96K RAM */
34
35 /* Memory Spaces Definitions */
36
37 MEMORY
38 {
39 RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K
40 FLASH (rx) : ORIGIN = 0x8003000, LENGTH = 1024K-0x3000
41 FLASHB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0
42 EXTMEMB0 (rx) : ORIGIN = 0x00000000, LENGTH = 0
43 EXTMEMB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0
44 EXTMEMB2 (rx) : ORIGIN = 0x00000000, LENGTH = 0
45 EXTMEMB3 (rx) : ORIGIN = 0x00000000, LENGTH = 0
46 }
47
48 /* higher address of the user mode stack */
49 _estack = 0x20018000;
50
51
52
53 /* include the sections management sub-script for FLASH mode */
54 /*
55 Common part of the linker scripts for STR71x devices in FLASH mode
56 (that is, the FLASH is seen at 0)
57 Copyright RAISONANCE 2005
58 You can use, modify and distribute thisfile freely, but without any waranty.
59 */
60
61
62
63 /* Sections Definitions */
64
65 SECTIONS
66 {
67 /* for Cortex devices, the beginning of the startup code is stored in the .isr_vector section, which goes to FLASH */
68 .isr_vector :
69 {
70 . = ALIGN(4);
71 KEEP(*(.isr_vector)) /* Startup code */
72 . = ALIGN(4);
73 } >FLASH
74
75 /* for some STRx devices, the beginning of the startup code is stored in the .flashtext section, which goes to FLASH */
76 .flashtext :
77 {
78 . = ALIGN(4);
79 *(.flashtext) /* Startup code */
80 . = ALIGN(4);
81 } >FLASH
82
83
84 /* the program code is stored in the .text section, which goes to Flash */
85 .text :
86 {
87 . = ALIGN(4);
88
89 *(.text) /* remaining code */
90 *(.text.*) /* remaining code */
91 *(.rodata) /* read-only data (constants) */
92 *(.rodata*)
93 *(.glue_7)
94 *(.glue_7t)
95
96 . = ALIGN(4);
97 _etext = .;
98 /* This is used by the startup in order to initialize the .data secion */
99 _sidata = _etext;
100 } >FLASH
101
102
103
104 /* This is the initialized data section
105 The program executes knowing that the data is in the RAM
106 but the loader puts the initial values in the FLASH (inidata).
107 It is one task of the startup to copy the initial values from FLASH to RAM. */
108 .data : AT ( _sidata )
109 {
110 . = ALIGN(4);
111 /* This is used by the startup in order to initialize the .data secion */
112 _sdata = . ;
113
114 *(.data)
115 *(.data.*)
116
117 . = ALIGN(4);
118 /* This is used by the startup in order to initialize the .data secion */
119 _edata = . ;
120 } >RAM
121
122
123
124 /* This is the uninitialized data section */
125 .bss :
126 {
127 . = ALIGN(4);
128 /* This is used by the startup in order to initialize the .bss secion */
129 _sbss = .;
130
131 *(.bss)
132 *(COMMON)
133
134 . = ALIGN(4);
135 /* This is used by the startup in order to initialize the .bss secion */
136 _ebss = . ;
137 } >RAM
138
139 PROVIDE ( end = _ebss );
140 PROVIDE ( _end = _ebss );
141
142 /* This is the user stack section
143 This is just to check that there is enough RAM left for the User mode stack
144 It should generate an error if it's full.
145 */
146 ._usrstack :
147 {
148 . = ALIGN(4);
149 _susrstack = . ;
150
151 . = . + _Minimum_Stack_Size ;
152
153 . = ALIGN(4);
154 _eusrstack = . ;
155 } >RAM
156
157
158
159 /* this is the FLASH Bank1 */
160 /* the C or assembly source must explicitly place the code or data there
161 using the "section" attribute */
162 .b1text :
163 {
164 *(.b1text) /* remaining code */
165 *(.b1rodata) /* read-only data (constants) */
166 *(.b1rodata*)
167 } >FLASHB1
168
169 /* this is the EXTMEM */
170 /* the C or assembly source must explicitly place the code or data there
171 using the "section" attribute */
172
173 /* EXTMEM Bank0 */
174 .eb0text :
175 {
176 *(.eb0text) /* remaining code */
177 *(.eb0rodata) /* read-only data (constants) */
178 *(.eb0rodata*)
179 } >EXTMEMB0
180
181 /* EXTMEM Bank1 */
182 .eb1text :
183 {
184 *(.eb1text) /* remaining code */
185 *(.eb1rodata) /* read-only data (constants) */
186 *(.eb1rodata*)
187 } >EXTMEMB1
188
189 /* EXTMEM Bank2 */
190 .eb2text :
191 {
192 *(.eb2text) /* remaining code */
193 *(.eb2rodata) /* read-only data (constants) */
194 *(.eb2rodata*)
195 } >EXTMEMB2
196
197 /* EXTMEM Bank0 */
198 .eb3text :
199 {
200 *(.eb3text) /* remaining code */
201 *(.eb3rodata) /* read-only data (constants) */
202 *(.eb3rodata*)
203 } >EXTMEMB3
204
205
206
207 /* after that it's only debugging information. */
208
209 /* remove the debugging information from the standard libraries */
210 DISCARD :
211 {
212 libc.a ( * )
213 libm.a ( * )
214 libgcc.a ( * )
215 }
216
217 /* Stabs debugging sections. */
218 .stab 0 : { *(.stab) }
219 .stabstr 0 : { *(.stabstr) }
220 .stab.excl 0 : { *(.stab.excl) }
221 .stab.exclstr 0 : { *(.stab.exclstr) }
222 .stab.index 0 : { *(.stab.index) }
223 .stab.indexstr 0 : { *(.stab.indexstr) }
224 .comment 0 : { *(.comment) }
225 /* DWARF debug sections.
226 Symbols in the DWARF debugging sections are relative to the beginning
227 of the section so we begin them at 0. */
228 /* DWARF 1 */
229 .debug 0 : { *(.debug) }
230 .line 0 : { *(.line) }
231 /* GNU DWARF 1 extensions */
232 .debug_srcinfo 0 : { *(.debug_srcinfo) }
233 .debug_sfnames 0 : { *(.debug_sfnames) }
234 /* DWARF 1.1 and DWARF 2 */
235 .debug_aranges 0 : { *(.debug_aranges) }
236 .debug_pubnames 0 : { *(.debug_pubnames) }
237 /* DWARF 2 */
238 .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
239 .debug_abbrev 0 : { *(.debug_abbrev) }
240 .debug_line 0 : { *(.debug_line) }
241 .debug_frame 0 : { *(.debug_frame) }
242 .debug_str 0 : { *(.debug_str) }
243 .debug_loc 0 : { *(.debug_loc) }
244 .debug_macinfo 0 : { *(.debug_macinfo) }
245 /* SGI/MIPS DWARF 2 extensions */
246 .debug_weaknames 0 : { *(.debug_weaknames) }
247 .debug_funcnames 0 : { *(.debug_funcnames) }
248 .debug_typenames 0 : { *(.debug_typenames) }
249 .debug_varnames 0 : { *(.debug_varnames) }
250 }