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comparison libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/Lib_DEBUG/RunTime_Check/stm32f10x_ip_dbg.c @ 0:c59513fd84fb

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Initial commit of STM32 test code.
author Daniel O'Connor <darius@dons.net.au>
date Mon, 03 Oct 2011 21:19:15 +1030
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-1:000000000000 0:c59513fd84fb
1 /**
2 ******************************************************************************
3 * @file Lib_DEBUG/RunTime_Check/stm32f10x_ip_dbg.c
4 * @author MCD Application Team
5 * @version V3.5.0
6 * @date 08-April-2011
7 * @brief This file provides all peripherals pointers initialization.
8 ******************************************************************************
9 * @attention
10 *
11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 *
18 * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
19 ******************************************************************************
20 */
21
22 /* Includes ------------------------------------------------------------------*/
23 #include "stm32f10x_ip_dbg.h"
24
25 /** @addtogroup STM32F10x_StdPeriph_Examples
26 * @{
27 */
28
29 /** @addtogroup Lib_DEBUG_RunTime_Check
30 * @{
31 */
32
33 /* Private typedef -----------------------------------------------------------*/
34 /* Private define ------------------------------------------------------------*/
35 /* Private macro -------------------------------------------------------------*/
36 /* Private variables ---------------------------------------------------------*/
37 TIM_TypeDef *TIM2_DBG;
38 TIM_TypeDef *TIM3_DBG;
39 TIM_TypeDef *TIM4_DBG;
40 TIM_TypeDef *TIM5_DBG;
41 TIM_TypeDef *TIM6_DBG;
42 TIM_TypeDef *TIM7_DBG;
43 RTC_TypeDef *RTC_DBG;
44 WWDG_TypeDef *WWDG_DBG;
45 IWDG_TypeDef *IWDG_DBG;
46 SPI_TypeDef *SPI2_DBG;
47 SPI_TypeDef *SPI3_DBG;
48 USART_TypeDef *USART2_DBG;
49 USART_TypeDef *USART3_DBG;
50 USART_TypeDef *UART4_DBG;
51 USART_TypeDef *UART5_DBG;
52 I2C_TypeDef *I2C1_DBG;
53 I2C_TypeDef *I2C2_DBG;
54 CAN_TypeDef *CAN1_DBG;
55 BKP_TypeDef *BKP_DBG;
56 PWR_TypeDef *PWR_DBG;
57 DAC_TypeDef *DAC_DBG;
58 CEC_TypeDef *CEC_DBG;
59 AFIO_TypeDef *AFIO_DBG;
60 EXTI_TypeDef *EXTI_DBG;
61 GPIO_TypeDef *GPIOA_DBG;
62 GPIO_TypeDef *GPIOB_DBG;
63 GPIO_TypeDef *GPIOC_DBG;
64 GPIO_TypeDef *GPIOD_DBG;
65 GPIO_TypeDef *GPIOE_DBG;
66 GPIO_TypeDef *GPIOF_DBG;
67 GPIO_TypeDef *GPIOG_DBG;
68 ADC_TypeDef *ADC1_DBG;
69 ADC_TypeDef *ADC2_DBG;
70 TIM_TypeDef *TIM1_DBG;
71 SPI_TypeDef *SPI1_DBG;
72 TIM_TypeDef *TIM8_DBG;
73 USART_TypeDef *USART1_DBG;
74 ADC_TypeDef *ADC3_DBG;
75 TIM_TypeDef *TIM15_DBG;
76 TIM_TypeDef *TIM16_DBG;
77 TIM_TypeDef *TIM17_DBG;
78 SDIO_TypeDef *SDIO_DBG;
79 DMA_TypeDef *DMA1_DBG;
80 DMA_TypeDef *DMA2_DBG;
81 DMA_Channel_TypeDef *DMA1_Channel1_DBG;
82 DMA_Channel_TypeDef *DMA1_Channel2_DBG;
83 DMA_Channel_TypeDef *DMA1_Channel3_DBG;
84 DMA_Channel_TypeDef *DMA1_Channel4_DBG;
85 DMA_Channel_TypeDef *DMA1_Channel5_DBG;
86 DMA_Channel_TypeDef *DMA1_Channel6_DBG;
87 DMA_Channel_TypeDef *DMA1_Channel7_DBG;
88 DMA_Channel_TypeDef *DMA2_Channel1_DBG;
89 DMA_Channel_TypeDef *DMA2_Channel2_DBG;
90 DMA_Channel_TypeDef *DMA2_Channel3_DBG;
91 DMA_Channel_TypeDef *DMA2_Channel4_DBG;
92 DMA_Channel_TypeDef *DMA2_Channel5_DBG;
93 RCC_TypeDef *RCC_DBG;
94 CRC_TypeDef *CRC_DBG;
95 FLASH_TypeDef *FLASH_DBG;
96 OB_TypeDef *OB_DBG;
97 FSMC_Bank1_TypeDef *FSMC_Bank1_DBG;
98 FSMC_Bank1E_TypeDef *FSMC_Bank1E_DBG;
99 FSMC_Bank2_TypeDef *FSMC_Bank2_DBG;
100 FSMC_Bank3_TypeDef *FSMC_Bank3_DBG;
101 FSMC_Bank4_TypeDef *FSMC_Bank4_DBG;
102 DBGMCU_TypeDef *DBGMCU_DBG;
103 SysTick_Type *SysTick_DBG;
104 NVIC_Type *NVIC_DBG;
105 SCB_Type *SCB_DBG;
106
107 /* Private function prototypes -----------------------------------------------*/
108 /* Private functions ---------------------------------------------------------*/
109
110 /**
111 * @brief This function initialize peripherals pointers.
112 * @param None
113 * @retval None
114 */
115 void debug(void)
116 {
117 /************************************* ADC ************************************/
118 ADC1_DBG = (ADC_TypeDef *) ADC1_BASE;
119
120 ADC2_DBG = (ADC_TypeDef *) ADC2_BASE;
121
122 ADC3_DBG = (ADC_TypeDef *) ADC3_BASE;
123
124 /************************************* BKP ************************************/
125 BKP_DBG = (BKP_TypeDef *) BKP_BASE;
126
127 /************************************* CAN ************************************/
128 CAN1_DBG = (CAN_TypeDef *) CAN1_BASE;
129
130 /************************************* CEC ************************************/
131 CEC_DBG = (CEC_TypeDef *) CEC_BASE;
132
133 /************************************* CRC ************************************/
134 CRC_DBG = (CRC_TypeDef *) CRC_BASE;
135
136 /************************************* DAC ************************************/
137 DAC_DBG = (DAC_TypeDef *) DAC_BASE;
138
139 /************************************* DBGMCU**********************************/
140 DBGMCU_DBG = (DBGMCU_TypeDef *) DBGMCU_BASE;
141
142
143 /************************************* DMA ************************************/
144 DMA1_DBG = (DMA_TypeDef *) DMA1_BASE;
145 DMA2_DBG = (DMA_TypeDef *) DMA2_BASE;
146
147 DMA1_Channel1_DBG = (DMA_Channel_TypeDef *) DMA1_Channel1_BASE;
148
149 DMA1_Channel2_DBG = (DMA_Channel_TypeDef *) DMA1_Channel2_BASE;
150
151 DMA1_Channel3_DBG = (DMA_Channel_TypeDef *) DMA1_Channel3_BASE;
152
153 DMA1_Channel4_DBG = (DMA_Channel_TypeDef *) DMA1_Channel4_BASE;
154
155 DMA1_Channel5_DBG = (DMA_Channel_TypeDef *) DMA1_Channel5_BASE;
156
157 DMA1_Channel6_DBG = (DMA_Channel_TypeDef *) DMA1_Channel6_BASE;
158
159 DMA1_Channel7_DBG = (DMA_Channel_TypeDef *) DMA1_Channel7_BASE;
160
161 DMA2_Channel1_DBG = (DMA_Channel_TypeDef *) DMA2_Channel1_BASE;
162
163 DMA2_Channel2_DBG = (DMA_Channel_TypeDef *) DMA2_Channel2_BASE;
164
165 DMA2_Channel3_DBG = (DMA_Channel_TypeDef *) DMA2_Channel3_BASE;
166
167 DMA2_Channel4_DBG = (DMA_Channel_TypeDef *) DMA2_Channel4_BASE;
168
169 DMA2_Channel5_DBG = (DMA_Channel_TypeDef *) DMA2_Channel5_BASE;
170
171 /************************************* EXTI ***********************************/
172 EXTI_DBG = (EXTI_TypeDef *) EXTI_BASE;
173
174 /************************************* FLASH and Option Bytes *****************/
175 FLASH_DBG = (FLASH_TypeDef *) FLASH_R_BASE;
176 OB_DBG = (OB_TypeDef *) OB_BASE;
177
178 /************************************* FSMC ***********************************/
179 FSMC_Bank1_DBG = (FSMC_Bank1_TypeDef *) FSMC_Bank1_R_BASE;
180 FSMC_Bank1E_DBG = (FSMC_Bank1E_TypeDef *) FSMC_Bank1E_R_BASE;
181 FSMC_Bank2_DBG = (FSMC_Bank2_TypeDef *) FSMC_Bank2_R_BASE;
182 FSMC_Bank3_DBG = (FSMC_Bank3_TypeDef *) FSMC_Bank3_R_BASE;
183 FSMC_Bank4_DBG = (FSMC_Bank4_TypeDef *) FSMC_Bank4_R_BASE;
184
185 /************************************* GPIO ***********************************/
186 GPIOA_DBG = (GPIO_TypeDef *) GPIOA_BASE;
187
188 GPIOB_DBG = (GPIO_TypeDef *) GPIOB_BASE;
189
190 GPIOC_DBG = (GPIO_TypeDef *) GPIOC_BASE;
191
192 GPIOD_DBG = (GPIO_TypeDef *) GPIOD_BASE;
193
194 GPIOE_DBG = (GPIO_TypeDef *) GPIOE_BASE;
195
196 GPIOF_DBG = (GPIO_TypeDef *) GPIOF_BASE;
197
198 GPIOG_DBG = (GPIO_TypeDef *) GPIOG_BASE;
199
200 AFIO_DBG = (AFIO_TypeDef *) AFIO_BASE;
201
202 /************************************* I2C ************************************/
203 I2C1_DBG = (I2C_TypeDef *) I2C1_BASE;
204
205 I2C2_DBG = (I2C_TypeDef *) I2C2_BASE;
206
207 /************************************* IWDG ***********************************/
208 IWDG_DBG = (IWDG_TypeDef *) IWDG_BASE;
209
210 /************************************* NVIC ***********************************/
211 NVIC_DBG = (NVIC_Type *) NVIC_BASE;
212 SCB_DBG = (SCB_Type *) SCB_BASE;
213
214 /************************************* PWR ************************************/
215 PWR_DBG = (PWR_TypeDef *) PWR_BASE;
216
217 /************************************* RCC ************************************/
218 RCC_DBG = (RCC_TypeDef *) RCC_BASE;
219
220 /************************************* RTC ************************************/
221 RTC_DBG = (RTC_TypeDef *) RTC_BASE;
222
223 /************************************* SDIO ***********************************/
224 SDIO_DBG = (SDIO_TypeDef *) SDIO_BASE;
225
226 /************************************* SPI ************************************/
227 SPI1_DBG = (SPI_TypeDef *) SPI1_BASE;
228
229 SPI2_DBG = (SPI_TypeDef *) SPI2_BASE;
230
231 SPI3_DBG = (SPI_TypeDef *) SPI3_BASE;
232
233 /************************************* SysTick ********************************/
234 SysTick_DBG = (SysTick_Type *) SysTick_BASE;
235
236 /************************************* TIM ************************************/
237 TIM1_DBG = (TIM_TypeDef *) TIM1_BASE;
238
239 TIM2_DBG = (TIM_TypeDef *) TIM2_BASE;
240
241 TIM3_DBG = (TIM_TypeDef *) TIM3_BASE;
242
243 TIM4_DBG = (TIM_TypeDef *) TIM4_BASE;
244
245 TIM5_DBG = (TIM_TypeDef *) TIM5_BASE;
246
247 TIM6_DBG = (TIM_TypeDef *) TIM6_BASE;
248
249 TIM7_DBG = (TIM_TypeDef *) TIM7_BASE;
250
251 TIM8_DBG = (TIM_TypeDef *) TIM8_BASE;
252
253 TIM15_DBG = (TIM_TypeDef *) TIM15_BASE;
254
255 TIM16_DBG = (TIM_TypeDef *) TIM16_BASE;
256
257 TIM17_DBG = (TIM_TypeDef *) TIM17_BASE;
258
259 /************************************* USART **********************************/
260 USART1_DBG = (USART_TypeDef *) USART1_BASE;
261
262 USART2_DBG = (USART_TypeDef *) USART2_BASE;
263
264 USART3_DBG = (USART_TypeDef *) USART3_BASE;
265
266 UART4_DBG = (USART_TypeDef *) UART4_BASE;
267
268 UART5_DBG = (USART_TypeDef *) UART5_BASE;
269
270 /************************************* WWDG ***********************************/
271 WWDG_DBG = (WWDG_TypeDef *) WWDG_BASE;
272 }
273
274 /**
275 * @}
276 */
277
278 /**
279 * @}
280 */
281
282 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/