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comparison libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/I2S/Interrupt/main.c @ 0:c59513fd84fb
Initial commit of STM32 test code.
author | Daniel O'Connor <darius@dons.net.au> |
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date | Mon, 03 Oct 2011 21:19:15 +1030 |
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-1:000000000000 | 0:c59513fd84fb |
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1 /** | |
2 ****************************************************************************** | |
3 * @file I2S/Interrupt/main.c | |
4 * @author MCD Application Team | |
5 * @version V3.5.0 | |
6 * @date 08-April-2011 | |
7 * @brief Main program body | |
8 ****************************************************************************** | |
9 * @attention | |
10 * | |
11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS | |
12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE | |
13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY | |
14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING | |
15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE | |
16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. | |
17 * | |
18 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> | |
19 ****************************************************************************** | |
20 */ | |
21 | |
22 /* Includes ------------------------------------------------------------------*/ | |
23 #include "stm32f10x.h" | |
24 | |
25 /** @addtogroup STM32F10x_StdPeriph_Examples | |
26 * @{ | |
27 */ | |
28 | |
29 /** @addtogroup I2S_Interrupt | |
30 * @{ | |
31 */ | |
32 | |
33 /* Private typedef -----------------------------------------------------------*/ | |
34 typedef enum {FAILED = 0, PASSED = !FAILED} TestStatus; | |
35 | |
36 /* Private define ------------------------------------------------------------*/ | |
37 /* Private macro -------------------------------------------------------------*/ | |
38 /* Private variables ---------------------------------------------------------*/ | |
39 I2S_InitTypeDef I2S_InitStructure; | |
40 const uint16_t I2S3_Buffer_Tx[32] = {0x0102, 0x0304, 0x0506, 0x0708, 0x090A, 0x0B0C, | |
41 0x0D0E, 0x0F10, 0x1112, 0x1314, 0x1516, 0x1718, | |
42 0x191A, 0x1B1C, 0x1D1E, 0x1F20, 0x2122, 0x2324, | |
43 0x2526, 0x2728, 0x292A, 0x2B2C, 0x2D2E, 0x2F30, | |
44 0x3132, 0x3334, 0x3536, 0x3738, 0x393A, 0x3B3C, | |
45 0x3D3E, 0x3F40}; | |
46 | |
47 uint16_t I2S2_Buffer_Rx[32]; | |
48 __IO uint32_t TxIdx = 0, RxIdx = 0; | |
49 TestStatus TransferStatus1 = FAILED, TransferStatus2 = FAILED; | |
50 ErrorStatus HSEStartUpStatus; | |
51 | |
52 /* Private function prototypes -----------------------------------------------*/ | |
53 void RCC_Configuration(void); | |
54 void GPIO_Configuration(void); | |
55 void NVIC_Configuration(void); | |
56 TestStatus Buffercmp(uint16_t* pBuffer1, uint16_t* pBuffer2, uint16_t BufferLength); | |
57 TestStatus Buffercmp24bits(uint16_t* pBuffer1, uint16_t* pBuffer2, uint16_t BufferLength); | |
58 | |
59 /* Private functions ---------------------------------------------------------*/ | |
60 | |
61 /** | |
62 * @brief Main program | |
63 * @param None | |
64 * @retval None | |
65 */ | |
66 int main(void) | |
67 { | |
68 /*!< At this stage the microcontroller clock setting is already configured, | |
69 this is done through SystemInit() function which is called from startup | |
70 file (startup_stm32f10x_xx.s) before to branch to application main. | |
71 To reconfigure the default setting of SystemInit() function, refer to | |
72 system_stm32f10x.c file | |
73 */ | |
74 | |
75 /* System clocks configuration ---------------------------------------------*/ | |
76 RCC_Configuration(); | |
77 | |
78 /* NVIC configuration ------------------------------------------------------*/ | |
79 NVIC_Configuration(); | |
80 | |
81 /* GPIO configuration ------------------------------------------------------*/ | |
82 GPIO_Configuration(); | |
83 | |
84 SPI_I2S_DeInit(SPI3); | |
85 SPI_I2S_DeInit(SPI2); | |
86 | |
87 /* I2S peripheral configuration */ | |
88 I2S_InitStructure.I2S_Standard = I2S_Standard_Phillips; | |
89 I2S_InitStructure.I2S_DataFormat = I2S_DataFormat_16bextended; | |
90 I2S_InitStructure.I2S_MCLKOutput = I2S_MCLKOutput_Disable; | |
91 I2S_InitStructure.I2S_AudioFreq = I2S_AudioFreq_48k; | |
92 I2S_InitStructure.I2S_CPOL = I2S_CPOL_Low; | |
93 | |
94 /* I2S3 Master Transmitter to I2S2 Slave Receiver communication -----------*/ | |
95 /* I2S3 configuration */ | |
96 I2S_InitStructure.I2S_Mode = I2S_Mode_MasterTx; | |
97 I2S_Init(SPI3, &I2S_InitStructure); | |
98 | |
99 /* I2S2 configuration */ | |
100 I2S_InitStructure.I2S_Mode = I2S_Mode_SlaveRx; | |
101 I2S_Init(SPI2, &I2S_InitStructure); | |
102 | |
103 /* Enable the I2S3 TxE interrupt */ | |
104 SPI_I2S_ITConfig(SPI3, SPI_I2S_IT_TXE, ENABLE); | |
105 | |
106 /* Enable the I2S2 RxNE interrupt */ | |
107 SPI_I2S_ITConfig(SPI2, SPI_I2S_IT_RXNE, ENABLE); | |
108 | |
109 /* Enable the I2S2 */ | |
110 I2S_Cmd(SPI2, ENABLE); | |
111 | |
112 /* Enable the I2S3 */ | |
113 I2S_Cmd(SPI3, ENABLE); | |
114 | |
115 /* Wait the end of communication */ | |
116 while (RxIdx < 32) | |
117 {} | |
118 | |
119 TransferStatus1 = Buffercmp(I2S2_Buffer_Rx, (uint16_t*)I2S3_Buffer_Tx, 32); | |
120 /* TransferStatus1 = PASSED, if the data transmitted from I2S3 and received by | |
121 I2S2 are the same | |
122 TransferStatus1 = FAILED, if the data transmitted from I2S3 and received by | |
123 I2S2 are different */ | |
124 | |
125 /* Reinitialize the buffers */ | |
126 for (RxIdx = 0; RxIdx < 32; RxIdx++) | |
127 { | |
128 I2S2_Buffer_Rx[RxIdx] = 0; | |
129 } | |
130 TxIdx = 0; | |
131 RxIdx = 0; | |
132 | |
133 SPI_I2S_DeInit(SPI3); | |
134 SPI_I2S_DeInit(SPI2); | |
135 | |
136 /* I2S peripheral configuration */ | |
137 I2S_InitStructure.I2S_Standard = I2S_Standard_Phillips; | |
138 I2S_InitStructure.I2S_DataFormat = I2S_DataFormat_24b; | |
139 I2S_InitStructure.I2S_MCLKOutput = I2S_MCLKOutput_Disable; | |
140 I2S_InitStructure.I2S_AudioFreq = I2S_AudioFreq_16k; | |
141 I2S_InitStructure.I2S_CPOL = I2S_CPOL_Low; | |
142 | |
143 /* I2S3 Master Transmitter to I2S2 Slave Receiver communication -----------*/ | |
144 /* I2S3 configuration */ | |
145 I2S_InitStructure.I2S_Mode = I2S_Mode_MasterTx; | |
146 I2S_Init(SPI3, &I2S_InitStructure); | |
147 | |
148 /* I2S2 configuration */ | |
149 I2S_InitStructure.I2S_Mode = I2S_Mode_SlaveRx; | |
150 I2S_Init(SPI2, &I2S_InitStructure); | |
151 | |
152 /* Enable the I2S3 TxE interrupt */ | |
153 SPI_I2S_ITConfig(SPI3, SPI_I2S_IT_TXE, ENABLE); | |
154 | |
155 /* Enable the I2S2 RxNE interrupt */ | |
156 SPI_I2S_ITConfig(SPI2, SPI_I2S_IT_RXNE, ENABLE); | |
157 | |
158 /* Enable the I2S2 */ | |
159 I2S_Cmd(SPI2, ENABLE); | |
160 | |
161 /* Enable the I2S3 */ | |
162 I2S_Cmd(SPI3, ENABLE); | |
163 | |
164 /* Wait the end of communication */ | |
165 while (RxIdx < 32) | |
166 { | |
167 } | |
168 | |
169 TransferStatus2 = Buffercmp24bits(I2S2_Buffer_Rx, (uint16_t*)I2S3_Buffer_Tx, 32); | |
170 /* TransferStatus2 = PASSED, if the data transmitted from I2S3 and received by | |
171 I2S2 are the same | |
172 TransferStatus2 = FAILED, if the data transmitted from I2S3 and received by | |
173 I2S2 are different */ | |
174 | |
175 while (1) | |
176 { | |
177 } | |
178 } | |
179 | |
180 /** | |
181 * @brief Configures the different system clocks. | |
182 * @param None | |
183 * @retval None | |
184 */ | |
185 void RCC_Configuration(void) | |
186 { | |
187 /* RCC system reset(for debug purpose) */ | |
188 RCC_DeInit(); | |
189 | |
190 /* Enable HSE */ | |
191 RCC_HSEConfig(RCC_HSE_ON); | |
192 | |
193 /* Wait till HSE is ready */ | |
194 HSEStartUpStatus = RCC_WaitForHSEStartUp(); | |
195 | |
196 if(HSEStartUpStatus == SUCCESS) | |
197 { | |
198 /* Enable Prefetch Buffer */ | |
199 FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); | |
200 | |
201 /* Flash 2 wait state */ | |
202 FLASH_SetLatency(FLASH_Latency_2); | |
203 | |
204 /* HCLK = SYSCLK */ | |
205 RCC_HCLKConfig(RCC_SYSCLK_Div1); | |
206 | |
207 /* PCLK2 = HCLK */ | |
208 RCC_PCLK2Config(RCC_HCLK_Div1); | |
209 | |
210 /* PCLK1 = HCLK/2 */ | |
211 RCC_PCLK1Config(RCC_HCLK_Div2); | |
212 | |
213 /* ADCCLK = PCLK2/4 */ | |
214 RCC_ADCCLKConfig(RCC_PCLK2_Div4); | |
215 | |
216 #ifndef STM32F10X_CL | |
217 /* PLLCLK = 8MHz * 9 = 72 MHz */ | |
218 RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); | |
219 | |
220 #else | |
221 /* Configure PLLs *********************************************************/ | |
222 /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ | |
223 RCC_PREDIV2Config(RCC_PREDIV2_Div5); | |
224 RCC_PLL2Config(RCC_PLL2Mul_8); | |
225 | |
226 /* Enable PLL2 */ | |
227 RCC_PLL2Cmd(ENABLE); | |
228 | |
229 /* Wait till PLL2 is ready */ | |
230 while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET) | |
231 {} | |
232 | |
233 /* PLL configuration: PLLCLK = (PLL2 / 5) * 9 = 72 MHz */ | |
234 RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div5); | |
235 RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_9); | |
236 | |
237 /* PLL3 configuration: PLL3CLK = (HSE / 5) * 11 => PLL3_VCO = 110 MHz */ | |
238 RCC_PLL3Config(RCC_PLL3Mul_11); | |
239 /* Enable PLL3 */ | |
240 RCC_PLL3Cmd(ENABLE); | |
241 /* Wait till PLL3 is ready */ | |
242 while (RCC_GetFlagStatus(RCC_FLAG_PLL3RDY) == RESET) | |
243 {} | |
244 | |
245 /* Configure I2S clock source: On Connectivity Line Devices, the I2S can be | |
246 clocked by PLL3 VCO instead of SYS_CLK in order to guarantee higher | |
247 precision */ | |
248 RCC_I2S3CLKConfig(RCC_I2S3CLKSource_PLL3_VCO); | |
249 RCC_I2S2CLKConfig(RCC_I2S2CLKSource_PLL3_VCO); | |
250 #endif | |
251 | |
252 /* Enable PLL */ | |
253 RCC_PLLCmd(ENABLE); | |
254 | |
255 /* Wait till PLL is ready */ | |
256 while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) | |
257 { | |
258 } | |
259 | |
260 /* Select PLL as system clock source */ | |
261 RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); | |
262 | |
263 /* Wait till PLL is used as system clock source */ | |
264 while(RCC_GetSYSCLKSource() != 0x08) | |
265 { | |
266 } | |
267 } | |
268 | |
269 /* Enable peripheral clocks ------------------------------------------------*/ | |
270 /* GPIOA, GPIOB and AFIO clocks enable */ | |
271 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | | |
272 RCC_APB2Periph_AFIO, ENABLE); | |
273 | |
274 #ifdef USE_STM3210C_EVAL | |
275 /* GPIOC Clock enable (for the SPI3 remapped pins) */ | |
276 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC , ENABLE); | |
277 #endif /* USE_STM3210C_EVAL */ | |
278 | |
279 /* SPI3 and SPI2 clocks enable */ | |
280 RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI3 | RCC_APB1Periph_SPI2, ENABLE); | |
281 } | |
282 | |
283 /** | |
284 * @brief Configures the different GPIO ports. | |
285 * @param None | |
286 * @retval None | |
287 */ | |
288 void GPIO_Configuration(void) | |
289 { | |
290 GPIO_InitTypeDef GPIO_InitStructure; | |
291 | |
292 #ifdef USE_STM3210E_EVAL | |
293 /* Disable the JTAG interface and enable the SWJ interface | |
294 This operation is not necessary for Connectivity Line devices since | |
295 SPI3 I/Os can be remapped on other GPIO pins */ | |
296 GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE); | |
297 #endif /* USE_STM3210E_EVAL */ | |
298 | |
299 /* Configure SPI2 pins: CK, WS and SD ---------------------------------*/ | |
300 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_15; | |
301 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; | |
302 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; | |
303 GPIO_Init(GPIOB, &GPIO_InitStructure); | |
304 | |
305 #ifdef USE_STM3210C_EVAL | |
306 | |
307 /* Remap SPI3 on PC10-PC11-PC12-PA4 GPIO pins ------------------------*/ | |
308 GPIO_PinRemapConfig(GPIO_Remap_SPI3, ENABLE); | |
309 | |
310 /* Configure SPI3 pins: CK and SD ------------------------------------*/ | |
311 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_12; | |
312 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; | |
313 GPIO_Init(GPIOC, &GPIO_InitStructure); | |
314 | |
315 /* Configure SPI3 pins: WS -------------------------------------------*/ | |
316 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4; | |
317 GPIO_Init(GPIOA, &GPIO_InitStructure); | |
318 | |
319 #elif defined (USE_STM3210E_EVAL) | |
320 | |
321 /* Configure SPI3 pins: CK and SD ------------------------------------*/ | |
322 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3 | GPIO_Pin_5; | |
323 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; | |
324 GPIO_Init(GPIOB, &GPIO_InitStructure); | |
325 | |
326 /* Configure SPI3 pins: WS -------------------------------------------*/ | |
327 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15; | |
328 GPIO_Init(GPIOA, &GPIO_InitStructure); | |
329 | |
330 #endif /* USE_STM3210C_EVAL */ | |
331 } | |
332 | |
333 /** | |
334 * @brief Configure the nested vectored interrupt controller. | |
335 * @param None | |
336 * @retval None | |
337 */ | |
338 void NVIC_Configuration(void) | |
339 { | |
340 NVIC_InitTypeDef NVIC_InitStructure; | |
341 | |
342 NVIC_PriorityGroupConfig(NVIC_PriorityGroup_0); | |
343 | |
344 /* SPI3 IRQ Channel configuration */ | |
345 NVIC_InitStructure.NVIC_IRQChannel = SPI3_IRQn; | |
346 NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; | |
347 NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; | |
348 NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; | |
349 NVIC_Init(&NVIC_InitStructure); | |
350 | |
351 /* SPI2 IRQ channel configuration */ | |
352 NVIC_InitStructure.NVIC_IRQChannel = SPI2_IRQn; | |
353 NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; | |
354 NVIC_Init(&NVIC_InitStructure); | |
355 } | |
356 | |
357 /** | |
358 * @brief Compares two buffers. | |
359 * @param pBuffer1, pBuffer2: buffers to be compared. | |
360 * @param BufferLength: buffer's length | |
361 * @retval PASSED: pBuffer1 identical to pBuffer2 | |
362 * FAILED: pBuffer1 differs from pBuffer2 | |
363 */ | |
364 TestStatus Buffercmp(uint16_t* pBuffer1, uint16_t* pBuffer2, uint16_t BufferLength) | |
365 { | |
366 while (BufferLength--) | |
367 { | |
368 if (*pBuffer1 != *pBuffer2) | |
369 { | |
370 return FAILED; | |
371 } | |
372 | |
373 pBuffer1++; | |
374 pBuffer2++; | |
375 } | |
376 | |
377 return PASSED; | |
378 } | |
379 | |
380 /** | |
381 * @brief Compares two buffers in 24 bits data format. | |
382 * @param pBuffer1, pBuffer2: buffers to be compared. | |
383 * @param BufferLength: buffer's length | |
384 * @retval PASSED: pBuffer1 identical to pBuffer2 | |
385 * FAILED: pBuffer1 differs from pBuffer2 | |
386 */ | |
387 TestStatus Buffercmp24bits(uint16_t* pBuffer1, uint16_t* pBuffer2, uint16_t BufferLength) | |
388 { | |
389 while (BufferLength--) | |
390 { | |
391 if (*pBuffer1 != *pBuffer2) | |
392 { | |
393 if (*pBuffer1 != (*pBuffer2 & 0xFF00)) | |
394 { | |
395 return FAILED; | |
396 } | |
397 } | |
398 | |
399 pBuffer1++; | |
400 pBuffer2++; | |
401 } | |
402 | |
403 return PASSED; | |
404 } | |
405 | |
406 #ifdef USE_FULL_ASSERT | |
407 | |
408 /** | |
409 * @brief Reports the name of the source file and the source line number | |
410 * where the assert_param error has occurred. | |
411 * @param file: pointer to the source file name | |
412 * @param line: assert_param error line source number | |
413 * @retval None | |
414 */ | |
415 void assert_failed(uint8_t* file, uint32_t line) | |
416 { | |
417 /* User can add his own implementation to report the file name and line number, | |
418 ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ | |
419 | |
420 /* Infinite loop */ | |
421 while (1) | |
422 {} | |
423 } | |
424 | |
425 #endif | |
426 | |
427 /** | |
428 * @} | |
429 */ | |
430 | |
431 /** | |
432 * @} | |
433 */ | |
434 | |
435 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |