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Initial commit of STM32 test code.
author Daniel O'Connor <darius@dons.net.au>
date Mon, 03 Oct 2011 21:19:15 +1030
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1 /**
2 @page GPIO_IOToggle GPIO IO Toggle example
3
4 @verbatim
5 ******************** (C) COPYRIGHT 2011 STMicroelectronics *******************
6 * @file GPIO/IOToggle/readme.txt
7 * @author MCD Application Team
8 * @version V3.5.0
9 * @date 08-April-2011
10 * @brief Description of the GPIO IO Toggle example.
11 ******************************************************************************
12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 ******************************************************************************
19 @endverbatim
20
21 @par Example Description
22
23 GPIO ports are connected on APB2 bus, using BSRRH and BSRRL registers 2 cycles
24 are required to set a pin and another cycle to reset it. So GPIO pins can toggle
25 at AHB clock divided by 4.
26
27 This example describes how to use BSRR and BRR (Port Bit Set/Reset Register
28 and Port Bit Reset Register) for maximum IO toggling.
29
30 PD0 and PD2 (configured in output pushpull mode) toggles in a forever loop:
31 - Set PD0 and PD2 by setting corresponding bits in BSRR register
32 - Reset PD0 and PD2 by setting corresponding bits in BRR register
33
34 In this example, HCLK is configured at 72 MHz so PD0 and PD2 toggles at 18MHz.
35 To achieve the maximum IO toggling frequency, you have to configure your compiler
36 options for high speed optimization.
37
38 @par Directory contents
39
40 - GPIO/IOToggle/stm32f10x_conf.h Library Configuration file
41 - GPIO/IOToggle/stm32f10x_it.c Interrupt handlers
42 - GPIO/IOToggle/stm32f10x_it.h Header for stm32f10x_it.c
43 - GPIO/IOToggle/main.c Main program
44 - GPIO/IOToggle/system_stm32f10x.c STM32F10x system source file
45
46 @par Hardware and Software environment
47
48 - This example runs on STM32F10x Connectivity line, High-Density, High-Density
49 Value line, Medium-Density, XL-Density, Medium-Density Value line, Low-Density
50 and Low-Density Value line Devices.
51
52 - This example has been tested with STMicroelectronics STM32100E-EVAL (High-Density
53 Value line), STM32100B-EVAL (Medium-Density Value line), STM3210C-EVAL
54 (Connectivity line), STM3210E-EVAL (High-Density and XL-Density) and
55 STM3210B-EVAL (Medium-Density) evaluation boards and can be easily tailored
56 to any other supported device and development board.
57 To select the STMicroelectronics evaluation board used to run the example,
58 uncomment the corresponding line in stm32_eval.h file (under Utilities\STM32_EVAL)
59
60 @par How to use it ?
61
62 In order to make the program work, you must do the following :
63 - Copy all source files from this example folder to the template folder under
64 Project\STM32F10x_StdPeriph_Template
65 - Open your preferred toolchain
66 - Rebuild all files and load your image into target memory
67 - Run the example
68
69 @note
70 - Low-density Value line devices are STM32F100xx microcontrollers where the
71 Flash memory density ranges between 16 and 32 Kbytes.
72 - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx
73 microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
74 - Medium-density Value line devices are STM32F100xx microcontrollers where
75 the Flash memory density ranges between 64 and 128 Kbytes.
76 - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx
77 microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
78 - High-density Value line devices are STM32F100xx microcontrollers where
79 the Flash memory density ranges between 256 and 512 Kbytes.
80 - High-density devices are STM32F101xx and STM32F103xx microcontrollers where
81 the Flash memory density ranges between 256 and 512 Kbytes.
82 - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where
83 the Flash memory density ranges between 512 and 1024 Kbytes.
84 - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.
85
86 * <h3><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h3>
87 */