Mercurial > ~darius > hgwebdir.cgi > stm32temp
comparison libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FSMC/SRAM_DataMemory/EWARM/startup_stm32f10x_hd_vl.s @ 0:c59513fd84fb
Initial commit of STM32 test code.
author | Daniel O'Connor <darius@dons.net.au> |
---|---|
date | Mon, 03 Oct 2011 21:19:15 +1030 |
parents | |
children |
comparison
equal
deleted
inserted
replaced
-1:000000000000 | 0:c59513fd84fb |
---|---|
1 ;/******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** | |
2 ;* File Name : startup_stm32f10x_hd_vl.s | |
3 ;* Author : MCD Application Team | |
4 ;* Version : V3.5.0 | |
5 ;* Date : 08-April-2011 | |
6 ;* Description : STM32F10x High Density Value Line Devices vector table | |
7 ;* for EWARM toolchain. | |
8 ;* This module performs: | |
9 ;* - Set the initial SP | |
10 ;* - Configure the clock system and the external SRAM | |
11 ;* mounted on STM32100E-EVAL board to be used as data | |
12 ;* memory (optional, to be enabled by user) | |
13 ;* - Set the initial PC == __iar_program_start, | |
14 ;* - Set the vector table entries with the exceptions ISR | |
15 ;* address. | |
16 ;* After Reset the Cortex-M3 processor is in Thread mode, | |
17 ;* priority is Privileged, and the Stack is set to Main. | |
18 ;******************************************************************************** | |
19 ;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS | |
20 ;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. | |
21 ;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, | |
22 ;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE | |
23 ;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING | |
24 ;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. | |
25 ;*******************************************************************************/ | |
26 ; | |
27 ; | |
28 ; The modules in this file are included in the libraries, and may be replaced | |
29 ; by any user-defined modules that define the PUBLIC symbol _program_start or | |
30 ; a user defined start symbol. | |
31 ; To override the cstartup defined in the library, simply add your modified | |
32 ; version to the workbench project. | |
33 ; | |
34 ; The vector table is normally located at address 0. | |
35 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. | |
36 ; The name "__vector_table" has special meaning for C-SPY: | |
37 ; it is where the SP start value is found, and the NVIC vector | |
38 ; table register (VTOR) is initialized to this address if != 0. | |
39 ; | |
40 ; Cortex-M version | |
41 ; | |
42 __initial_spTop EQU 0x20000400 ; stack used for SystemInit & SystemInit_ExtMemCtl | |
43 MODULE ?cstartup | |
44 | |
45 ;; Forward declaration of sections. | |
46 SECTION CSTACK:DATA:NOROOT(3) | |
47 | |
48 SECTION .intvec:CODE:NOROOT(2) | |
49 | |
50 EXTERN __iar_program_start | |
51 EXTERN SystemInit | |
52 PUBLIC __vector_table | |
53 | |
54 DATA | |
55 __vector_table | |
56 DCD __initial_spTop ; Use internal RAM for stack for calling SystemInit. | |
57 DCD Reset_Handler ; Reset Handler | |
58 DCD NMI_Handler ; NMI Handler | |
59 DCD HardFault_Handler ; Hard Fault Handler | |
60 DCD MemManage_Handler ; MPU Fault Handler | |
61 DCD BusFault_Handler ; Bus Fault Handler | |
62 DCD UsageFault_Handler ; Usage Fault Handler | |
63 DCD 0 ; Reserved | |
64 DCD 0 ; Reserved | |
65 DCD 0 ; Reserved | |
66 DCD 0 ; Reserved | |
67 DCD SVC_Handler ; SVCall Handler | |
68 DCD DebugMon_Handler ; Debug Monitor Handler | |
69 DCD 0 ; Reserved | |
70 DCD PendSV_Handler ; PendSV Handler | |
71 DCD SysTick_Handler ; SysTick Handler | |
72 | |
73 ; External Interrupts | |
74 DCD WWDG_IRQHandler ; Window Watchdog | |
75 DCD PVD_IRQHandler ; PVD through EXTI Line detect | |
76 DCD TAMPER_IRQHandler ; Tamper | |
77 DCD RTC_IRQHandler ; RTC | |
78 DCD FLASH_IRQHandler ; Flash | |
79 DCD RCC_IRQHandler ; RCC | |
80 DCD EXTI0_IRQHandler ; EXTI Line 0 | |
81 DCD EXTI1_IRQHandler ; EXTI Line 1 | |
82 DCD EXTI2_IRQHandler ; EXTI Line 2 | |
83 DCD EXTI3_IRQHandler ; EXTI Line 3 | |
84 DCD EXTI4_IRQHandler ; EXTI Line 4 | |
85 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |
86 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | |
87 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | |
88 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | |
89 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | |
90 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | |
91 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | |
92 DCD ADC1_IRQHandler ; ADC1 | |
93 DCD 0 ; Reserved | |
94 DCD 0 ; Reserved | |
95 DCD 0 ; Reserved | |
96 DCD 0 ; Reserved | |
97 DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | |
98 DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15 | |
99 DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16 | |
100 DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17 | |
101 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare | |
102 DCD TIM2_IRQHandler ; TIM2 | |
103 DCD TIM3_IRQHandler ; TIM3 | |
104 DCD TIM4_IRQHandler ; TIM4 | |
105 DCD I2C1_EV_IRQHandler ; I2C1 Event | |
106 DCD I2C1_ER_IRQHandler ; I2C1 Error | |
107 DCD I2C2_EV_IRQHandler ; I2C2 Event | |
108 DCD I2C2_ER_IRQHandler ; I2C2 Error | |
109 DCD SPI1_IRQHandler ; SPI1 | |
110 DCD SPI2_IRQHandler ; SPI2 | |
111 DCD USART1_IRQHandler ; USART1 | |
112 DCD USART2_IRQHandler ; USART2 | |
113 DCD USART3_IRQHandler ; USART3 | |
114 DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | |
115 DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line | |
116 DCD CEC_IRQHandler ; HDMI-CEC | |
117 DCD TIM12_IRQHandler ; TIM12 | |
118 DCD TIM13_IRQHandler ; TIM13 | |
119 DCD TIM14_IRQHandler ; TIM14 | |
120 DCD 0 ; Reserved | |
121 DCD 0 ; Reserved | |
122 DCD 0 ; Reserved | |
123 DCD 0 ; Reserved | |
124 DCD TIM5_IRQHandler ; TIM5 | |
125 DCD SPI3_IRQHandler ; SPI3 | |
126 DCD UART4_IRQHandler ; UART4 | |
127 DCD UART5_IRQHandler ; UART5 | |
128 DCD TIM6_DAC_IRQHandler ; TIM6 and DAC underrun | |
129 DCD TIM7_IRQHandler ; TIM7 | |
130 DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1 | |
131 DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2 | |
132 DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3 | |
133 DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5 | |
134 DCD DMA2_Channel5_IRQHandler ; DMA2 Channel5 | |
135 | |
136 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; | |
137 ;; | |
138 ;; Default interrupt handlers. | |
139 ;; | |
140 THUMB | |
141 | |
142 PUBWEAK Reset_Handler | |
143 SECTION .text:CODE:REORDER(2) | |
144 Reset_Handler | |
145 | |
146 LDR R0, =SystemInit | |
147 BLX R0 | |
148 LDR R0, =sfe(CSTACK) ; restore original stack pointer | |
149 MSR MSP, R0 | |
150 LDR R0, =__iar_program_start | |
151 BX R0 | |
152 | |
153 PUBWEAK NMI_Handler | |
154 SECTION .text:CODE:REORDER(1) | |
155 NMI_Handler | |
156 B NMI_Handler | |
157 | |
158 PUBWEAK HardFault_Handler | |
159 SECTION .text:CODE:REORDER(1) | |
160 HardFault_Handler | |
161 B HardFault_Handler | |
162 | |
163 PUBWEAK MemManage_Handler | |
164 SECTION .text:CODE:REORDER(1) | |
165 MemManage_Handler | |
166 B MemManage_Handler | |
167 | |
168 PUBWEAK BusFault_Handler | |
169 SECTION .text:CODE:REORDER(1) | |
170 BusFault_Handler | |
171 B BusFault_Handler | |
172 | |
173 PUBWEAK UsageFault_Handler | |
174 SECTION .text:CODE:REORDER(1) | |
175 UsageFault_Handler | |
176 B UsageFault_Handler | |
177 | |
178 PUBWEAK SVC_Handler | |
179 SECTION .text:CODE:REORDER(1) | |
180 SVC_Handler | |
181 B SVC_Handler | |
182 | |
183 PUBWEAK DebugMon_Handler | |
184 SECTION .text:CODE:REORDER(1) | |
185 DebugMon_Handler | |
186 B DebugMon_Handler | |
187 | |
188 PUBWEAK PendSV_Handler | |
189 SECTION .text:CODE:REORDER(1) | |
190 PendSV_Handler | |
191 B PendSV_Handler | |
192 | |
193 PUBWEAK SysTick_Handler | |
194 SECTION .text:CODE:REORDER(1) | |
195 SysTick_Handler | |
196 B SysTick_Handler | |
197 | |
198 PUBWEAK WWDG_IRQHandler | |
199 SECTION .text:CODE:REORDER(1) | |
200 WWDG_IRQHandler | |
201 B WWDG_IRQHandler | |
202 | |
203 PUBWEAK PVD_IRQHandler | |
204 SECTION .text:CODE:REORDER(1) | |
205 PVD_IRQHandler | |
206 B PVD_IRQHandler | |
207 | |
208 PUBWEAK TAMPER_IRQHandler | |
209 SECTION .text:CODE:REORDER(1) | |
210 TAMPER_IRQHandler | |
211 B TAMPER_IRQHandler | |
212 | |
213 PUBWEAK RTC_IRQHandler | |
214 SECTION .text:CODE:REORDER(1) | |
215 RTC_IRQHandler | |
216 B RTC_IRQHandler | |
217 | |
218 PUBWEAK FLASH_IRQHandler | |
219 SECTION .text:CODE:REORDER(1) | |
220 FLASH_IRQHandler | |
221 B FLASH_IRQHandler | |
222 | |
223 PUBWEAK RCC_IRQHandler | |
224 SECTION .text:CODE:REORDER(1) | |
225 RCC_IRQHandler | |
226 B RCC_IRQHandler | |
227 | |
228 PUBWEAK EXTI0_IRQHandler | |
229 SECTION .text:CODE:REORDER(1) | |
230 EXTI0_IRQHandler | |
231 B EXTI0_IRQHandler | |
232 | |
233 PUBWEAK EXTI1_IRQHandler | |
234 SECTION .text:CODE:REORDER(1) | |
235 EXTI1_IRQHandler | |
236 B EXTI1_IRQHandler | |
237 | |
238 PUBWEAK EXTI2_IRQHandler | |
239 SECTION .text:CODE:REORDER(1) | |
240 EXTI2_IRQHandler | |
241 B EXTI2_IRQHandler | |
242 | |
243 PUBWEAK EXTI3_IRQHandler | |
244 SECTION .text:CODE:REORDER(1) | |
245 EXTI3_IRQHandler | |
246 B EXTI3_IRQHandler | |
247 | |
248 PUBWEAK EXTI4_IRQHandler | |
249 SECTION .text:CODE:REORDER(1) | |
250 EXTI4_IRQHandler | |
251 B EXTI4_IRQHandler | |
252 | |
253 PUBWEAK DMA1_Channel1_IRQHandler | |
254 SECTION .text:CODE:REORDER(1) | |
255 DMA1_Channel1_IRQHandler | |
256 B DMA1_Channel1_IRQHandler | |
257 | |
258 PUBWEAK DMA1_Channel2_IRQHandler | |
259 SECTION .text:CODE:REORDER(1) | |
260 DMA1_Channel2_IRQHandler | |
261 B DMA1_Channel2_IRQHandler | |
262 | |
263 PUBWEAK DMA1_Channel3_IRQHandler | |
264 SECTION .text:CODE:REORDER(1) | |
265 DMA1_Channel3_IRQHandler | |
266 B DMA1_Channel3_IRQHandler | |
267 | |
268 PUBWEAK DMA1_Channel4_IRQHandler | |
269 SECTION .text:CODE:REORDER(1) | |
270 DMA1_Channel4_IRQHandler | |
271 B DMA1_Channel4_IRQHandler | |
272 | |
273 PUBWEAK DMA1_Channel5_IRQHandler | |
274 SECTION .text:CODE:REORDER(1) | |
275 DMA1_Channel5_IRQHandler | |
276 B DMA1_Channel5_IRQHandler | |
277 | |
278 PUBWEAK DMA1_Channel6_IRQHandler | |
279 SECTION .text:CODE:REORDER(1) | |
280 DMA1_Channel6_IRQHandler | |
281 B DMA1_Channel6_IRQHandler | |
282 | |
283 PUBWEAK DMA1_Channel7_IRQHandler | |
284 SECTION .text:CODE:REORDER(1) | |
285 DMA1_Channel7_IRQHandler | |
286 B DMA1_Channel7_IRQHandler | |
287 | |
288 PUBWEAK ADC1_IRQHandler | |
289 SECTION .text:CODE:REORDER(1) | |
290 ADC1_IRQHandler | |
291 B ADC1_IRQHandler | |
292 | |
293 PUBWEAK EXTI9_5_IRQHandler | |
294 SECTION .text:CODE:REORDER(1) | |
295 EXTI9_5_IRQHandler | |
296 B EXTI9_5_IRQHandler | |
297 | |
298 PUBWEAK TIM1_BRK_TIM15_IRQHandler | |
299 SECTION .text:CODE:REORDER(1) | |
300 TIM1_BRK_TIM15_IRQHandler | |
301 B TIM1_BRK_TIM15_IRQHandler | |
302 | |
303 PUBWEAK TIM1_UP_TIM16_IRQHandler | |
304 SECTION .text:CODE:REORDER(1) | |
305 TIM1_UP_TIM16_IRQHandler | |
306 B TIM1_UP_TIM16_IRQHandler | |
307 | |
308 PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler | |
309 SECTION .text:CODE:REORDER(1) | |
310 TIM1_TRG_COM_TIM17_IRQHandler | |
311 B TIM1_TRG_COM_TIM17_IRQHandler | |
312 | |
313 PUBWEAK TIM1_CC_IRQHandler | |
314 SECTION .text:CODE:REORDER(1) | |
315 TIM1_CC_IRQHandler | |
316 B TIM1_CC_IRQHandler | |
317 | |
318 PUBWEAK TIM2_IRQHandler | |
319 SECTION .text:CODE:REORDER(1) | |
320 TIM2_IRQHandler | |
321 B TIM2_IRQHandler | |
322 | |
323 PUBWEAK TIM3_IRQHandler | |
324 SECTION .text:CODE:REORDER(1) | |
325 TIM3_IRQHandler | |
326 B TIM3_IRQHandler | |
327 | |
328 PUBWEAK TIM4_IRQHandler | |
329 SECTION .text:CODE:REORDER(1) | |
330 TIM4_IRQHandler | |
331 B TIM4_IRQHandler | |
332 | |
333 PUBWEAK I2C1_EV_IRQHandler | |
334 SECTION .text:CODE:REORDER(1) | |
335 I2C1_EV_IRQHandler | |
336 B I2C1_EV_IRQHandler | |
337 | |
338 PUBWEAK I2C1_ER_IRQHandler | |
339 SECTION .text:CODE:REORDER(1) | |
340 I2C1_ER_IRQHandler | |
341 B I2C1_ER_IRQHandler | |
342 | |
343 PUBWEAK I2C2_EV_IRQHandler | |
344 SECTION .text:CODE:REORDER(1) | |
345 I2C2_EV_IRQHandler | |
346 B I2C2_EV_IRQHandler | |
347 | |
348 PUBWEAK I2C2_ER_IRQHandler | |
349 SECTION .text:CODE:REORDER(1) | |
350 I2C2_ER_IRQHandler | |
351 B I2C2_ER_IRQHandler | |
352 | |
353 PUBWEAK SPI1_IRQHandler | |
354 SECTION .text:CODE:REORDER(1) | |
355 SPI1_IRQHandler | |
356 B SPI1_IRQHandler | |
357 | |
358 PUBWEAK SPI2_IRQHandler | |
359 SECTION .text:CODE:REORDER(1) | |
360 SPI2_IRQHandler | |
361 B SPI2_IRQHandler | |
362 | |
363 PUBWEAK USART1_IRQHandler | |
364 SECTION .text:CODE:REORDER(1) | |
365 USART1_IRQHandler | |
366 B USART1_IRQHandler | |
367 | |
368 PUBWEAK USART2_IRQHandler | |
369 SECTION .text:CODE:REORDER(1) | |
370 USART2_IRQHandler | |
371 B USART2_IRQHandler | |
372 | |
373 PUBWEAK USART3_IRQHandler | |
374 SECTION .text:CODE:REORDER(1) | |
375 USART3_IRQHandler | |
376 B USART3_IRQHandler | |
377 | |
378 PUBWEAK EXTI15_10_IRQHandler | |
379 SECTION .text:CODE:REORDER(1) | |
380 EXTI15_10_IRQHandler | |
381 B EXTI15_10_IRQHandler | |
382 | |
383 PUBWEAK RTCAlarm_IRQHandler | |
384 SECTION .text:CODE:REORDER(1) | |
385 RTCAlarm_IRQHandler | |
386 B RTCAlarm_IRQHandler | |
387 | |
388 PUBWEAK CEC_IRQHandler | |
389 SECTION .text:CODE:REORDER(1) | |
390 CEC_IRQHandler | |
391 B CEC_IRQHandler | |
392 | |
393 PUBWEAK TIM12_IRQHandler | |
394 SECTION .text:CODE:REORDER(1) | |
395 TIM12_IRQHandler | |
396 B TIM12_IRQHandler | |
397 | |
398 PUBWEAK TIM13_IRQHandler | |
399 SECTION .text:CODE:REORDER(1) | |
400 TIM13_IRQHandler | |
401 B TIM13_IRQHandler | |
402 | |
403 PUBWEAK TIM14_IRQHandler | |
404 SECTION .text:CODE:REORDER(1) | |
405 TIM14_IRQHandler | |
406 B TIM14_IRQHandler | |
407 | |
408 PUBWEAK TIM5_IRQHandler | |
409 SECTION .text:CODE:REORDER(1) | |
410 TIM5_IRQHandler | |
411 B TIM5_IRQHandler | |
412 | |
413 PUBWEAK SPI3_IRQHandler | |
414 SECTION .text:CODE:REORDER(1) | |
415 SPI3_IRQHandler | |
416 B SPI3_IRQHandler | |
417 | |
418 PUBWEAK UART4_IRQHandler | |
419 SECTION .text:CODE:REORDER(1) | |
420 UART4_IRQHandler | |
421 B UART4_IRQHandler | |
422 | |
423 PUBWEAK UART5_IRQHandler | |
424 SECTION .text:CODE:REORDER(1) | |
425 UART5_IRQHandler | |
426 B UART5_IRQHandler | |
427 | |
428 PUBWEAK TIM6_DAC_IRQHandler | |
429 SECTION .text:CODE:REORDER(1) | |
430 TIM6_DAC_IRQHandler | |
431 B TIM6_DAC_IRQHandler | |
432 | |
433 PUBWEAK TIM7_IRQHandler | |
434 SECTION .text:CODE:REORDER(1) | |
435 TIM7_IRQHandler | |
436 B TIM7_IRQHandler | |
437 | |
438 PUBWEAK DMA2_Channel1_IRQHandler | |
439 SECTION .text:CODE:REORDER(1) | |
440 DMA2_Channel1_IRQHandler | |
441 B DMA2_Channel1_IRQHandler | |
442 | |
443 PUBWEAK DMA2_Channel2_IRQHandler | |
444 SECTION .text:CODE:REORDER(1) | |
445 DMA2_Channel2_IRQHandler | |
446 B DMA2_Channel2_IRQHandler | |
447 | |
448 PUBWEAK DMA2_Channel3_IRQHandler | |
449 SECTION .text:CODE:REORDER(1) | |
450 DMA2_Channel3_IRQHandler | |
451 B DMA2_Channel3_IRQHandler | |
452 | |
453 PUBWEAK DMA2_Channel4_5_IRQHandler | |
454 SECTION .text:CODE:REORDER(1) | |
455 DMA2_Channel4_5_IRQHandler | |
456 B DMA2_Channel4_5_IRQHandler | |
457 | |
458 PUBWEAK DMA2_Channel5_IRQHandler | |
459 SECTION .text:CODE:REORDER(1) | |
460 DMA2_Channel5_IRQHandler | |
461 B DMA2_Channel5_IRQHandler | |
462 | |
463 END | |
464 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |