Mercurial > ~darius > hgwebdir.cgi > stm32temp
comparison libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/HiTOP/STM3210X-XL_BANK1/Settings/arm_arch.lsl @ 0:c59513fd84fb
Initial commit of STM32 test code.
author | Daniel O'Connor <darius@dons.net.au> |
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date | Mon, 03 Oct 2011 21:19:15 +1030 |
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1 //////////////////////////////////////////////////////////////////////////// | |
2 // | |
3 // File : arm_arch.lsl | |
4 // | |
5 // Version : @(#)arm_arch.lsl 1.4 09/04/17 | |
6 // | |
7 // Description : Generic LSL file for ARM architectures | |
8 // | |
9 // Copyright 2008-2009 Altium BV | |
10 // | |
11 //////////////////////////////////////////////////////////////////////////// | |
12 | |
13 #ifndef __STACK | |
14 # define __STACK 32k | |
15 #endif | |
16 #ifndef __HEAP | |
17 # define __HEAP 32k | |
18 #endif | |
19 #ifndef __STACK_FIQ | |
20 # define __STACK_FIQ 8 | |
21 #endif | |
22 #ifndef __STACK_IRQ | |
23 # define __STACK_IRQ 8 | |
24 #endif | |
25 #ifndef __STACK_SVC | |
26 # define __STACK_SVC 8 | |
27 #endif | |
28 #ifndef __STACK_ABT | |
29 # define __STACK_ABT 8 | |
30 #endif | |
31 #ifndef __STACK_UND | |
32 # define __STACK_UND 8 | |
33 #endif | |
34 #ifndef __PROCESSOR_MODE | |
35 # define __PROCESSOR_MODE 0x1F /* SYS mode */ | |
36 #endif | |
37 #ifndef __IRQ_BIT | |
38 # define __IRQ_BIT 0x80 /* IRQ interrupts disabled */ | |
39 #endif | |
40 #ifndef __FIQ_BIT | |
41 # define __FIQ_BIT 0x40 /* FIQ interrupts disabled */ | |
42 #endif | |
43 | |
44 #define __APPLICATION_MODE (__PROCESSOR_MODE | __IRQ_BIT | __FIQ_BIT) | |
45 | |
46 #ifndef __VECTOR_TABLE_ROM_ADDR | |
47 # define __VECTOR_TABLE_ROM_ADDR 0x00000000 | |
48 #endif | |
49 | |
50 #ifndef __VECTOR_TABLE_RAM_ADDR | |
51 # define __VECTOR_TABLE_RAM_ADDR 0x00000000 | |
52 #endif | |
53 | |
54 #if defined(__CPU_ARMV7M__) || defined(__CPU_ARMV6M__) | |
55 # ifndef __NR_OF_VECTORS | |
56 # define __NR_OF_VECTORS 16 | |
57 # endif | |
58 # define __VECTOR_TABLE_SIZE (__NR_OF_VECTORS * 4) | |
59 #else | |
60 # ifdef __PIC_VECTORS | |
61 # define __VECTOR_TABLE_SIZE 64 | |
62 # else | |
63 # ifdef __FIQ_HANDLER_INLINE | |
64 # define __VECTOR_TABLE_SIZE 28 | |
65 # define __NR_OF_VECTORS 7 | |
66 # else | |
67 # define __VECTOR_TABLE_SIZE 32 | |
68 # define __NR_OF_VECTORS 8 | |
69 # endif | |
70 # endif | |
71 #endif | |
72 | |
73 #ifndef __VECTOR_TABLE_RAM_SPACE | |
74 # undef __VECTOR_TABLE_RAM_COPY | |
75 #endif | |
76 | |
77 #ifndef __XVWBUF | |
78 # define __XVWBUF 0 /* buffer used by CrossView Pro */ | |
79 #endif | |
80 | |
81 #define BOUNDS_GROUP_NAME grp_bounds | |
82 #define BOUNDS_GROUP_SELECT "bounds" | |
83 | |
84 architecture ARM | |
85 { | |
86 endianness | |
87 { | |
88 little; | |
89 big; | |
90 } | |
91 | |
92 space linear | |
93 { | |
94 id = 1; | |
95 mau = 8; | |
96 map (size = 4G, dest = bus:local_bus); | |
97 | |
98 copytable | |
99 ( | |
100 align = 4, | |
101 copy_unit = 1, | |
102 dest = linear | |
103 ); | |
104 | |
105 start_address | |
106 ( | |
107 // It is not strictly necessary to define a run_addr for _START | |
108 // because hardware starts execution at address 0x0 which should | |
109 // be the vector table with a jump to the relocatable _START, but | |
110 // an absolute address can prevent the branch to be out-of-range. | |
111 // Or _START may be the entry point at reset and the reset handler | |
112 // copies the vector table to address 0x0 after some ROM/RAM memory | |
113 // re-mapping. In that case _START should be at a fixed address | |
114 // in ROM, specifically the alias of address 0x0 before memory | |
115 // re-mapping. | |
116 #ifdef __START | |
117 run_addr = __START, | |
118 #endif | |
119 symbol = "_START" | |
120 ); | |
121 | |
122 stack "stack" | |
123 ( | |
124 #ifdef __STACK_FIXED | |
125 fixed, | |
126 #endif | |
127 align = 4, | |
128 min_size = __STACK, | |
129 grows = high_to_low | |
130 ); | |
131 | |
132 heap "heap" | |
133 ( | |
134 #ifdef __HEAP_FIXED | |
135 fixed, | |
136 #endif | |
137 align = 4, | |
138 min_size=__HEAP | |
139 ); | |
140 | |
141 #if !defined(__CPU_ARMV7M__) && !defined(__CPU_ARMV6M__) | |
142 stack "stack_fiq" | |
143 ( | |
144 fixed, | |
145 align = 4, | |
146 min_size = __STACK_FIQ, | |
147 grows = high_to_low | |
148 ); | |
149 stack "stack_irq" | |
150 ( | |
151 fixed, | |
152 align = 4, | |
153 min_size = __STACK_IRQ, | |
154 grows = high_to_low | |
155 ); | |
156 stack "stack_svc" | |
157 ( | |
158 fixed, | |
159 align = 4, | |
160 min_size = __STACK_SVC, | |
161 grows = high_to_low | |
162 ); | |
163 stack "stack_abt" | |
164 ( | |
165 fixed, | |
166 align = 4, | |
167 min_size = __STACK_ABT, | |
168 grows = high_to_low | |
169 ); | |
170 stack "stack_und" | |
171 ( | |
172 fixed, | |
173 align = 4, | |
174 min_size = __STACK_UND, | |
175 grows = high_to_low | |
176 ); | |
177 #endif | |
178 | |
179 #if !defined(__NO_AUTO_VECTORS) && !defined(__NO_DEFAULT_AUTO_VECTORS) | |
180 # if defined(__CPU_ARMV7M__) || defined(__CPU_ARMV6M__) | |
181 // vector table with handler addresses | |
182 vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, | |
183 template = ".text.handler_address", | |
184 template_symbol = "_lc_vector_handler", | |
185 vector_prefix = "_vector_", | |
186 fill = loop, | |
187 no_inline | |
188 ) | |
189 { | |
190 vector ( id = 0, fill = "_START" ); // FIXME: "_lc_ub_stack" does not work | |
191 vector ( id = 1, fill = "_START" ); | |
192 } | |
193 # else | |
194 # ifdef __PIC_VECTORS | |
195 // vector table with ldrpc instructions from handler table | |
196 vector_table "vector_table" ( vector_size = 4, size = 8, run_addr = __VECTOR_TABLE_ROM_ADDR, | |
197 template = ".text.vector_ldrpc", | |
198 template_symbol = "_lc_vector_ldrpc", | |
199 vector_prefix = "_vector_ldrpc_", | |
200 fill = loop | |
201 ) | |
202 { | |
203 } | |
204 // subsequent vector table (data pool) with addresses of handlers | |
205 vector_table "handler_table" ( vector_size = 4, size = 8, run_addr = __VECTOR_TABLE_ROM_ADDR + 32, | |
206 template = ".text.handler_address", | |
207 template_symbol = "_lc_vector_handler", | |
208 vector_prefix = "_vector_", | |
209 fill = loop[-32], | |
210 no_inline | |
211 ) | |
212 { | |
213 vector ( id = 0, fill = "_START" ); | |
214 } | |
215 # else | |
216 // vector table with branch instructions to handlers | |
217 vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, | |
218 template = ".text.vector_branch", | |
219 template_symbol = "_lc_vector_handler", | |
220 vector_prefix = "_vector_", | |
221 fill = loop | |
222 ) | |
223 { | |
224 vector ( id = 0, fill = "_START" ); | |
225 } | |
226 # endif | |
227 # endif | |
228 #endif | |
229 section_layout | |
230 { | |
231 #if defined(__NO_AUTO_VECTORS) | |
232 "_lc_ub_vector_table" = __VECTOR_TABLE_ROM_ADDR; | |
233 "_lc_ue_vector_table" = __VECTOR_TABLE_ROM_ADDR + __VECTOR_TABLE_SIZE; | |
234 #endif | |
235 #ifdef __VECTOR_TABLE_RAM_SPACE | |
236 // reserve space to copy vector table from ROM to RAM | |
237 group ( ordered, run_addr = __VECTOR_TABLE_RAM_ADDR ) | |
238 reserved "vector_table_space" ( size = __VECTOR_TABLE_SIZE, attributes = rwx ); | |
239 #endif | |
240 #ifdef __VECTOR_TABLE_RAM_COPY | |
241 // provide copy address symbols for copy routine | |
242 "_lc_ub_vector_table_copy" := "_lc_ub_vector_table_space"; | |
243 "_lc_ue_vector_table_copy" := "_lc_ue_vector_table_space"; | |
244 #else | |
245 // prevent copy: copy address equals orig address | |
246 "_lc_ub_vector_table_copy" := "_lc_ub_vector_table"; | |
247 "_lc_ue_vector_table_copy" := "_lc_ue_vector_table"; | |
248 #endif | |
249 // define buffer for string input via Crossview Pro debugger | |
250 group ( align = 4 ) reserved "xvwbuffer" (size=__XVWBUF, attributes=rw ); | |
251 | |
252 // define labels for bounds begin and end as used in C library | |
253 #ifndef BOUNDS_GROUP_REDEFINED | |
254 group BOUNDS_GROUP_NAME (ordered, contiguous) | |
255 { | |
256 select BOUNDS_GROUP_SELECT; | |
257 } | |
258 #endif | |
259 "_lc_ub_bounds" := addressof(group:BOUNDS_GROUP_NAME); | |
260 "_lc_ue_bounds" := addressof(group:BOUNDS_GROUP_NAME) + sizeof(group:BOUNDS_GROUP_NAME); | |
261 | |
262 #ifdef __HEAPADDR | |
263 group ( ordered, run_addr=__HEAPADDR ) | |
264 { | |
265 select "heap"; | |
266 } | |
267 #endif | |
268 #ifdef __STACKADDR | |
269 group ( ordered, run_addr=__STACKADDR ) | |
270 { | |
271 select "stack"; | |
272 } | |
273 #endif | |
274 #if !defined(__CPU_ARMV7M__) && !defined(__CPU_ARMV6M__) | |
275 // symbol to set mode bits and interrupt disable bits | |
276 // in cstart module before calling the application (main) | |
277 "_APPLICATION_MODE_" = __APPLICATION_MODE; | |
278 #endif | |
279 } | |
280 } | |
281 | |
282 bus local_bus | |
283 { | |
284 mau = 8; | |
285 width = 32; | |
286 } | |
287 } |