comparison libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/DAC/DualModeDMA_SineWave/readme.txt @ 0:c59513fd84fb

Initial commit of STM32 test code.
author Daniel O'Connor <darius@dons.net.au>
date Mon, 03 Oct 2011 21:19:15 +1030
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1 /**
2 @page DAC_DualModeDMA_SineWave DAC dual mode sine wave example
3
4 @verbatim
5 ******************** (C) COPYRIGHT 2011 STMicroelectronics *******************
6 * @file DAC/DualModeDMA_SineWave/readme.txt
7 * @author MCD Application Team
8 * @version V3.5.0
9 * @date 08-April-2011
10 * @brief Description of the DAC dual mode sine wave example.
11 ******************************************************************************
12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 ******************************************************************************
19 @endverbatim
20
21 @par Example Description
22
23 This example describes how to use DAC dual channel mode with DMA to generate sine
24 waves on both DAC channels outputs.
25
26 Both DAC channels conversions are configured to be triggered by TIM2 TRGO triggers
27 and without noise/triangle wave generation. 12bit right data alignment is selected
28 since we choose to access DAC_DHR12RD register. DMA2 channel4 is configured to
29 transfer continuously, word by word, a 32-word buffer to the dual DAC register
30 DAC_DHR12RD.
31
32 The transferred 32buffer is made to have a sine wave generation on each DAC channel
33 output. Both DAC channels are then enabled. Only DAC channel2 DMA capability is enabled.
34
35 Once TIM2 is enabled, each TIM2 TRGO update event generate a DMA request which
36 transfer data to the dual DAC register and DAC conversion is started. The sine
37 waves can be visualized by connecting both PA.04 and PA.05 pins to an oscilloscope.
38
39
40 @par Directory contents
41
42 - DAC/DualModeDMA_SineWave/stm32f10x_conf.h Library Configuration file
43 - DAC/DualModeDMA_SineWave/stm32f10x_it.c Interrupt handlers
44 - DAC/DualModeDMA_SineWave/stm32f10x_it.h Header for stm32f10x_it.c
45 - DAC/DualModeDMA_SineWave/main.c Main program
46 - DAC/DualModeDMA_SineWave/system_stm32f10x.c STM32F10x system source file
47
48 @par Hardware and Software environment
49
50 - This example runs on STM32F10x Connectivity line, High-Density, High-Density
51 Value line, XL-Density, Medium-Density Value line and Low-Density Value line
52 Devices.
53
54 - This example has been tested with STMicroelectronics STM32100E-EVAL
55 (High-Density Value line), STM32100B-EVAL (Medium-Density Value line),
56 STM3210C-EVAL (Connectivity line) and STM3210E-EVAL (High-Density and XL-Density)
57 evaluation boards and can be easily tailored to any other supported device
58 and development board.
59
60 - STM32100E-EVAL Set-up
61 - Connect PA.04 and PA.05 pins to an oscilloscope
62
63 - STM32100B-EVAL Set-up
64 - Connect PA.04 and PA.05 pins to an oscilloscope
65
66 - STM3210C-EVAL Set-up
67 - Only PA.04 can be monitored on an oscilloscope, PA.05 is used by other
68 module (Motor control connector) that prevents to have DAC channel output
69 on it. However, if you don't use Motor control connector, you can remove
70 the 0ohm resistor R84 and thus PA.05 can be used for DAC output.
71 @note Make shure that jumper JP15 is open.
72
73 - STM3210E-EVAL Set-up
74 - Connect PA.04 and PA.05 pins to an oscilloscope
75
76
77 @par How to use it ?
78
79 In order to make the program work, you must do the following :
80 - Copy all source files from this example folder to the template folder under
81 Project\STM32F10x_StdPeriph_Template
82 - Open your preferred toolchain
83 - Rebuild all files and load your image into target memory
84 - Run the example
85
86 @note
87 - Low-density Value line devices are STM32F100xx microcontrollers where the
88 Flash memory density ranges between 16 and 32 Kbytes.
89 - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx
90 microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
91 - Medium-density Value line devices are STM32F100xx microcontrollers where
92 the Flash memory density ranges between 64 and 128 Kbytes.
93 - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx
94 microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
95 - High-density devices are STM32F101xx and STM32F103xx microcontrollers where
96 the Flash memory density ranges between 256 and 512 Kbytes.
97 - High-density Value line devices are STM32F100xx microcontrollers where
98 the Flash memory density ranges between 256 and 512 Kbytes.
99 - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where
100 the Flash memory density ranges between 512 and 1024 Kbytes.
101 - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.
102
103 * <h3><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h3>
104 */