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Initial commit of STM32 test code.
author Daniel O'Connor <darius@dons.net.au>
date Mon, 03 Oct 2011 21:19:15 +1030
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1 ;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
2 ;* File Name : startup_stm32f10x_hd_vl.s
3 ;* Author : MCD Application Team
4 ;* Version : V3.5.0
5 ;* Date : 11-March-2011
6 ;* Description : STM32F10x High Density Value Line Devices vector table
7 ;* for EWARM toolchain.
8 ;* This module performs:
9 ;* - Set the initial SP
10 ;* - Configure the clock system and the external SRAM
11 ;* mounted on STM32100E-EVAL board to be used as data
12 ;* memory (optional, to be enabled by user)
13 ;* - Set the initial PC == __iar_program_start,
14 ;* - Set the vector table entries with the exceptions ISR
15 ;* address.
16 ;* After Reset the Cortex-M3 processor is in Thread mode,
17 ;* priority is Privileged, and the Stack is set to Main.
18 ;********************************************************************************
19 ;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
20 ;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
21 ;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
22 ;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
23 ;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
24 ;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
25 ;*******************************************************************************
26 ;
27 ;
28 ; The modules in this file are included in the libraries, and may be replaced
29 ; by any user-defined modules that define the PUBLIC symbol _program_start or
30 ; a user defined start symbol.
31 ; To override the cstartup defined in the library, simply add your modified
32 ; version to the workbench project.
33 ;
34 ; The vector table is normally located at address 0.
35 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
36 ; The name "__vector_table" has special meaning for C-SPY:
37 ; it is where the SP start value is found, and the NVIC vector
38 ; table register (VTOR) is initialized to this address if != 0.
39 ;
40 ; Cortex-M version
41 ;
42
43 MODULE ?cstartup
44
45 ;; Forward declaration of sections.
46 SECTION CSTACK:DATA:NOROOT(3)
47
48 SECTION .intvec:CODE:NOROOT(2)
49
50 EXTERN __iar_program_start
51 EXTERN SystemInit
52 PUBLIC __vector_table
53
54 DATA
55 __vector_table
56 DCD sfe(CSTACK)
57 DCD Reset_Handler ; Reset Handler
58 DCD NMI_Handler ; NMI Handler
59 DCD HardFault_Handler ; Hard Fault Handler
60 DCD MemManage_Handler ; MPU Fault Handler
61 DCD BusFault_Handler ; Bus Fault Handler
62 DCD UsageFault_Handler ; Usage Fault Handler
63 DCD 0 ; Reserved
64 DCD 0 ; Reserved
65 DCD 0 ; Reserved
66 DCD 0 ; Reserved
67 DCD SVC_Handler ; SVCall Handler
68 DCD DebugMon_Handler ; Debug Monitor Handler
69 DCD 0 ; Reserved
70 DCD PendSV_Handler ; PendSV Handler
71 DCD SysTick_Handler ; SysTick Handler
72
73 ; External Interrupts
74 DCD WWDG_IRQHandler ; Window Watchdog
75 DCD PVD_IRQHandler ; PVD through EXTI Line detect
76 DCD TAMPER_IRQHandler ; Tamper
77 DCD RTC_IRQHandler ; RTC
78 DCD FLASH_IRQHandler ; Flash
79 DCD RCC_IRQHandler ; RCC
80 DCD EXTI0_IRQHandler ; EXTI Line 0
81 DCD EXTI1_IRQHandler ; EXTI Line 1
82 DCD EXTI2_IRQHandler ; EXTI Line 2
83 DCD EXTI3_IRQHandler ; EXTI Line 3
84 DCD EXTI4_IRQHandler ; EXTI Line 4
85 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
86 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
87 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
88 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
89 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
90 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
91 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
92 DCD ADC1_IRQHandler ; ADC1
93 DCD 0 ; Reserved
94 DCD 0 ; Reserved
95 DCD 0 ; Reserved
96 DCD 0 ; Reserved
97 DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
98 DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
99 DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
100 DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17
101 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
102 DCD TIM2_IRQHandler ; TIM2
103 DCD TIM3_IRQHandler ; TIM3
104 DCD TIM4_IRQHandler ; TIM4
105 DCD I2C1_EV_IRQHandler ; I2C1 Event
106 DCD I2C1_ER_IRQHandler ; I2C1 Error
107 DCD I2C2_EV_IRQHandler ; I2C2 Event
108 DCD I2C2_ER_IRQHandler ; I2C2 Error
109 DCD SPI1_IRQHandler ; SPI1
110 DCD SPI2_IRQHandler ; SPI2
111 DCD USART1_IRQHandler ; USART1
112 DCD USART2_IRQHandler ; USART2
113 DCD USART3_IRQHandler ; USART3
114 DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
115 DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
116 DCD CEC_IRQHandler ; HDMI-CEC
117 DCD TIM12_IRQHandler ; TIM12
118 DCD TIM13_IRQHandler ; TIM13
119 DCD TIM14_IRQHandler ; TIM14
120 DCD 0 ; Reserved
121 DCD 0 ; Reserved
122 DCD 0 ; Reserved
123 DCD 0 ; Reserved
124 DCD TIM5_IRQHandler ; TIM5
125 DCD SPI3_IRQHandler ; SPI3
126 DCD UART4_IRQHandler ; UART4
127 DCD UART5_IRQHandler ; UART5
128 DCD TIM6_DAC_IRQHandler ; TIM6 and DAC underrun
129 DCD TIM7_IRQHandler ; TIM7
130 DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
131 DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
132 DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
133 DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
134 DCD DMA2_Channel5_IRQHandler ; DMA2 Channel5
135
136 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
137 ;;
138 ;; Default interrupt handlers.
139 ;;
140 THUMB
141
142 PUBWEAK Reset_Handler
143 SECTION .text:CODE:REORDER(2)
144 Reset_Handler
145 LDR R0, =SystemInit
146 BLX R0
147 LDR R0, =__iar_program_start
148 BX R0
149
150 PUBWEAK NMI_Handler
151 SECTION .text:CODE:REORDER(1)
152 NMI_Handler
153 B NMI_Handler
154
155 PUBWEAK HardFault_Handler
156 SECTION .text:CODE:REORDER(1)
157 HardFault_Handler
158 B HardFault_Handler
159
160 PUBWEAK MemManage_Handler
161 SECTION .text:CODE:REORDER(1)
162 MemManage_Handler
163 B MemManage_Handler
164
165 PUBWEAK BusFault_Handler
166 SECTION .text:CODE:REORDER(1)
167 BusFault_Handler
168 B BusFault_Handler
169
170 PUBWEAK UsageFault_Handler
171 SECTION .text:CODE:REORDER(1)
172 UsageFault_Handler
173 B UsageFault_Handler
174
175 PUBWEAK SVC_Handler
176 SECTION .text:CODE:REORDER(1)
177 SVC_Handler
178 B SVC_Handler
179
180 PUBWEAK DebugMon_Handler
181 SECTION .text:CODE:REORDER(1)
182 DebugMon_Handler
183 B DebugMon_Handler
184
185 PUBWEAK PendSV_Handler
186 SECTION .text:CODE:REORDER(1)
187 PendSV_Handler
188 B PendSV_Handler
189
190 PUBWEAK SysTick_Handler
191 SECTION .text:CODE:REORDER(1)
192 SysTick_Handler
193 B SysTick_Handler
194
195 PUBWEAK WWDG_IRQHandler
196 SECTION .text:CODE:REORDER(1)
197 WWDG_IRQHandler
198 B WWDG_IRQHandler
199
200 PUBWEAK PVD_IRQHandler
201 SECTION .text:CODE:REORDER(1)
202 PVD_IRQHandler
203 B PVD_IRQHandler
204
205 PUBWEAK TAMPER_IRQHandler
206 SECTION .text:CODE:REORDER(1)
207 TAMPER_IRQHandler
208 B TAMPER_IRQHandler
209
210 PUBWEAK RTC_IRQHandler
211 SECTION .text:CODE:REORDER(1)
212 RTC_IRQHandler
213 B RTC_IRQHandler
214
215 PUBWEAK FLASH_IRQHandler
216 SECTION .text:CODE:REORDER(1)
217 FLASH_IRQHandler
218 B FLASH_IRQHandler
219
220 PUBWEAK RCC_IRQHandler
221 SECTION .text:CODE:REORDER(1)
222 RCC_IRQHandler
223 B RCC_IRQHandler
224
225 PUBWEAK EXTI0_IRQHandler
226 SECTION .text:CODE:REORDER(1)
227 EXTI0_IRQHandler
228 B EXTI0_IRQHandler
229
230 PUBWEAK EXTI1_IRQHandler
231 SECTION .text:CODE:REORDER(1)
232 EXTI1_IRQHandler
233 B EXTI1_IRQHandler
234
235 PUBWEAK EXTI2_IRQHandler
236 SECTION .text:CODE:REORDER(1)
237 EXTI2_IRQHandler
238 B EXTI2_IRQHandler
239
240 PUBWEAK EXTI3_IRQHandler
241 SECTION .text:CODE:REORDER(1)
242 EXTI3_IRQHandler
243 B EXTI3_IRQHandler
244
245 PUBWEAK EXTI4_IRQHandler
246 SECTION .text:CODE:REORDER(1)
247 EXTI4_IRQHandler
248 B EXTI4_IRQHandler
249
250 PUBWEAK DMA1_Channel1_IRQHandler
251 SECTION .text:CODE:REORDER(1)
252 DMA1_Channel1_IRQHandler
253 B DMA1_Channel1_IRQHandler
254
255 PUBWEAK DMA1_Channel2_IRQHandler
256 SECTION .text:CODE:REORDER(1)
257 DMA1_Channel2_IRQHandler
258 B DMA1_Channel2_IRQHandler
259
260 PUBWEAK DMA1_Channel3_IRQHandler
261 SECTION .text:CODE:REORDER(1)
262 DMA1_Channel3_IRQHandler
263 B DMA1_Channel3_IRQHandler
264
265 PUBWEAK DMA1_Channel4_IRQHandler
266 SECTION .text:CODE:REORDER(1)
267 DMA1_Channel4_IRQHandler
268 B DMA1_Channel4_IRQHandler
269
270 PUBWEAK DMA1_Channel5_IRQHandler
271 SECTION .text:CODE:REORDER(1)
272 DMA1_Channel5_IRQHandler
273 B DMA1_Channel5_IRQHandler
274
275 PUBWEAK DMA1_Channel6_IRQHandler
276 SECTION .text:CODE:REORDER(1)
277 DMA1_Channel6_IRQHandler
278 B DMA1_Channel6_IRQHandler
279
280 PUBWEAK DMA1_Channel7_IRQHandler
281 SECTION .text:CODE:REORDER(1)
282 DMA1_Channel7_IRQHandler
283 B DMA1_Channel7_IRQHandler
284
285 PUBWEAK ADC1_IRQHandler
286 SECTION .text:CODE:REORDER(1)
287 ADC1_IRQHandler
288 B ADC1_IRQHandler
289
290 PUBWEAK EXTI9_5_IRQHandler
291 SECTION .text:CODE:REORDER(1)
292 EXTI9_5_IRQHandler
293 B EXTI9_5_IRQHandler
294
295 PUBWEAK TIM1_BRK_TIM15_IRQHandler
296 SECTION .text:CODE:REORDER(1)
297 TIM1_BRK_TIM15_IRQHandler
298 B TIM1_BRK_TIM15_IRQHandler
299
300 PUBWEAK TIM1_UP_TIM16_IRQHandler
301 SECTION .text:CODE:REORDER(1)
302 TIM1_UP_TIM16_IRQHandler
303 B TIM1_UP_TIM16_IRQHandler
304
305 PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
306 SECTION .text:CODE:REORDER(1)
307 TIM1_TRG_COM_TIM17_IRQHandler
308 B TIM1_TRG_COM_TIM17_IRQHandler
309
310 PUBWEAK TIM1_CC_IRQHandler
311 SECTION .text:CODE:REORDER(1)
312 TIM1_CC_IRQHandler
313 B TIM1_CC_IRQHandler
314
315 PUBWEAK TIM2_IRQHandler
316 SECTION .text:CODE:REORDER(1)
317 TIM2_IRQHandler
318 B TIM2_IRQHandler
319
320 PUBWEAK TIM3_IRQHandler
321 SECTION .text:CODE:REORDER(1)
322 TIM3_IRQHandler
323 B TIM3_IRQHandler
324
325 PUBWEAK TIM4_IRQHandler
326 SECTION .text:CODE:REORDER(1)
327 TIM4_IRQHandler
328 B TIM4_IRQHandler
329
330 PUBWEAK I2C1_EV_IRQHandler
331 SECTION .text:CODE:REORDER(1)
332 I2C1_EV_IRQHandler
333 B I2C1_EV_IRQHandler
334
335 PUBWEAK I2C1_ER_IRQHandler
336 SECTION .text:CODE:REORDER(1)
337 I2C1_ER_IRQHandler
338 B I2C1_ER_IRQHandler
339
340 PUBWEAK I2C2_EV_IRQHandler
341 SECTION .text:CODE:REORDER(1)
342 I2C2_EV_IRQHandler
343 B I2C2_EV_IRQHandler
344
345 PUBWEAK I2C2_ER_IRQHandler
346 SECTION .text:CODE:REORDER(1)
347 I2C2_ER_IRQHandler
348 B I2C2_ER_IRQHandler
349
350 PUBWEAK SPI1_IRQHandler
351 SECTION .text:CODE:REORDER(1)
352 SPI1_IRQHandler
353 B SPI1_IRQHandler
354
355 PUBWEAK SPI2_IRQHandler
356 SECTION .text:CODE:REORDER(1)
357 SPI2_IRQHandler
358 B SPI2_IRQHandler
359
360 PUBWEAK USART1_IRQHandler
361 SECTION .text:CODE:REORDER(1)
362 USART1_IRQHandler
363 B USART1_IRQHandler
364
365 PUBWEAK USART2_IRQHandler
366 SECTION .text:CODE:REORDER(1)
367 USART2_IRQHandler
368 B USART2_IRQHandler
369
370 PUBWEAK USART3_IRQHandler
371 SECTION .text:CODE:REORDER(1)
372 USART3_IRQHandler
373 B USART3_IRQHandler
374
375 PUBWEAK EXTI15_10_IRQHandler
376 SECTION .text:CODE:REORDER(1)
377 EXTI15_10_IRQHandler
378 B EXTI15_10_IRQHandler
379
380 PUBWEAK RTCAlarm_IRQHandler
381 SECTION .text:CODE:REORDER(1)
382 RTCAlarm_IRQHandler
383 B RTCAlarm_IRQHandler
384
385 PUBWEAK CEC_IRQHandler
386 SECTION .text:CODE:REORDER(1)
387 CEC_IRQHandler
388 B CEC_IRQHandler
389
390 PUBWEAK TIM12_IRQHandler
391 SECTION .text:CODE:REORDER(1)
392 TIM12_IRQHandler
393 B TIM12_IRQHandler
394
395 PUBWEAK TIM13_IRQHandler
396 SECTION .text:CODE:REORDER(1)
397 TIM13_IRQHandler
398 B TIM13_IRQHandler
399
400 PUBWEAK TIM14_IRQHandler
401 SECTION .text:CODE:REORDER(1)
402 TIM14_IRQHandler
403 B TIM14_IRQHandler
404
405 PUBWEAK TIM5_IRQHandler
406 SECTION .text:CODE:REORDER(1)
407 TIM5_IRQHandler
408 B TIM5_IRQHandler
409
410 PUBWEAK SPI3_IRQHandler
411 SECTION .text:CODE:REORDER(1)
412 SPI3_IRQHandler
413 B SPI3_IRQHandler
414
415 PUBWEAK UART4_IRQHandler
416 SECTION .text:CODE:REORDER(1)
417 UART4_IRQHandler
418 B UART4_IRQHandler
419
420 PUBWEAK UART5_IRQHandler
421 SECTION .text:CODE:REORDER(1)
422 UART5_IRQHandler
423 B UART5_IRQHandler
424
425 PUBWEAK TIM6_DAC_IRQHandler
426 SECTION .text:CODE:REORDER(1)
427 TIM6_DAC_IRQHandler
428 B TIM6_DAC_IRQHandler
429
430 PUBWEAK TIM7_IRQHandler
431 SECTION .text:CODE:REORDER(1)
432 TIM7_IRQHandler
433 B TIM7_IRQHandler
434
435 PUBWEAK DMA2_Channel1_IRQHandler
436 SECTION .text:CODE:REORDER(1)
437 DMA2_Channel1_IRQHandler
438 B DMA2_Channel1_IRQHandler
439
440 PUBWEAK DMA2_Channel2_IRQHandler
441 SECTION .text:CODE:REORDER(1)
442 DMA2_Channel2_IRQHandler
443 B DMA2_Channel2_IRQHandler
444
445 PUBWEAK DMA2_Channel3_IRQHandler
446 SECTION .text:CODE:REORDER(1)
447 DMA2_Channel3_IRQHandler
448 B DMA2_Channel3_IRQHandler
449
450 PUBWEAK DMA2_Channel4_5_IRQHandler
451 SECTION .text:CODE:REORDER(1)
452 DMA2_Channel4_5_IRQHandler
453 B DMA2_Channel4_5_IRQHandler
454
455 PUBWEAK DMA2_Channel5_IRQHandler
456 SECTION .text:CODE:REORDER(1)
457 DMA2_Channel5_IRQHandler
458 B DMA2_Channel5_IRQHandler
459
460 END
461 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/