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comparison libs/STM32F10x_StdPeriph_Lib_V3.5.0/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/arm/startup_stm32f10x_xl.s @ 0:c59513fd84fb
Initial commit of STM32 test code.
author | Daniel O'Connor <darius@dons.net.au> |
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date | Mon, 03 Oct 2011 21:19:15 +1030 |
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1 ;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** | |
2 ;* File Name : startup_stm32f10x_xl.s | |
3 ;* Author : MCD Application Team | |
4 ;* Version : V3.5.0 | |
5 ;* Date : 11-March-2011 | |
6 ;* Description : STM32F10x XL-Density Devices vector table for MDK-ARM | |
7 ;* toolchain. | |
8 ;* This module performs: | |
9 ;* - Set the initial SP | |
10 ;* - Set the initial PC == Reset_Handler | |
11 ;* - Set the vector table entries with the exceptions ISR address | |
12 ;* - Configure the clock system and also configure the external | |
13 ;* SRAM mounted on STM3210E-EVAL board to be used as data | |
14 ;* memory (optional, to be enabled by user) | |
15 ;* - Branches to __main in the C library (which eventually | |
16 ;* calls main()). | |
17 ;* After Reset the CortexM3 processor is in Thread mode, | |
18 ;* priority is Privileged, and the Stack is set to Main. | |
19 ;* <<< Use Configuration Wizard in Context Menu >>> | |
20 ;******************************************************************************* | |
21 ; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS | |
22 ; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. | |
23 ; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, | |
24 ; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE | |
25 ; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING | |
26 ; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. | |
27 ;******************************************************************************* | |
28 | |
29 ; Amount of memory (in bytes) allocated for Stack | |
30 ; Tailor this value to your application needs | |
31 ; <h> Stack Configuration | |
32 ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |
33 ; </h> | |
34 | |
35 Stack_Size EQU 0x00000400 | |
36 | |
37 AREA STACK, NOINIT, READWRITE, ALIGN=3 | |
38 Stack_Mem SPACE Stack_Size | |
39 __initial_sp | |
40 | |
41 ; <h> Heap Configuration | |
42 ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |
43 ; </h> | |
44 | |
45 Heap_Size EQU 0x00000200 | |
46 | |
47 AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |
48 __heap_base | |
49 Heap_Mem SPACE Heap_Size | |
50 __heap_limit | |
51 | |
52 PRESERVE8 | |
53 THUMB | |
54 | |
55 | |
56 ; Vector Table Mapped to Address 0 at Reset | |
57 AREA RESET, DATA, READONLY | |
58 EXPORT __Vectors | |
59 EXPORT __Vectors_End | |
60 EXPORT __Vectors_Size | |
61 | |
62 __Vectors DCD __initial_sp ; Top of Stack | |
63 DCD Reset_Handler ; Reset Handler | |
64 DCD NMI_Handler ; NMI Handler | |
65 DCD HardFault_Handler ; Hard Fault Handler | |
66 DCD MemManage_Handler ; MPU Fault Handler | |
67 DCD BusFault_Handler ; Bus Fault Handler | |
68 DCD UsageFault_Handler ; Usage Fault Handler | |
69 DCD 0 ; Reserved | |
70 DCD 0 ; Reserved | |
71 DCD 0 ; Reserved | |
72 DCD 0 ; Reserved | |
73 DCD SVC_Handler ; SVCall Handler | |
74 DCD DebugMon_Handler ; Debug Monitor Handler | |
75 DCD 0 ; Reserved | |
76 DCD PendSV_Handler ; PendSV Handler | |
77 DCD SysTick_Handler ; SysTick Handler | |
78 | |
79 ; External Interrupts | |
80 DCD WWDG_IRQHandler ; Window Watchdog | |
81 DCD PVD_IRQHandler ; PVD through EXTI Line detect | |
82 DCD TAMPER_IRQHandler ; Tamper | |
83 DCD RTC_IRQHandler ; RTC | |
84 DCD FLASH_IRQHandler ; Flash | |
85 DCD RCC_IRQHandler ; RCC | |
86 DCD EXTI0_IRQHandler ; EXTI Line 0 | |
87 DCD EXTI1_IRQHandler ; EXTI Line 1 | |
88 DCD EXTI2_IRQHandler ; EXTI Line 2 | |
89 DCD EXTI3_IRQHandler ; EXTI Line 3 | |
90 DCD EXTI4_IRQHandler ; EXTI Line 4 | |
91 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |
92 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 | |
93 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 | |
94 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 | |
95 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 | |
96 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 | |
97 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 | |
98 DCD ADC1_2_IRQHandler ; ADC1 & ADC2 | |
99 DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX | |
100 DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 | |
101 DCD CAN1_RX1_IRQHandler ; CAN1 RX1 | |
102 DCD CAN1_SCE_IRQHandler ; CAN1 SCE | |
103 DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 | |
104 DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9 | |
105 DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10 | |
106 DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11 | |
107 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare | |
108 DCD TIM2_IRQHandler ; TIM2 | |
109 DCD TIM3_IRQHandler ; TIM3 | |
110 DCD TIM4_IRQHandler ; TIM4 | |
111 DCD I2C1_EV_IRQHandler ; I2C1 Event | |
112 DCD I2C1_ER_IRQHandler ; I2C1 Error | |
113 DCD I2C2_EV_IRQHandler ; I2C2 Event | |
114 DCD I2C2_ER_IRQHandler ; I2C2 Error | |
115 DCD SPI1_IRQHandler ; SPI1 | |
116 DCD SPI2_IRQHandler ; SPI2 | |
117 DCD USART1_IRQHandler ; USART1 | |
118 DCD USART2_IRQHandler ; USART2 | |
119 DCD USART3_IRQHandler ; USART3 | |
120 DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 | |
121 DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line | |
122 DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend | |
123 DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12 | |
124 DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13 | |
125 DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14 | |
126 DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare | |
127 DCD ADC3_IRQHandler ; ADC3 | |
128 DCD FSMC_IRQHandler ; FSMC | |
129 DCD SDIO_IRQHandler ; SDIO | |
130 DCD TIM5_IRQHandler ; TIM5 | |
131 DCD SPI3_IRQHandler ; SPI3 | |
132 DCD UART4_IRQHandler ; UART4 | |
133 DCD UART5_IRQHandler ; UART5 | |
134 DCD TIM6_IRQHandler ; TIM6 | |
135 DCD TIM7_IRQHandler ; TIM7 | |
136 DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1 | |
137 DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2 | |
138 DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3 | |
139 DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5 | |
140 __Vectors_End | |
141 | |
142 __Vectors_Size EQU __Vectors_End - __Vectors | |
143 | |
144 AREA |.text|, CODE, READONLY | |
145 | |
146 ; Reset handler | |
147 Reset_Handler PROC | |
148 EXPORT Reset_Handler [WEAK] | |
149 IMPORT __main | |
150 IMPORT SystemInit | |
151 LDR R0, =SystemInit | |
152 BLX R0 | |
153 LDR R0, =__main | |
154 BX R0 | |
155 ENDP | |
156 | |
157 ; Dummy Exception Handlers (infinite loops which can be modified) | |
158 | |
159 NMI_Handler PROC | |
160 EXPORT NMI_Handler [WEAK] | |
161 B . | |
162 ENDP | |
163 HardFault_Handler\ | |
164 PROC | |
165 EXPORT HardFault_Handler [WEAK] | |
166 B . | |
167 ENDP | |
168 MemManage_Handler\ | |
169 PROC | |
170 EXPORT MemManage_Handler [WEAK] | |
171 B . | |
172 ENDP | |
173 BusFault_Handler\ | |
174 PROC | |
175 EXPORT BusFault_Handler [WEAK] | |
176 B . | |
177 ENDP | |
178 UsageFault_Handler\ | |
179 PROC | |
180 EXPORT UsageFault_Handler [WEAK] | |
181 B . | |
182 ENDP | |
183 SVC_Handler PROC | |
184 EXPORT SVC_Handler [WEAK] | |
185 B . | |
186 ENDP | |
187 DebugMon_Handler\ | |
188 PROC | |
189 EXPORT DebugMon_Handler [WEAK] | |
190 B . | |
191 ENDP | |
192 PendSV_Handler PROC | |
193 EXPORT PendSV_Handler [WEAK] | |
194 B . | |
195 ENDP | |
196 SysTick_Handler PROC | |
197 EXPORT SysTick_Handler [WEAK] | |
198 B . | |
199 ENDP | |
200 | |
201 Default_Handler PROC | |
202 | |
203 EXPORT WWDG_IRQHandler [WEAK] | |
204 EXPORT PVD_IRQHandler [WEAK] | |
205 EXPORT TAMPER_IRQHandler [WEAK] | |
206 EXPORT RTC_IRQHandler [WEAK] | |
207 EXPORT FLASH_IRQHandler [WEAK] | |
208 EXPORT RCC_IRQHandler [WEAK] | |
209 EXPORT EXTI0_IRQHandler [WEAK] | |
210 EXPORT EXTI1_IRQHandler [WEAK] | |
211 EXPORT EXTI2_IRQHandler [WEAK] | |
212 EXPORT EXTI3_IRQHandler [WEAK] | |
213 EXPORT EXTI4_IRQHandler [WEAK] | |
214 EXPORT DMA1_Channel1_IRQHandler [WEAK] | |
215 EXPORT DMA1_Channel2_IRQHandler [WEAK] | |
216 EXPORT DMA1_Channel3_IRQHandler [WEAK] | |
217 EXPORT DMA1_Channel4_IRQHandler [WEAK] | |
218 EXPORT DMA1_Channel5_IRQHandler [WEAK] | |
219 EXPORT DMA1_Channel6_IRQHandler [WEAK] | |
220 EXPORT DMA1_Channel7_IRQHandler [WEAK] | |
221 EXPORT ADC1_2_IRQHandler [WEAK] | |
222 EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK] | |
223 EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK] | |
224 EXPORT CAN1_RX1_IRQHandler [WEAK] | |
225 EXPORT CAN1_SCE_IRQHandler [WEAK] | |
226 EXPORT EXTI9_5_IRQHandler [WEAK] | |
227 EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK] | |
228 EXPORT TIM1_UP_TIM10_IRQHandler [WEAK] | |
229 EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK] | |
230 EXPORT TIM1_CC_IRQHandler [WEAK] | |
231 EXPORT TIM2_IRQHandler [WEAK] | |
232 EXPORT TIM3_IRQHandler [WEAK] | |
233 EXPORT TIM4_IRQHandler [WEAK] | |
234 EXPORT I2C1_EV_IRQHandler [WEAK] | |
235 EXPORT I2C1_ER_IRQHandler [WEAK] | |
236 EXPORT I2C2_EV_IRQHandler [WEAK] | |
237 EXPORT I2C2_ER_IRQHandler [WEAK] | |
238 EXPORT SPI1_IRQHandler [WEAK] | |
239 EXPORT SPI2_IRQHandler [WEAK] | |
240 EXPORT USART1_IRQHandler [WEAK] | |
241 EXPORT USART2_IRQHandler [WEAK] | |
242 EXPORT USART3_IRQHandler [WEAK] | |
243 EXPORT EXTI15_10_IRQHandler [WEAK] | |
244 EXPORT RTCAlarm_IRQHandler [WEAK] | |
245 EXPORT USBWakeUp_IRQHandler [WEAK] | |
246 EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK] | |
247 EXPORT TIM8_UP_TIM13_IRQHandler [WEAK] | |
248 EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK] | |
249 EXPORT TIM8_CC_IRQHandler [WEAK] | |
250 EXPORT ADC3_IRQHandler [WEAK] | |
251 EXPORT FSMC_IRQHandler [WEAK] | |
252 EXPORT SDIO_IRQHandler [WEAK] | |
253 EXPORT TIM5_IRQHandler [WEAK] | |
254 EXPORT SPI3_IRQHandler [WEAK] | |
255 EXPORT UART4_IRQHandler [WEAK] | |
256 EXPORT UART5_IRQHandler [WEAK] | |
257 EXPORT TIM6_IRQHandler [WEAK] | |
258 EXPORT TIM7_IRQHandler [WEAK] | |
259 EXPORT DMA2_Channel1_IRQHandler [WEAK] | |
260 EXPORT DMA2_Channel2_IRQHandler [WEAK] | |
261 EXPORT DMA2_Channel3_IRQHandler [WEAK] | |
262 EXPORT DMA2_Channel4_5_IRQHandler [WEAK] | |
263 | |
264 WWDG_IRQHandler | |
265 PVD_IRQHandler | |
266 TAMPER_IRQHandler | |
267 RTC_IRQHandler | |
268 FLASH_IRQHandler | |
269 RCC_IRQHandler | |
270 EXTI0_IRQHandler | |
271 EXTI1_IRQHandler | |
272 EXTI2_IRQHandler | |
273 EXTI3_IRQHandler | |
274 EXTI4_IRQHandler | |
275 DMA1_Channel1_IRQHandler | |
276 DMA1_Channel2_IRQHandler | |
277 DMA1_Channel3_IRQHandler | |
278 DMA1_Channel4_IRQHandler | |
279 DMA1_Channel5_IRQHandler | |
280 DMA1_Channel6_IRQHandler | |
281 DMA1_Channel7_IRQHandler | |
282 ADC1_2_IRQHandler | |
283 USB_HP_CAN1_TX_IRQHandler | |
284 USB_LP_CAN1_RX0_IRQHandler | |
285 CAN1_RX1_IRQHandler | |
286 CAN1_SCE_IRQHandler | |
287 EXTI9_5_IRQHandler | |
288 TIM1_BRK_TIM9_IRQHandler | |
289 TIM1_UP_TIM10_IRQHandler | |
290 TIM1_TRG_COM_TIM11_IRQHandler | |
291 TIM1_CC_IRQHandler | |
292 TIM2_IRQHandler | |
293 TIM3_IRQHandler | |
294 TIM4_IRQHandler | |
295 I2C1_EV_IRQHandler | |
296 I2C1_ER_IRQHandler | |
297 I2C2_EV_IRQHandler | |
298 I2C2_ER_IRQHandler | |
299 SPI1_IRQHandler | |
300 SPI2_IRQHandler | |
301 USART1_IRQHandler | |
302 USART2_IRQHandler | |
303 USART3_IRQHandler | |
304 EXTI15_10_IRQHandler | |
305 RTCAlarm_IRQHandler | |
306 USBWakeUp_IRQHandler | |
307 TIM8_BRK_TIM12_IRQHandler | |
308 TIM8_UP_TIM13_IRQHandler | |
309 TIM8_TRG_COM_TIM14_IRQHandler | |
310 TIM8_CC_IRQHandler | |
311 ADC3_IRQHandler | |
312 FSMC_IRQHandler | |
313 SDIO_IRQHandler | |
314 TIM5_IRQHandler | |
315 SPI3_IRQHandler | |
316 UART4_IRQHandler | |
317 UART5_IRQHandler | |
318 TIM6_IRQHandler | |
319 TIM7_IRQHandler | |
320 DMA2_Channel1_IRQHandler | |
321 DMA2_Channel2_IRQHandler | |
322 DMA2_Channel3_IRQHandler | |
323 DMA2_Channel4_5_IRQHandler | |
324 B . | |
325 | |
326 ENDP | |
327 | |
328 ALIGN | |
329 | |
330 ;******************************************************************************* | |
331 ; User Stack and Heap initialization | |
332 ;******************************************************************************* | |
333 IF :DEF:__MICROLIB | |
334 | |
335 EXPORT __initial_sp | |
336 EXPORT __heap_base | |
337 EXPORT __heap_limit | |
338 | |
339 ELSE | |
340 | |
341 IMPORT __use_two_region_memory | |
342 EXPORT __user_initial_stackheap | |
343 | |
344 __user_initial_stackheap | |
345 | |
346 LDR R0, = Heap_Mem | |
347 LDR R1, =(Stack_Mem + Stack_Size) | |
348 LDR R2, = (Heap_Mem + Heap_Size) | |
349 LDR R3, = Stack_Mem | |
350 BX LR | |
351 | |
352 ALIGN | |
353 | |
354 ENDIF | |
355 | |
356 END | |
357 | |
358 ;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE***** |