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Initial commit of STM32 test code.
author Daniel O'Connor <darius@dons.net.au>
date Mon, 03 Oct 2011 21:19:15 +1030
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1 ;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
2 ;* File Name : startup_stm32f10x_md_vl.s
3 ;* Author : MCD Application Team
4 ;* Version : V3.5.0
5 ;* Date : 11-March-2011
6 ;* Description : STM32F10x Medium Density Value Line Devices vector table
7 ;* for MDK-ARM toolchain.
8 ;* This module performs:
9 ;* - Set the initial SP
10 ;* - Set the initial PC == Reset_Handler
11 ;* - Set the vector table entries with the exceptions ISR address
12 ;* - Configure the clock system
13 ;* - Branches to __main in the C library (which eventually
14 ;* calls main()).
15 ;* After Reset the CortexM3 processor is in Thread mode,
16 ;* priority is Privileged, and the Stack is set to Main.
17 ;* <<< Use Configuration Wizard in Context Menu >>>
18 ;*******************************************************************************
19 ; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
20 ; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
21 ; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
22 ; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
23 ; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
24 ; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
25 ;*******************************************************************************
26
27 ; Amount of memory (in bytes) allocated for Stack
28 ; Tailor this value to your application needs
29 ; <h> Stack Configuration
30 ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
31 ; </h>
32
33 Stack_Size EQU 0x00000400
34
35 AREA STACK, NOINIT, READWRITE, ALIGN=3
36 Stack_Mem SPACE Stack_Size
37 __initial_sp
38
39
40 ; <h> Heap Configuration
41 ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
42 ; </h>
43
44 Heap_Size EQU 0x00000200
45
46 AREA HEAP, NOINIT, READWRITE, ALIGN=3
47 __heap_base
48 Heap_Mem SPACE Heap_Size
49 __heap_limit
50
51 PRESERVE8
52 THUMB
53
54
55 ; Vector Table Mapped to Address 0 at Reset
56 AREA RESET, DATA, READONLY
57 EXPORT __Vectors
58 EXPORT __Vectors_End
59 EXPORT __Vectors_Size
60
61 __Vectors DCD __initial_sp ; Top of Stack
62 DCD Reset_Handler ; Reset Handler
63 DCD NMI_Handler ; NMI Handler
64 DCD HardFault_Handler ; Hard Fault Handler
65 DCD MemManage_Handler ; MPU Fault Handler
66 DCD BusFault_Handler ; Bus Fault Handler
67 DCD UsageFault_Handler ; Usage Fault Handler
68 DCD 0 ; Reserved
69 DCD 0 ; Reserved
70 DCD 0 ; Reserved
71 DCD 0 ; Reserved
72 DCD SVC_Handler ; SVCall Handler
73 DCD DebugMon_Handler ; Debug Monitor Handler
74 DCD 0 ; Reserved
75 DCD PendSV_Handler ; PendSV Handler
76 DCD SysTick_Handler ; SysTick Handler
77
78 ; External Interrupts
79 DCD WWDG_IRQHandler ; Window Watchdog
80 DCD PVD_IRQHandler ; PVD through EXTI Line detect
81 DCD TAMPER_IRQHandler ; Tamper
82 DCD RTC_IRQHandler ; RTC
83 DCD FLASH_IRQHandler ; Flash
84 DCD RCC_IRQHandler ; RCC
85 DCD EXTI0_IRQHandler ; EXTI Line 0
86 DCD EXTI1_IRQHandler ; EXTI Line 1
87 DCD EXTI2_IRQHandler ; EXTI Line 2
88 DCD EXTI3_IRQHandler ; EXTI Line 3
89 DCD EXTI4_IRQHandler ; EXTI Line 4
90 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
91 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
92 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
93 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
94 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
95 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
96 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
97 DCD ADC1_IRQHandler ; ADC1
98 DCD 0 ; Reserved
99 DCD 0 ; Reserved
100 DCD 0 ; Reserved
101 DCD 0 ; Reserved
102 DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
103 DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
104 DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
105 DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17
106 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
107 DCD TIM2_IRQHandler ; TIM2
108 DCD TIM3_IRQHandler ; TIM3
109 DCD TIM4_IRQHandler ; TIM4
110 DCD I2C1_EV_IRQHandler ; I2C1 Event
111 DCD I2C1_ER_IRQHandler ; I2C1 Error
112 DCD I2C2_EV_IRQHandler ; I2C2 Event
113 DCD I2C2_ER_IRQHandler ; I2C2 Error
114 DCD SPI1_IRQHandler ; SPI1
115 DCD SPI2_IRQHandler ; SPI2
116 DCD USART1_IRQHandler ; USART1
117 DCD USART2_IRQHandler ; USART2
118 DCD USART3_IRQHandler ; USART3
119 DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
120 DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
121 DCD CEC_IRQHandler ; HDMI-CEC
122 DCD 0 ; Reserved
123 DCD 0 ; Reserved
124 DCD 0 ; Reserved
125 DCD 0 ; Reserved
126 DCD 0 ; Reserved
127 DCD 0 ; Reserved
128 DCD 0 ; Reserved
129 DCD 0 ; Reserved
130 DCD 0 ; Reserved
131 DCD 0 ; Reserved
132 DCD 0 ; Reserved
133 DCD TIM6_DAC_IRQHandler ; TIM6 and DAC underrun
134 DCD TIM7_IRQHandler ; TIM7
135 __Vectors_End
136
137 __Vectors_Size EQU __Vectors_End - __Vectors
138
139 AREA |.text|, CODE, READONLY
140
141 ; Reset handler
142 Reset_Handler PROC
143 EXPORT Reset_Handler [WEAK]
144 IMPORT __main
145 IMPORT SystemInit
146 LDR R0, =SystemInit
147 BLX R0
148 LDR R0, =__main
149 BX R0
150 ENDP
151
152 ; Dummy Exception Handlers (infinite loops which can be modified)
153
154 NMI_Handler PROC
155 EXPORT NMI_Handler [WEAK]
156 B .
157 ENDP
158 HardFault_Handler\
159 PROC
160 EXPORT HardFault_Handler [WEAK]
161 B .
162 ENDP
163 MemManage_Handler\
164 PROC
165 EXPORT MemManage_Handler [WEAK]
166 B .
167 ENDP
168 BusFault_Handler\
169 PROC
170 EXPORT BusFault_Handler [WEAK]
171 B .
172 ENDP
173 UsageFault_Handler\
174 PROC
175 EXPORT UsageFault_Handler [WEAK]
176 B .
177 ENDP
178 SVC_Handler PROC
179 EXPORT SVC_Handler [WEAK]
180 B .
181 ENDP
182 DebugMon_Handler\
183 PROC
184 EXPORT DebugMon_Handler [WEAK]
185 B .
186 ENDP
187 PendSV_Handler PROC
188 EXPORT PendSV_Handler [WEAK]
189 B .
190 ENDP
191 SysTick_Handler PROC
192 EXPORT SysTick_Handler [WEAK]
193 B .
194 ENDP
195
196 Default_Handler PROC
197
198 EXPORT WWDG_IRQHandler [WEAK]
199 EXPORT PVD_IRQHandler [WEAK]
200 EXPORT TAMPER_IRQHandler [WEAK]
201 EXPORT RTC_IRQHandler [WEAK]
202 EXPORT FLASH_IRQHandler [WEAK]
203 EXPORT RCC_IRQHandler [WEAK]
204 EXPORT EXTI0_IRQHandler [WEAK]
205 EXPORT EXTI1_IRQHandler [WEAK]
206 EXPORT EXTI2_IRQHandler [WEAK]
207 EXPORT EXTI3_IRQHandler [WEAK]
208 EXPORT EXTI4_IRQHandler [WEAK]
209 EXPORT DMA1_Channel1_IRQHandler [WEAK]
210 EXPORT DMA1_Channel2_IRQHandler [WEAK]
211 EXPORT DMA1_Channel3_IRQHandler [WEAK]
212 EXPORT DMA1_Channel4_IRQHandler [WEAK]
213 EXPORT DMA1_Channel5_IRQHandler [WEAK]
214 EXPORT DMA1_Channel6_IRQHandler [WEAK]
215 EXPORT DMA1_Channel7_IRQHandler [WEAK]
216 EXPORT ADC1_IRQHandler [WEAK]
217 EXPORT EXTI9_5_IRQHandler [WEAK]
218 EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
219 EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
220 EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
221 EXPORT TIM1_CC_IRQHandler [WEAK]
222 EXPORT TIM2_IRQHandler [WEAK]
223 EXPORT TIM3_IRQHandler [WEAK]
224 EXPORT TIM4_IRQHandler [WEAK]
225 EXPORT I2C1_EV_IRQHandler [WEAK]
226 EXPORT I2C1_ER_IRQHandler [WEAK]
227 EXPORT I2C2_EV_IRQHandler [WEAK]
228 EXPORT I2C2_ER_IRQHandler [WEAK]
229 EXPORT SPI1_IRQHandler [WEAK]
230 EXPORT SPI2_IRQHandler [WEAK]
231 EXPORT USART1_IRQHandler [WEAK]
232 EXPORT USART2_IRQHandler [WEAK]
233 EXPORT USART3_IRQHandler [WEAK]
234 EXPORT EXTI15_10_IRQHandler [WEAK]
235 EXPORT RTCAlarm_IRQHandler [WEAK]
236 EXPORT CEC_IRQHandler [WEAK]
237 EXPORT TIM6_DAC_IRQHandler [WEAK]
238 EXPORT TIM7_IRQHandler [WEAK]
239
240 WWDG_IRQHandler
241 PVD_IRQHandler
242 TAMPER_IRQHandler
243 RTC_IRQHandler
244 FLASH_IRQHandler
245 RCC_IRQHandler
246 EXTI0_IRQHandler
247 EXTI1_IRQHandler
248 EXTI2_IRQHandler
249 EXTI3_IRQHandler
250 EXTI4_IRQHandler
251 DMA1_Channel1_IRQHandler
252 DMA1_Channel2_IRQHandler
253 DMA1_Channel3_IRQHandler
254 DMA1_Channel4_IRQHandler
255 DMA1_Channel5_IRQHandler
256 DMA1_Channel6_IRQHandler
257 DMA1_Channel7_IRQHandler
258 ADC1_IRQHandler
259 EXTI9_5_IRQHandler
260 TIM1_BRK_TIM15_IRQHandler
261 TIM1_UP_TIM16_IRQHandler
262 TIM1_TRG_COM_TIM17_IRQHandler
263 TIM1_CC_IRQHandler
264 TIM2_IRQHandler
265 TIM3_IRQHandler
266 TIM4_IRQHandler
267 I2C1_EV_IRQHandler
268 I2C1_ER_IRQHandler
269 I2C2_EV_IRQHandler
270 I2C2_ER_IRQHandler
271 SPI1_IRQHandler
272 SPI2_IRQHandler
273 USART1_IRQHandler
274 USART2_IRQHandler
275 USART3_IRQHandler
276 EXTI15_10_IRQHandler
277 RTCAlarm_IRQHandler
278 CEC_IRQHandler
279 TIM6_DAC_IRQHandler
280 TIM7_IRQHandler
281 B .
282
283 ENDP
284
285 ALIGN
286
287 ;*******************************************************************************
288 ; User Stack and Heap initialization
289 ;*******************************************************************************
290 IF :DEF:__MICROLIB
291
292 EXPORT __initial_sp
293 EXPORT __heap_base
294 EXPORT __heap_limit
295
296 ELSE
297
298 IMPORT __use_two_region_memory
299 EXPORT __user_initial_stackheap
300
301 __user_initial_stackheap
302
303 LDR R0, = Heap_Mem
304 LDR R1, =(Stack_Mem + Stack_Size)
305 LDR R2, = (Heap_Mem + Heap_Size)
306 LDR R3, = Stack_Mem
307 BX LR
308
309 ALIGN
310
311 ENDIF
312
313 END
314
315 ;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****