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comparison libs/STM32F10x_StdPeriph_Lib_V3.5.0/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/TrueSTUDIO/startup_stm32f10x_ld_vl.s @ 0:c59513fd84fb

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Initial commit of STM32 test code.
author Daniel O'Connor <darius@dons.net.au>
date Mon, 03 Oct 2011 21:19:15 +1030
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1 /**
2 ******************************************************************************
3 * @file startup_stm32f10x_ld_vl.s
4 * @author MCD Application Team
5 * @version V3.5.0
6 * @date 11-March-2011
7 * @brief STM32F10x Low Density Value Line Devices vector table for Atollic toolchain.
8 * This module performs:
9 * - Set the initial SP
10 * - Set the initial PC == Reset_Handler,
11 * - Set the vector table entries with the exceptions ISR address
12 * - Configure the clock system
13 * - Branches to main in the C library (which eventually
14 * calls main()).
15 * After Reset the Cortex-M3 processor is in Thread mode,
16 * priority is Privileged, and the Stack is set to Main.
17 ******************************************************************************
18 * @attention
19 *
20 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
21 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
22 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
23 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
24 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
25 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
26 *
27 * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
28 ******************************************************************************
29 */
30
31 .syntax unified
32 .cpu cortex-m3
33 .fpu softvfp
34 .thumb
35
36 .global g_pfnVectors
37 .global Default_Handler
38
39 /* start address for the initialization values of the .data section.
40 defined in linker script */
41 .word _sidata
42 /* start address for the .data section. defined in linker script */
43 .word _sdata
44 /* end address for the .data section. defined in linker script */
45 .word _edata
46 /* start address for the .bss section. defined in linker script */
47 .word _sbss
48 /* end address for the .bss section. defined in linker script */
49 .word _ebss
50
51 .equ BootRAM, 0xF108F85F
52 /**
53 * @brief This is the code that gets called when the processor first
54 * starts execution following a reset event. Only the absolutely
55 * necessary set is performed, after which the application
56 * supplied main() routine is called.
57 * @param None
58 * @retval : None
59 */
60
61 .section .text.Reset_Handler
62 .weak Reset_Handler
63 .type Reset_Handler, %function
64 Reset_Handler:
65
66 /* Copy the data segment initializers from flash to SRAM */
67 movs r1, #0
68 b LoopCopyDataInit
69
70 CopyDataInit:
71 ldr r3, =_sidata
72 ldr r3, [r3, r1]
73 str r3, [r0, r1]
74 adds r1, r1, #4
75
76 LoopCopyDataInit:
77 ldr r0, =_sdata
78 ldr r3, =_edata
79 adds r2, r0, r1
80 cmp r2, r3
81 bcc CopyDataInit
82 ldr r2, =_sbss
83 b LoopFillZerobss
84 /* Zero fill the bss segment. */
85 FillZerobss:
86 movs r3, #0
87 str r3, [r2], #4
88
89 LoopFillZerobss:
90 ldr r3, = _ebss
91 cmp r2, r3
92 bcc FillZerobss
93
94 /* Call the clock system intitialization function.*/
95 bl SystemInit
96 /* Call static constructors */
97 bl __libc_init_array
98 /* Call the application's entry point.*/
99 bl main
100 bx lr
101 .size Reset_Handler, .-Reset_Handler
102
103 /**
104 * @brief This is the code that gets called when the processor receives an
105 * unexpected interrupt. This simply enters an infinite loop, preserving
106 * the system state for examination by a debugger.
107 *
108 * @param None
109 * @retval : None
110 */
111 .section .text.Default_Handler,"ax",%progbits
112 Default_Handler:
113 Infinite_Loop:
114 b Infinite_Loop
115 .size Default_Handler, .-Default_Handler
116 /******************************************************************************
117 *
118 * The minimal vector table for a Cortex M3. Note that the proper constructs
119 * must be placed on this to ensure that it ends up at physical address
120 * 0x0000.0000.
121 *
122 ******************************************************************************/
123 .section .isr_vector,"a",%progbits
124 .type g_pfnVectors, %object
125 .size g_pfnVectors, .-g_pfnVectors
126
127
128 g_pfnVectors:
129 .word _estack
130 .word Reset_Handler
131 .word NMI_Handler
132 .word HardFault_Handler
133 .word MemManage_Handler
134 .word BusFault_Handler
135 .word UsageFault_Handler
136 .word 0
137 .word 0
138 .word 0
139 .word 0
140 .word SVC_Handler
141 .word DebugMon_Handler
142 .word 0
143 .word PendSV_Handler
144 .word SysTick_Handler
145 .word WWDG_IRQHandler
146 .word PVD_IRQHandler
147 .word TAMPER_IRQHandler
148 .word RTC_IRQHandler
149 .word FLASH_IRQHandler
150 .word RCC_IRQHandler
151 .word EXTI0_IRQHandler
152 .word EXTI1_IRQHandler
153 .word EXTI2_IRQHandler
154 .word EXTI3_IRQHandler
155 .word EXTI4_IRQHandler
156 .word DMA1_Channel1_IRQHandler
157 .word DMA1_Channel2_IRQHandler
158 .word DMA1_Channel3_IRQHandler
159 .word DMA1_Channel4_IRQHandler
160 .word DMA1_Channel5_IRQHandler
161 .word DMA1_Channel6_IRQHandler
162 .word DMA1_Channel7_IRQHandler
163 .word ADC1_IRQHandler
164 .word 0
165 .word 0
166 .word 0
167 .word 0
168 .word EXTI9_5_IRQHandler
169 .word TIM1_BRK_TIM15_IRQHandler
170 .word TIM1_UP_TIM16_IRQHandler
171 .word TIM1_TRG_COM_TIM17_IRQHandler
172 .word TIM1_CC_IRQHandler
173 .word TIM2_IRQHandler
174 .word TIM3_IRQHandler
175 .word 0
176 .word I2C1_EV_IRQHandler
177 .word I2C1_ER_IRQHandler
178 .word 0
179 .word 0
180 .word SPI1_IRQHandler
181 .word 0
182 .word USART1_IRQHandler
183 .word USART2_IRQHandler
184 .word 0
185 .word EXTI15_10_IRQHandler
186 .word RTCAlarm_IRQHandler
187 .word CEC_IRQHandler
188 .word 0
189 .word 0
190 .word 0
191 .word 0
192 .word 0
193 .word 0
194 .word 0
195 .word 0
196 .word 0
197 .word 0
198 .word 0
199 .word TIM6_DAC_IRQHandler
200 .word TIM7_IRQHandler
201 .word 0
202 .word 0
203 .word 0
204 .word 0
205 .word 0
206 .word 0
207 .word 0
208 .word 0
209 .word 0
210 .word 0
211 .word 0
212 .word 0
213 .word 0
214 .word 0
215 .word 0
216 .word 0
217 .word 0
218 .word 0
219 .word 0
220 .word 0
221 .word 0
222 .word 0
223 .word 0
224 .word 0
225 .word 0
226 .word 0
227 .word 0
228 .word 0
229 .word 0
230 .word 0
231 .word 0
232 .word 0
233 .word 0
234 .word 0
235 .word 0
236 .word 0
237 .word 0
238 .word 0
239 .word 0
240 .word 0
241 .word 0
242 .word 0
243 .word 0
244 .word BootRAM /* @0x01CC. This is for boot in RAM mode for
245 STM32F10x Medium Value Line Density devices. */
246
247 /*******************************************************************************
248 *
249 * Provide weak aliases for each Exception handler to the Default_Handler.
250 * As they are weak aliases, any function with the same name will override
251 * this definition.
252 *
253 *******************************************************************************/
254
255
256 .weak NMI_Handler
257 .thumb_set NMI_Handler,Default_Handler
258
259 .weak HardFault_Handler
260 .thumb_set HardFault_Handler,Default_Handler
261
262 .weak MemManage_Handler
263 .thumb_set MemManage_Handler,Default_Handler
264
265 .weak BusFault_Handler
266 .thumb_set BusFault_Handler,Default_Handler
267
268 .weak UsageFault_Handler
269 .thumb_set UsageFault_Handler,Default_Handler
270
271 .weak SVC_Handler
272 .thumb_set SVC_Handler,Default_Handler
273
274 .weak DebugMon_Handler
275 .thumb_set DebugMon_Handler,Default_Handler
276
277 .weak PendSV_Handler
278 .thumb_set PendSV_Handler,Default_Handler
279
280 .weak SysTick_Handler
281 .thumb_set SysTick_Handler,Default_Handler
282
283 .weak WWDG_IRQHandler
284 .thumb_set WWDG_IRQHandler,Default_Handler
285
286 .weak PVD_IRQHandler
287 .thumb_set PVD_IRQHandler,Default_Handler
288
289 .weak TAMPER_IRQHandler
290 .thumb_set TAMPER_IRQHandler,Default_Handler
291
292 .weak RTC_IRQHandler
293 .thumb_set RTC_IRQHandler,Default_Handler
294
295 .weak FLASH_IRQHandler
296 .thumb_set FLASH_IRQHandler,Default_Handler
297
298 .weak RCC_IRQHandler
299 .thumb_set RCC_IRQHandler,Default_Handler
300
301 .weak EXTI0_IRQHandler
302 .thumb_set EXTI0_IRQHandler,Default_Handler
303
304 .weak EXTI1_IRQHandler
305 .thumb_set EXTI1_IRQHandler,Default_Handler
306
307 .weak EXTI2_IRQHandler
308 .thumb_set EXTI2_IRQHandler,Default_Handler
309
310 .weak EXTI3_IRQHandler
311 .thumb_set EXTI3_IRQHandler,Default_Handler
312
313 .weak EXTI4_IRQHandler
314 .thumb_set EXTI4_IRQHandler,Default_Handler
315
316 .weak DMA1_Channel1_IRQHandler
317 .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
318
319 .weak DMA1_Channel2_IRQHandler
320 .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
321
322 .weak DMA1_Channel3_IRQHandler
323 .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
324
325 .weak DMA1_Channel4_IRQHandler
326 .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
327
328 .weak DMA1_Channel5_IRQHandler
329 .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
330
331 .weak DMA1_Channel6_IRQHandler
332 .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
333
334 .weak DMA1_Channel7_IRQHandler
335 .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
336
337 .weak ADC1_IRQHandler
338 .thumb_set ADC1_IRQHandler,Default_Handler
339
340 .weak EXTI9_5_IRQHandler
341 .thumb_set EXTI9_5_IRQHandler,Default_Handler
342
343 .weak TIM1_BRK_TIM15_IRQHandler
344 .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
345
346 .weak TIM1_UP_TIM16_IRQHandler
347 .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
348
349 .weak TIM1_TRG_COM_TIM17_IRQHandler
350 .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
351
352 .weak TIM1_CC_IRQHandler
353 .thumb_set TIM1_CC_IRQHandler,Default_Handler
354
355 .weak TIM2_IRQHandler
356 .thumb_set TIM2_IRQHandler,Default_Handler
357
358 .weak TIM3_IRQHandler
359 .thumb_set TIM3_IRQHandler,Default_Handler
360
361 .weak I2C1_EV_IRQHandler
362 .thumb_set I2C1_EV_IRQHandler,Default_Handler
363
364 .weak I2C1_ER_IRQHandler
365 .thumb_set I2C1_ER_IRQHandler,Default_Handler
366
367 .weak SPI1_IRQHandler
368 .thumb_set SPI1_IRQHandler,Default_Handler
369
370 .weak USART1_IRQHandler
371 .thumb_set USART1_IRQHandler,Default_Handler
372
373 .weak USART2_IRQHandler
374 .thumb_set USART2_IRQHandler,Default_Handler
375
376 .weak EXTI15_10_IRQHandler
377 .thumb_set EXTI15_10_IRQHandler,Default_Handler
378
379 .weak RTCAlarm_IRQHandler
380 .thumb_set RTCAlarm_IRQHandler,Default_Handler
381
382 .weak CEC_IRQHandler
383 .thumb_set CEC_IRQHandler,Default_Handler
384
385 .weak TIM6_DAC_IRQHandler
386 .thumb_set TIM6_DAC_IRQHandler,Default_Handler
387
388 .weak TIM7_IRQHandler
389 .thumb_set TIM7_IRQHandler,Default_Handler
390
391 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
392