Mercurial > ~darius > hgwebdir.cgi > stm32temp
comparison hw.c @ 62:bb52e6dad784
The LCD works better when the GPIO clocks are enabled before frobbing them.
PWM doesn't work for some reason, just hard on for now.
author | Daniel O'Connor <darius@dons.net.au> |
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date | Tue, 09 Apr 2013 00:28:29 +0930 |
parents | ace431a0d0f5 |
children | 345a42f6151b |
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61:9c5db7fee912 | 62:bb52e6dad784 |
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25 SPI_InitTypeDef SPI_InitStructure; | 25 SPI_InitTypeDef SPI_InitStructure; |
26 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; | 26 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; |
27 USART_InitTypeDef USART_InitStructure; | 27 USART_InitTypeDef USART_InitStructure; |
28 | 28 |
29 /* Enable clocks */ | 29 /* Enable clocks */ |
30 RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP | RCC_APB1Periph_TIM4 | RCC_APB1Periph_I2C1, | 30 RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP | |
31 RCC_APB1Periph_TIM4 | RCC_APB1Periph_I2C1, | |
31 ENABLE); | 32 ENABLE); |
32 | 33 |
33 RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOB | | 34 RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA | |
35 RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOB | | |
36 RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD | | |
34 RCC_APB2Periph_GPIOE | RCC_APB2Periph_SPI1, ENABLE); | 37 RCC_APB2Periph_GPIOE | RCC_APB2Periph_SPI1, ENABLE); |
35 | 38 |
36 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC | RCC_AHBPeriph_CRC, ENABLE); | 39 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC | RCC_AHBPeriph_CRC | |
40 RCC_AHBPeriph_SDIO | RCC_AHBPeriph_DMA2, ENABLE); | |
41 | |
37 | 42 |
38 /* Allow access to BKP Domain */ | 43 /* Allow access to BKP Domain */ |
39 PWR_BackupAccessCmd(ENABLE); | 44 PWR_BackupAccessCmd(ENABLE); |
40 | 45 |
41 /* Reset Backup Domain | 46 /* Reset Backup Domain |
139 /* Enable timer function | 144 /* Enable timer function |
140 * Note source clock is SYSCLK / 2 = 36MHz | 145 * Note source clock is SYSCLK / 2 = 36MHz |
141 */ | 146 */ |
142 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13; | 147 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13; |
143 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; | 148 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
144 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; | 149 // XXX: PWM not working |
150 //GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; | |
151 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; | |
145 GPIO_Init(GPIOD, &GPIO_InitStructure); | 152 GPIO_Init(GPIOD, &GPIO_InitStructure); |
146 | 153 GPIO_SetBits(GPIOD, GPIO_Pin_13); |
154 | |
147 /* Remap TIM4_CH2 to PD13 */ | 155 /* Remap TIM4_CH2 to PD13 */ |
148 GPIO_PinRemapConfig(GPIO_Remap_TIM4, ENABLE); | 156 GPIO_PinRemapConfig(GPIO_Remap_TIM4, ENABLE); |
149 | 157 |
150 /* Reset TIM4 */ | 158 /* Reset TIM4 */ |
151 TIM_DeInit(TIM4); | 159 TIM_DeInit(TIM4); |
300 | 308 |
301 /* Setup SDIO | 309 /* Setup SDIO |
302 * See SD_LowLevelInit from libs/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM3210E_EVAL/stm3210e_eval.c | 310 * See SD_LowLevelInit from libs/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM3210E_EVAL/stm3210e_eval.c |
303 */ | 311 */ |
304 | 312 |
305 /* GPIOC and GPIOD Periph clock enable */ | |
306 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD, ENABLE); | |
307 | |
308 /* Configure SDIO pins for AF | 313 /* Configure SDIO pins for AF |
309 PC8 -> SD0 | 314 PC8 -> SD0 |
310 PC9 -> SD1 | 315 PC9 -> SD1 |
311 PC10 -> SD2 | 316 PC10 -> SD2 |
312 PC11 -> SD3 | 317 PC11 -> SD3 |
317 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; | 322 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; |
318 GPIO_Init(GPIOC, &GPIO_InitStructure); | 323 GPIO_Init(GPIOC, &GPIO_InitStructure); |
319 | 324 |
320 /* Configure PD2 -> CMD SDIO pin for AF */ | 325 /* Configure PD2 -> CMD SDIO pin for AF */ |
321 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; | 326 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; |
322 GPIO_Init(GPIOD, &GPIO_InitStructure); | 327 GPIO_Init(GPIOD, &GPIO_InitStructure); |
323 | |
324 /* Enable the SDIO AHB Clock */ | |
325 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_SDIO, ENABLE); | |
326 | |
327 /* Enable the DMA2 Clock */ | |
328 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA2, ENABLE); | |
329 } | 328 } |