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comparison hw.c @ 8:58d76cf522ff

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Split out code into separate files.
author Daniel O'Connor <darius@dons.net.au>
date Sat, 04 Feb 2012 13:29:31 +1030
parents
children 0b75cff7c570
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7:9404b9869c27 8:58d76cf522ff
1 #include <stdint.h>
2 #include "stm32f10x.h"
3 #include "lcd.h"
4
5 static void hw_port_cfg(void);
6
7
8 void hw_init(void) {
9 hw_port_cfg();
10 lcd_init();
11 lcd_setpwm(1000);
12 }
13
14 static void
15 hw_port_cfg(void) {
16 GPIO_InitTypeDef GPIO_InitStructure;
17 USART_InitTypeDef USART_InitStructure;
18 SPI_InitTypeDef SPI_InitStructure;
19 FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
20 FSMC_NORSRAMTimingInitTypeDef p;
21 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
22
23 /* RTC stuff */
24 /* Enable PWR and BKP clocks */
25 RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);
26
27 /* Allow access to BKP Domain */
28 PWR_BackupAccessCmd(ENABLE);
29
30 /* Reset Backup Domain
31 *
32 * This resets the RTC etc back to 0 so probably only useful under user command
33 BKP_DeInit();
34 */
35
36 /* Enable Low Speed External clock */
37 RCC_LSEConfig(RCC_LSE_ON);
38
39 /* Wait till LSE is ready */
40 while (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET)
41 ;
42
43 /* Select LSE as RTC Clock Source */
44 RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
45
46 /* Enable RTC Clock */
47 RCC_RTCCLKCmd(ENABLE);
48
49 /* Wait for RTC registers synchronization */
50 RTC_WaitForSynchro();
51
52 /* Wait until last write operation on RTC registers has finished */
53 RTC_WaitForLastTask();
54
55 /* Wait until last write operation on RTC registers has finished */
56 RTC_WaitForLastTask();
57
58 /* Set RTC prescaler: set RTC period to 1sec */
59 RTC_SetPrescaler(32767); /* RTC period = RTCCLK/RTC_PR = (32.768 KHz)/(32767+1) */
60
61 /* Wait until last write operation on RTC registers has finished */
62 RTC_WaitForLastTask();
63
64 /* Clock setup */
65 RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE);
66
67 /* Port configuration */
68 /* Configure USART1 TX (PA.09) as alternate function push-pull */
69 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
70 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
71 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
72 GPIO_Init(GPIOA, &GPIO_InitStructure);
73
74 /* Configure USART1 RX (PA.10) as input floating */
75 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
76 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
77 GPIO_Init(GPIOA, &GPIO_InitStructure);
78
79 /* Enable GPIOB clock */
80 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
81
82 /* Configure PB5 as output push-pull for LED */
83 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
84 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
85 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
86 GPIO_Init(GPIOB, &GPIO_InitStructure);
87
88 /* Configure PB15 as input pull-up push-pull for push button */
89 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15;
90 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
91 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
92 GPIO_Init(GPIOB, &GPIO_InitStructure);
93
94 /* USART configuration */
95 /* USART1 - 115200 8n1, no flow control TX & RX enabled */
96 USART_InitStructure.USART_BaudRate = 115200;
97 USART_InitStructure.USART_WordLength = USART_WordLength_8b;
98 USART_InitStructure.USART_StopBits = USART_StopBits_1;
99 USART_InitStructure.USART_Parity = USART_Parity_No;
100 USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
101 USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
102 USART_Init(USART1, &USART_InitStructure);
103
104 /* Enable interrupts on receive data */
105 USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
106
107 /* Enable USART */
108 USART_Cmd(USART1, ENABLE);
109
110 /* Enable FSMC clock */
111 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
112
113 /* Enable alternate function IO clock */
114 RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
115
116 /* Enable GPIOD clock */
117 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD, ENABLE);
118
119 /* Enable GPIOD clock */
120 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOE, ENABLE);
121
122 /* Configures LCD Control lines (FSMC Pins) in alternate function Push-Pull mode.
123 *
124 * PD0(D2), PD1(D3), PD4(NOE), PD5(NWE), PD7(NE1/CS), PD8(D13), PD9(D14),
125 * PD10(D15), PD11(A16/RS) PD14(D0), PD15(D1)
126 */
127 GPIO_InitStructure.GPIO_Pin = (GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_7 |
128 GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 |
129 GPIO_Pin_14 | GPIO_Pin_15);
130 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
131 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
132 GPIO_Init(GPIOD, &GPIO_InitStructure);
133
134 /* PE7(D4), PE8(D5), PE9(D6), PE10(D7), PE11(D8), PE12(D9), PE13(D10),
135 * PE14(D11), PE15(D12)
136 */
137 GPIO_InitStructure.GPIO_Pin = (GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 |
138 GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 |
139 GPIO_Pin_15);
140 GPIO_Init(GPIOE, &GPIO_InitStructure);
141
142 /* Configure backlight control (PD13/FSMC_A18 remapped to TIM4_CH2) */
143 /* Enable TIM4 clock */
144 RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE);
145
146 /* Enable timer function
147 * Note source clock is SYSCLK / 2 = 36MHz
148 */
149 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13;
150 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
151 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
152 GPIO_Init(GPIOD, &GPIO_InitStructure);
153
154 /* Remap TIM4_CH2 to PD13 */
155 GPIO_PinRemapConfig(GPIO_Remap_TIM4, ENABLE);
156
157 /* Reset TIM4 */
158 TIM_DeInit(TIM4);
159
160 /* Time Base configuration */
161 TIM_TimeBaseStructure.TIM_Period = 999;
162 TIM_TimeBaseStructure.TIM_Prescaler = 0;
163 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
164 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Down;
165
166 TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure);
167
168 /* Enable timer */
169 TIM_OC2PreloadConfig(TIM4, TIM_OCPreload_Enable);
170 TIM_ARRPreloadConfig(TIM4, ENABLE);
171 TIM_Cmd(TIM4, ENABLE);
172
173 /* Configure reset pin (PE1) as GPIO out PP */
174 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1;
175 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
176 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
177 GPIO_Init(GPIOE, &GPIO_InitStructure);
178
179 /* Configures the Parallel interface (FSMC) for LCD (Parallel mode) */
180 /* Timing configuration */
181 p.FSMC_AddressSetupTime = 5;
182 p.FSMC_AddressHoldTime = 5;
183 p.FSMC_DataSetupTime = 5;
184 p.FSMC_BusTurnAroundDuration = 0;
185 p.FSMC_CLKDivision = 0;
186 p.FSMC_DataLatency = 0;
187 p.FSMC_AccessMode = FSMC_AccessMode_A;
188
189 /* FSMC_Bank1_NORSRAM1 configured as follows:
190 - Data/Address MUX = Disable
191 - Memory Type = SRAM
192 - Data Width = 16bit
193 - Write Operation = Enable
194 - Extended Mode = Disable
195 - Asynchronous Wait = Disable */
196 FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;
197 FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
198 FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
199 FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
200 FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
201 FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
202 FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
203 FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
204 FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
205 FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
206 FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
207 FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
208 FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
209 FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
210 FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
211 FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
212
213 /* Enable FSMC_Bank1_NORSRAM1 */
214 FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);
215
216 /* Configure touch screen controller
217 *
218 * Connected to SPI1 which is shared with the AT45DB161D.
219 *
220 * The touch screen is selected with PB7.
221 * The flash chip is selected with PA4.
222 */
223
224 /* Enable SPI1 clock */
225 RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE);
226
227 /* Configure MOSI, MISO and SCLK as alternate function PP */
228 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;
229 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
230 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
231 GPIO_Init(GPIOA, &GPIO_InitStructure);
232
233 /* Configure flash chip select pin (PA4) as GPIO out PP */
234 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;
235 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
236 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
237 GPIO_Init(GPIOA, &GPIO_InitStructure);
238
239 /* Configure touch chip select pin (PB7) as GPIO out PP */
240 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;
241 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
242 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
243 GPIO_Init(GPIOB, &GPIO_InitStructure);
244
245 /* De-select touch & flash */
246 GPIO_SetBits(GPIOA, GPIO_Pin_4);
247 GPIO_SetBits(GPIOB, GPIO_Pin_7);
248
249 /* SPI1 Config */
250 SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
251 SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
252 SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
253 SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
254 SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
255 SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
256 SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_64;
257 SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
258 SPI_InitStructure.SPI_CRCPolynomial = 7;
259 SPI_Init(SPI1, &SPI_InitStructure);
260
261 /* SPI1 enable */
262 SPI_Cmd(SPI1, ENABLE);
263 }