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annotate libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/TIM/OCInactive/main.c @ 89:fc21fb5b171b default tip
Make error message more useful
author | Daniel O'Connor <darius@dons.net.au> |
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date | Fri, 13 Mar 2015 11:39:59 +1030 |
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1 /** |
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2 ****************************************************************************** |
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3 * @file TIM/OCInactive/main.c |
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4 * @author MCD Application Team |
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5 * @version V3.5.0 |
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6 * @date 08-April-2011 |
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7 * @brief Main program body |
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8 ****************************************************************************** |
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9 * @attention |
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10 * |
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11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
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12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE |
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13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY |
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14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING |
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15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE |
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16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
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17 * |
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18 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> |
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19 ****************************************************************************** |
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20 */ |
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21 |
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22 /* Includes ------------------------------------------------------------------*/ |
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23 #include "stm32f10x.h" |
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24 |
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25 /** @addtogroup STM32F10x_StdPeriph_Examples |
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26 * @{ |
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27 */ |
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28 |
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29 /** @addtogroup TIM_OCInactive |
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30 * @{ |
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31 */ |
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32 |
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33 /* Private typedef -----------------------------------------------------------*/ |
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34 /* Private define ------------------------------------------------------------*/ |
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35 /* Private macro -------------------------------------------------------------*/ |
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36 /* Private variables ---------------------------------------------------------*/ |
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37 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; |
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38 TIM_OCInitTypeDef TIM_OCInitStructure; |
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39 uint16_t CCR1_Val = 1000; |
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40 uint16_t CCR2_Val = 500; |
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41 uint16_t CCR3_Val = 250; |
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42 uint16_t CCR4_Val = 125; |
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43 uint16_t PrescalerValue = 0; |
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44 |
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45 /* Private function prototypes -----------------------------------------------*/ |
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46 void RCC_Configuration(void); |
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47 void GPIO_Configuration(void); |
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48 void NVIC_Configuration(void); |
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49 |
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50 /* Private functions ---------------------------------------------------------*/ |
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51 |
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52 /** |
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53 * @brief Main program |
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54 * @param None |
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55 * @retval None |
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56 */ |
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57 int main(void) |
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58 { |
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59 /*!< At this stage the microcontroller clock setting is already configured, |
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60 this is done through SystemInit() function which is called from startup |
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61 file (startup_stm32f10x_xx.s) before to branch to application main. |
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62 To reconfigure the default setting of SystemInit() function, refer to |
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63 system_stm32f10x.c file |
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64 */ |
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65 |
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66 /* System Clocks Configuration */ |
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67 RCC_Configuration(); |
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68 |
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69 /* NVIC Configuration */ |
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70 NVIC_Configuration(); |
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71 |
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72 /* GPIO Configuration */ |
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73 GPIO_Configuration(); |
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74 |
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75 /* --------------------------------------------------------------- |
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76 TIM2 Configuration: |
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77 TIM2CLK = SystemCoreClock / 2, |
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78 The objective is to get TIM2 counter clock at 1 KHz: |
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79 - Prescaler = (TIM2CLK / TIM2 counter clock) - 1 |
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80 And generate 4 signals with 4 different delays: |
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81 TIM2_CH1 delay = CCR1_Val/TIM2 counter clock = 1000 ms |
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82 TIM2_CH2 delay = CCR2_Val/TIM2 counter clock = 500 ms |
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83 TIM2_CH3 delay = CCR3_Val/TIM2 counter clock = 250 ms |
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84 TIM2_CH4 delay = CCR4_Val/TIM2 counter clock = 125 ms |
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85 |
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86 * SystemCoreClock is set to 72 MHz for Low-density, Medium-density, High-density |
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87 and Connectivity line devices and to 24 MHz for Low-Density Value line and |
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88 Medium-Density Value line devices |
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89 --------------------------------------------------------------- */ |
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90 /* Compute the prescaler value */ |
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91 PrescalerValue = (uint16_t) (SystemCoreClock / 2000) - 1; |
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92 /* Time base configuration */ |
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93 TIM_TimeBaseStructure.TIM_Period = 65535; |
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94 TIM_TimeBaseStructure.TIM_Prescaler = PrescalerValue; |
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95 TIM_TimeBaseStructure.TIM_ClockDivision = 0; |
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96 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; |
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97 |
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98 TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure); |
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99 |
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100 /* Output Compare Active Mode configuration: Channel1 */ |
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101 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Inactive; |
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102 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; |
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103 TIM_OCInitStructure.TIM_Pulse = CCR1_Val; |
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104 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; |
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105 |
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106 TIM_OC1Init(TIM2, &TIM_OCInitStructure); |
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107 |
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108 TIM_OC1PreloadConfig(TIM2, TIM_OCPreload_Disable); |
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109 |
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110 /* Output Compare Active Mode configuration: Channel2 */ |
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111 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; |
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112 TIM_OCInitStructure.TIM_Pulse = CCR2_Val; |
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113 |
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114 TIM_OC2Init(TIM2, &TIM_OCInitStructure); |
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115 |
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116 TIM_OC2PreloadConfig(TIM2, TIM_OCPreload_Disable); |
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117 |
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118 /* Output Compare Active Mode configuration: Channel3 */ |
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119 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; |
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120 TIM_OCInitStructure.TIM_Pulse = CCR3_Val; |
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121 |
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122 TIM_OC3Init(TIM2, &TIM_OCInitStructure); |
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123 |
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124 TIM_OC3PreloadConfig(TIM2, TIM_OCPreload_Disable); |
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125 |
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126 /* Output Compare Active Mode configuration: Channel4 */ |
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127 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; |
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128 TIM_OCInitStructure.TIM_Pulse = CCR4_Val; |
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129 |
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130 TIM_OC4Init(TIM2, &TIM_OCInitStructure); |
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131 |
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132 TIM_OC4PreloadConfig(TIM2, TIM_OCPreload_Disable); |
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133 |
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134 TIM_ARRPreloadConfig(TIM2, ENABLE); |
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135 |
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136 /* TIM IT enable */ |
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137 TIM_ITConfig(TIM2, TIM_IT_CC1 | TIM_IT_CC2 | TIM_IT_CC3 | TIM_IT_CC4, ENABLE); |
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138 |
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139 /* Set PC.06, PC.07, PC.08 and PC.09 pins */ |
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140 GPIO_SetBits(GPIOC, GPIO_Pin_6 | GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9); |
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141 |
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142 /* TIM2 enable counter */ |
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143 TIM_Cmd(TIM2, ENABLE); |
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144 |
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145 while (1) |
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146 {} |
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147 } |
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148 |
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149 /** |
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150 * @brief Configures the different system clocks. |
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151 * @param None |
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152 * @retval None |
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153 */ |
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154 void RCC_Configuration(void) |
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155 { |
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156 /* PCLK1 = HCLK/4 */ |
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157 RCC_PCLK1Config(RCC_HCLK_Div4); |
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158 |
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159 /* TIM2 clock enable */ |
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160 RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE); |
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161 |
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162 /* GPIOC clock enable */ |
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163 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE); |
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164 } |
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165 |
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166 /** |
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167 * @brief Configure the GPIOD Pins. |
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168 * @param None |
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169 * @retval None |
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170 */ |
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171 void GPIO_Configuration(void) |
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172 { |
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173 GPIO_InitTypeDef GPIO_InitStructure; |
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174 |
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175 /* GPIOC Configuration: Pin6, 7, 8 and 9 as output push-pull */ |
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176 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 | GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9; |
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177 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; |
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178 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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179 |
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180 GPIO_Init(GPIOC, &GPIO_InitStructure); |
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181 } |
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182 |
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183 /** |
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184 * @brief Configure the nested vectored interrupt controller. |
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185 * @param None |
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186 * @retval None |
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187 */ |
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188 void NVIC_Configuration(void) |
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189 { |
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190 NVIC_InitTypeDef NVIC_InitStructure; |
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191 |
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192 /* Enable the TIM2 Interrupt */ |
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193 NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn; |
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194 NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; |
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195 NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; |
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196 NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; |
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197 |
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198 NVIC_Init(&NVIC_InitStructure); |
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199 |
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200 } |
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201 |
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202 #ifdef USE_FULL_ASSERT |
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203 |
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204 /** |
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205 * @brief Reports the name of the source file and the source line number |
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206 * where the assert_param error has occurred. |
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207 * @param file: pointer to the source file name |
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208 * @param line: assert_param error line source number |
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209 * @retval None |
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210 */ |
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211 void assert_failed(uint8_t* file, uint32_t line) |
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212 { |
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213 /* User can add his own implementation to report the file name and line number, |
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214 ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ |
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215 |
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216 while (1) |
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217 {} |
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218 } |
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219 |
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220 #endif |
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221 /** |
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222 * @} |
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223 */ |
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224 |
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225 /** |
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226 * @} |
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227 */ |
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228 |
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229 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |