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author Daniel O'Connor <darius@dons.net.au>
date Fri, 13 Mar 2015 11:39:59 +1030
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1 /**
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2 @page DMA_SPI_RAM DMA SPI to RAM example
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3
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4 @verbatim
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5 ******************** (C) COPYRIGHT 2011 STMicroelectronics *******************
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6 * @file DMA/SPI_RAM/readme.txt
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7 * @author MCD Application Team
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8 * @version V3.5.0
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9 * @date 08-April-2011
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10 * @brief Description of the DMA SPI to RAM example.
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11 ******************************************************************************
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12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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18 ******************************************************************************
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19 @endverbatim
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20
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21 @par Example Description
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22
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23 This example provides a description of how to use four DMA channels to transfer
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24 a data buffer from memory to SPI_SLAVE through SPI_MASTER and a second data buffer
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25 from memory to SPI_MASTER through SPI_SLAVE in full-duplex mode.
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26 SPI_MASTER and SPI_SLAVE can be SPI1 and SPI2 or SPI3 and SPI2, depending on the
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27 STMicroelectronics EVAL board you are using.
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28
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29 For each SPI the NSS pin is configured by software (thus NSS pin is free for GPIO use)
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30 and DMA Tx/Rx requests are enabled.
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31
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32 In this example both transmission and reception are managed through DMA and the
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33 received data are stored into buffers declared in the SRAM. The DMA channels
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34 involved in this transfer depend on the used SPIs (for more details please refer
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35 to platform_config.h file).
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36
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37 A polling on all Transfer complete flags are done for all used DMA channels to
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38 check the end of all DMA channels transfers. The last received data on SPI_MASTER
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39 and SPI_SLAVE are the CRC values sent by each SPI to the other.
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40 The transmitted and received buffers are compared to check that all data have
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41 been correctly transferred.
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42
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43
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44 @par Directory contents
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45
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46 - DMA/SPI_RAM/platform_config.h Evaluation board specific configuration file
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47 - DMA/SPI_RAM/stm32f10x_conf.h Library Configuration file
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48 - DMA/SPI_RAM/stm32f10x_it.c Interrupt handlers
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49 - DMA/SPI_RAM/stm32f10x_it.h Interrupt handlers header file
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50 - DMA/SPI_RAM/main.c Main program
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51 - DMA/SPI_RAM/system_stm32f10x.c STM32F10x system source file
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52
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53 @par Hardware and Software environment
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54
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55 - This example runs on STM32F10x Connectivity line, High-Density, Medium-Density,
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56 XL-Density, High-Density Value line, Medium-Density Value line, Low-Density
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57 and Low-Density Value line Devices.
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58
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59 - This example has been tested with STMicroelectronics STM32100E-EVAL (High-Density Value line)
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60 STM32100B-EVAL (Medium-Density Value line), STM32100E-EVAL (High-Density Value line), STM3210C-EVAL
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61 (Connectivity line), STM3210E-EVAL (High-Density and XL-Density) and STM3210B-EVAL
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62 (Medium-Density) evaluation boards and can be easily tailored to any other
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63 supported device and development board.
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64
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65 - STM32100E-EVAL Set-up
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66 - Connect SPI1 SCK pin (PA.05) to SPI2 SCK pin (PB.13)
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67 - Connect SPI1 MISO pin (PA.06) to SPI2 MISO pin (PB.14)
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68 - Connect SPI1 MOSI pin (PA.07) to SPI2 MOSI pin (PB.15)
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69
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70 - STM32100B-EVAL Set-up
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71 - Connect SPI1 SCK pin (PA.05) to SPI2 SCK pin (PB.13)
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72 - Connect SPI1 MISO pin (PA.06) to SPI2 MISO pin (PB.14)
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73 - Connect SPI1 MOSI pin (PA.07) to SPI2 MOSI pin (PB.15)
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74
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75 - STM3210C-EVAL Set-up
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76 - Connect SPI3 SCK pin (PC.10) to SPI2 SCK pin (PB.13)
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77 - Connect SPI3 MISO pin (PC.11) to SPI2 MISO pin (PB.14)
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78 - Connect SPI3 MOSI pin (PC.12) to SPI2 MOSI pin (PB.15)
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79 @note In this case SPI3 pins are remapped by software.
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80
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81 - STM3210E-EVAL Set-up
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82 - Connect SPI1 SCK pin (PA.05) to SPI2 SCK pin (PB.13)
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83 - Connect SPI1 MISO pin (PA.06) to SPI2 MISO pin (PB.14)
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84 - Connect SPI1 MOSI pin (PA.07) to SPI2 MOSI pin (PB.15)
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85 @note The jumper 14 (USB Disconnect) must be set in position 1<->2 in order
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86 to not interfer with SPI2 MISO pin PB14.
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87
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88 - STM3210B-EVAL Set-up
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89 - Connect SPI1 SCK pin (PA.05) to SPI2 SCK pin (PB.13)
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90 - Connect SPI1 MISO pin (PA.06) to SPI2 MISO pin (PB.14)
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91 - Connect SPI1 MOSI pin (PA.07) to SPI2 MOSI pin (PB.15)
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92
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93
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94 @par How to use it ?
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95
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96 In order to make the program work, you must do the following :
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97 - Copy all source files from this example folder to the template folder under
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98 Project\STM32F10x_StdPeriph_Template
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99 - Open your preferred toolchain
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100 - Rebuild all files and load your image into target memory
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101 - Run the example
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102
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103 @note
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104 - Low-density Value line devices are STM32F100xx microcontrollers where the
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105 Flash memory density ranges between 16 and 32 Kbytes.
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106 - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx
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107 microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
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108 - Medium-density Value line devices are STM32F100xx microcontrollers where
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109 the Flash memory density ranges between 64 and 128 Kbytes.
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110 - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx
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111 microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
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112 - High-density Value line devices are STM32F100xx microcontrollers where
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113 the Flash memory density ranges between 256 and 512 Kbytes.
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114 - High-density devices are STM32F101xx and STM32F103xx microcontrollers where
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115 the Flash memory density ranges between 256 and 512 Kbytes.
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116 - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where
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117 the Flash memory density ranges between 512 and 1024 Kbytes.
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118 - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.
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119
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120 * <h3><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h3>
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121 */