stm32temp: libs/STM32F10x_StdPeriph_Lib_V3.5.0/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x

annotate libs/STM32F10x_StdPeriph_Lib_V3.5.0/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c @ 89:fc21fb5b171b default tip

Make error message more useful

author	Daniel O'Connor <darius@dons.net.au>
date	Fri, 13 Mar 2015 11:39:59 +1030
parents	c59513fd84fb
children

rev	line source
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	2 ******************************************************************************
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	3 * @file stm32f10x_usart.c
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	4 * @author MCD Application Team
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	5 * @version V3.5.0
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	6 * @date 11-March-2011
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	7 * @brief This file provides all the USART firmware functions.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	8 ******************************************************************************
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	9 * @attention
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	10 *
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	17 *
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	18 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	19 ******************************************************************************
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	20 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	21
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	22 /* Includes ------------------------------------------------------------------*/
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	23 #include "stm32f10x_usart.h"
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	24 #include "stm32f10x_rcc.h"
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	25
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	26 /** @addtogroup STM32F10x_StdPeriph_Driver
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	27 * @{
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	28 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	29
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	30 /** @defgroup USART
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	31 * @brief USART driver modules
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	32 * @{
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	33 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	34
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	35 /** @defgroup USART_Private_TypesDefinitions
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	36 * @{
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	37 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	38
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	39 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	40 * @}
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	41 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	42
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	43 /** @defgroup USART_Private_Defines
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	44 * @{
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	45 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	46
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	47 #define CR1_UE_Set ((uint16_t)0x2000) /!< USART Enable Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	48 #define CR1_UE_Reset ((uint16_t)0xDFFF) /!< USART Disable Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	49
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	50 #define CR1_WAKE_Mask ((uint16_t)0xF7FF) /!< USART WakeUp Method Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	51
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	52 #define CR1_RWU_Set ((uint16_t)0x0002) /!< USART mute mode Enable Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	53 #define CR1_RWU_Reset ((uint16_t)0xFFFD) /!< USART mute mode Enable Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	54 #define CR1_SBK_Set ((uint16_t)0x0001) /!< USART Break Character send Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	55 #define CR1_CLEAR_Mask ((uint16_t)0xE9F3) /!< USART CR1 Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	56 #define CR2_Address_Mask ((uint16_t)0xFFF0) /!< USART address Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	57
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	58 #define CR2_LINEN_Set ((uint16_t)0x4000) /!< USART LIN Enable Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	59 #define CR2_LINEN_Reset ((uint16_t)0xBFFF) /!< USART LIN Disable Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	60
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	61 #define CR2_LBDL_Mask ((uint16_t)0xFFDF) /!< USART LIN Break detection Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	62 #define CR2_STOP_CLEAR_Mask ((uint16_t)0xCFFF) /!< USART CR2 STOP Bits Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	63 #define CR2_CLOCK_CLEAR_Mask ((uint16_t)0xF0FF) /!< USART CR2 Clock Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	64
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	65 #define CR3_SCEN_Set ((uint16_t)0x0020) /!< USART SC Enable Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	66 #define CR3_SCEN_Reset ((uint16_t)0xFFDF) /!< USART SC Disable Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	67
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	68 #define CR3_NACK_Set ((uint16_t)0x0010) /!< USART SC NACK Enable Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	69 #define CR3_NACK_Reset ((uint16_t)0xFFEF) /!< USART SC NACK Disable Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	70
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	71 #define CR3_HDSEL_Set ((uint16_t)0x0008) /!< USART Half-Duplex Enable Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	72 #define CR3_HDSEL_Reset ((uint16_t)0xFFF7) /!< USART Half-Duplex Disable Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	73
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	74 #define CR3_IRLP_Mask ((uint16_t)0xFFFB) /!< USART IrDA LowPower mode Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	75 #define CR3_CLEAR_Mask ((uint16_t)0xFCFF) /!< USART CR3 Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	76
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	77 #define CR3_IREN_Set ((uint16_t)0x0002) /!< USART IrDA Enable Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	78 #define CR3_IREN_Reset ((uint16_t)0xFFFD) /!< USART IrDA Disable Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	79 #define GTPR_LSB_Mask ((uint16_t)0x00FF) /!< Guard Time Register LSB Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	80 #define GTPR_MSB_Mask ((uint16_t)0xFF00) /!< Guard Time Register MSB Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	81 #define IT_Mask ((uint16_t)0x001F) /!< USART Interrupt Mask /
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	82
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	83 /* USART OverSampling-8 Mask */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	84 #define CR1_OVER8_Set ((u16)0x8000) /* USART OVER8 mode Enable Mask */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	85 #define CR1_OVER8_Reset ((u16)0x7FFF) /* USART OVER8 mode Disable Mask */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	86
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	87 /* USART One Bit Sampling Mask */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	88 #define CR3_ONEBITE_Set ((u16)0x0800) /* USART ONEBITE mode Enable Mask */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	89 #define CR3_ONEBITE_Reset ((u16)0xF7FF) /* USART ONEBITE mode Disable Mask */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	90
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	91 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	92 * @}
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	93 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	94
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	95 /** @defgroup USART_Private_Macros
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	96 * @{
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	97 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	98
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	99 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	100 * @}
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	101 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	102
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	103 /** @defgroup USART_Private_Variables
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	104 * @{
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	105 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	106
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	107 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	108 * @}
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	109 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	110
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	111 /** @defgroup USART_Private_FunctionPrototypes
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	112 * @{
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	113 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	114
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	115 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	116 * @}
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	117 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	118
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	119 /** @defgroup USART_Private_Functions
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	120 * @{
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	121 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	122
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	123 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	124 * @brief Deinitializes the USARTx peripheral registers to their default reset values.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	125 * @param USARTx: Select the USART or the UART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	126 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	127 * USART1, USART2, USART3, UART4 or UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	128 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	129 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	130 void USART_DeInit(USART_TypeDef* USARTx)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	131 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	132 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	133 assert_param(IS_USART_ALL_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	134
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	135 if (USARTx == USART1)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	136 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	137 RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, ENABLE);
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	138 RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, DISABLE);
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	139 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	140 else if (USARTx == USART2)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	141 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	142 RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, ENABLE);
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	143 RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, DISABLE);
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	144 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	145 else if (USARTx == USART3)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	146 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	147 RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, ENABLE);
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	148 RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, DISABLE);
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	149 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	150 else if (USARTx == UART4)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	151 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	152 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, ENABLE);
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	153 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, DISABLE);
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	154 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	155 else
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	156 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	157 if (USARTx == UART5)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	158 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	159 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, ENABLE);
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	160 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, DISABLE);
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	161 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	162 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	163 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	164
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	165 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	166 * @brief Initializes the USARTx peripheral according to the specified
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	167 * parameters in the USART_InitStruct .
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	168 * @param USARTx: Select the USART or the UART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	169 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	170 * USART1, USART2, USART3, UART4 or UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	171 * @param USART_InitStruct: pointer to a USART_InitTypeDef structure
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	172 * that contains the configuration information for the specified USART
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	173 * peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	174 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	175 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	176 void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	177 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	178 uint32_t tmpreg = 0x00, apbclock = 0x00;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	179 uint32_t integerdivider = 0x00;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	180 uint32_t fractionaldivider = 0x00;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	181 uint32_t usartxbase = 0;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	182 RCC_ClocksTypeDef RCC_ClocksStatus;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	183 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	184 assert_param(IS_USART_ALL_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	185 assert_param(IS_USART_BAUDRATE(USART_InitStruct->USART_BaudRate));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	186 assert_param(IS_USART_WORD_LENGTH(USART_InitStruct->USART_WordLength));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	187 assert_param(IS_USART_STOPBITS(USART_InitStruct->USART_StopBits));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	188 assert_param(IS_USART_PARITY(USART_InitStruct->USART_Parity));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	189 assert_param(IS_USART_MODE(USART_InitStruct->USART_Mode));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	190 assert_param(IS_USART_HARDWARE_FLOW_CONTROL(USART_InitStruct->USART_HardwareFlowControl));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	191 /* The hardware flow control is available only for USART1, USART2 and USART3 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	192 if (USART_InitStruct->USART_HardwareFlowControl != USART_HardwareFlowControl_None)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	193 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	194 assert_param(IS_USART_123_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	195 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	196
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	197 usartxbase = (uint32_t)USARTx;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	198
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	199 /---------------------------- USART CR2 Configuration -----------------------/
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	200 tmpreg = USARTx->CR2;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	201 /* Clear STOP[13:12] bits */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	202 tmpreg &= CR2_STOP_CLEAR_Mask;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	203 /* Configure the USART Stop Bits, Clock, CPOL, CPHA and LastBit ------------*/
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	204 /* Set STOP[13:12] bits according to USART_StopBits value */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	205 tmpreg \|= (uint32_t)USART_InitStruct->USART_StopBits;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	206
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	207 /* Write to USART CR2 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	208 USARTx->CR2 = (uint16_t)tmpreg;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	209
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	210 /---------------------------- USART CR1 Configuration -----------------------/
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	211 tmpreg = USARTx->CR1;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	212 /* Clear M, PCE, PS, TE and RE bits */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	213 tmpreg &= CR1_CLEAR_Mask;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	214 /* Configure the USART Word Length, Parity and mode ----------------------- */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	215 /* Set the M bits according to USART_WordLength value */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	216 /* Set PCE and PS bits according to USART_Parity value */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	217 /* Set TE and RE bits according to USART_Mode value */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	218 tmpreg \|= (uint32_t)USART_InitStruct->USART_WordLength \| USART_InitStruct->USART_Parity \|
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	219 USART_InitStruct->USART_Mode;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	220 /* Write to USART CR1 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	221 USARTx->CR1 = (uint16_t)tmpreg;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	222
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	223 /---------------------------- USART CR3 Configuration -----------------------/
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	224 tmpreg = USARTx->CR3;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	225 /* Clear CTSE and RTSE bits */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	226 tmpreg &= CR3_CLEAR_Mask;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	227 /* Configure the USART HFC -------------------------------------------------*/
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	228 /* Set CTSE and RTSE bits according to USART_HardwareFlowControl value */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	229 tmpreg \|= USART_InitStruct->USART_HardwareFlowControl;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	230 /* Write to USART CR3 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	231 USARTx->CR3 = (uint16_t)tmpreg;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	232
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	233 /---------------------------- USART BRR Configuration -----------------------/
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	234 /* Configure the USART Baud Rate -------------------------------------------*/
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	235 RCC_GetClocksFreq(&RCC_ClocksStatus);
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	236 if (usartxbase == USART1_BASE)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	237 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	238 apbclock = RCC_ClocksStatus.PCLK2_Frequency;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	239 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	240 else
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	241 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	242 apbclock = RCC_ClocksStatus.PCLK1_Frequency;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	243 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	244
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	245 /* Determine the integer part */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	246 if ((USARTx->CR1 & CR1_OVER8_Set) != 0)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	247 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	248 /* Integer part computing in case Oversampling mode is 8 Samples */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	249 integerdivider = ((25 * apbclock) / (2 * (USART_InitStruct->USART_BaudRate)));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	250 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	251 else /* if ((USARTx->CR1 & CR1_OVER8_Set) == 0) */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	252 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	253 /* Integer part computing in case Oversampling mode is 16 Samples */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	254 integerdivider = ((25 * apbclock) / (4 * (USART_InitStruct->USART_BaudRate)));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	255 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	256 tmpreg = (integerdivider / 100) << 4;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	257
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	258 /* Determine the fractional part */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	259 fractionaldivider = integerdivider - (100 * (tmpreg >> 4));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	260
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	261 /* Implement the fractional part in the register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	262 if ((USARTx->CR1 & CR1_OVER8_Set) != 0)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	263 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	264 tmpreg \|= ((((fractionaldivider * 8) + 50) / 100)) & ((uint8_t)0x07);
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	265 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	266 else /* if ((USARTx->CR1 & CR1_OVER8_Set) == 0) */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	267 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	268 tmpreg \|= ((((fractionaldivider * 16) + 50) / 100)) & ((uint8_t)0x0F);
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	269 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	270
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	271 /* Write to USART BRR */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	272 USARTx->BRR = (uint16_t)tmpreg;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	273 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	274
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	275 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	276 * @brief Fills each USART_InitStruct member with its default value.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	277 * @param USART_InitStruct: pointer to a USART_InitTypeDef structure
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	278 * which will be initialized.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	279 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	280 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	281 void USART_StructInit(USART_InitTypeDef* USART_InitStruct)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	282 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	283 /* USART_InitStruct members default value */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	284 USART_InitStruct->USART_BaudRate = 9600;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	285 USART_InitStruct->USART_WordLength = USART_WordLength_8b;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	286 USART_InitStruct->USART_StopBits = USART_StopBits_1;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	287 USART_InitStruct->USART_Parity = USART_Parity_No ;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	288 USART_InitStruct->USART_Mode = USART_Mode_Rx \| USART_Mode_Tx;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	289 USART_InitStruct->USART_HardwareFlowControl = USART_HardwareFlowControl_None;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	290 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	291
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	292 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	293 * @brief Initializes the USARTx peripheral Clock according to the
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	294 * specified parameters in the USART_ClockInitStruct .
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	295 * @param USARTx: where x can be 1, 2, 3 to select the USART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	296 * @param USART_ClockInitStruct: pointer to a USART_ClockInitTypeDef
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	297 * structure that contains the configuration information for the specified
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	298 * USART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	299 * @note The Smart Card and Synchronous modes are not available for UART4 and UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	300 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	301 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	302 void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	303 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	304 uint32_t tmpreg = 0x00;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	305 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	306 assert_param(IS_USART_123_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	307 assert_param(IS_USART_CLOCK(USART_ClockInitStruct->USART_Clock));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	308 assert_param(IS_USART_CPOL(USART_ClockInitStruct->USART_CPOL));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	309 assert_param(IS_USART_CPHA(USART_ClockInitStruct->USART_CPHA));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	310 assert_param(IS_USART_LASTBIT(USART_ClockInitStruct->USART_LastBit));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	311
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	312 /---------------------------- USART CR2 Configuration -----------------------/
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	313 tmpreg = USARTx->CR2;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	314 /* Clear CLKEN, CPOL, CPHA and LBCL bits */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	315 tmpreg &= CR2_CLOCK_CLEAR_Mask;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	316 /* Configure the USART Clock, CPOL, CPHA and LastBit ------------*/
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	317 /* Set CLKEN bit according to USART_Clock value */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	318 /* Set CPOL bit according to USART_CPOL value */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	319 /* Set CPHA bit according to USART_CPHA value */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	320 /* Set LBCL bit according to USART_LastBit value */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	321 tmpreg \|= (uint32_t)USART_ClockInitStruct->USART_Clock \| USART_ClockInitStruct->USART_CPOL \|
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	322 USART_ClockInitStruct->USART_CPHA \| USART_ClockInitStruct->USART_LastBit;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	323 /* Write to USART CR2 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	324 USARTx->CR2 = (uint16_t)tmpreg;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	325 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	326
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	327 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	328 * @brief Fills each USART_ClockInitStruct member with its default value.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	329 * @param USART_ClockInitStruct: pointer to a USART_ClockInitTypeDef
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	330 * structure which will be initialized.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	331 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	332 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	333 void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	334 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	335 /* USART_ClockInitStruct members default value */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	336 USART_ClockInitStruct->USART_Clock = USART_Clock_Disable;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	337 USART_ClockInitStruct->USART_CPOL = USART_CPOL_Low;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	338 USART_ClockInitStruct->USART_CPHA = USART_CPHA_1Edge;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	339 USART_ClockInitStruct->USART_LastBit = USART_LastBit_Disable;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	340 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	341
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	342 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	343 * @brief Enables or disables the specified USART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	344 * @param USARTx: Select the USART or the UART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	345 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	346 * USART1, USART2, USART3, UART4 or UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	347 * @param NewState: new state of the USARTx peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	348 * This parameter can be: ENABLE or DISABLE.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	349 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	350 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	351 void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	352 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	353 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	354 assert_param(IS_USART_ALL_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	355 assert_param(IS_FUNCTIONAL_STATE(NewState));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	356
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	357 if (NewState != DISABLE)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	358 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	359 /* Enable the selected USART by setting the UE bit in the CR1 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	360 USARTx->CR1 \|= CR1_UE_Set;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	361 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	362 else
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	363 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	364 /* Disable the selected USART by clearing the UE bit in the CR1 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	365 USARTx->CR1 &= CR1_UE_Reset;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	366 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	367 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	368
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	369 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	370 * @brief Enables or disables the specified USART interrupts.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	371 * @param USARTx: Select the USART or the UART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	372 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	373 * USART1, USART2, USART3, UART4 or UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	374 * @param USART_IT: specifies the USART interrupt sources to be enabled or disabled.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	375 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	376 * @arg USART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	377 * @arg USART_IT_LBD: LIN Break detection interrupt
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	378 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	379 * @arg USART_IT_TC: Transmission complete interrupt
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	380 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	381 * @arg USART_IT_IDLE: Idle line detection interrupt
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	382 * @arg USART_IT_PE: Parity Error interrupt
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	383 * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	384 * @param NewState: new state of the specified USARTx interrupts.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	385 * This parameter can be: ENABLE or DISABLE.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	386 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	387 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	388 void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT, FunctionalState NewState)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	389 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	390 uint32_t usartreg = 0x00, itpos = 0x00, itmask = 0x00;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	391 uint32_t usartxbase = 0x00;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	392 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	393 assert_param(IS_USART_ALL_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	394 assert_param(IS_USART_CONFIG_IT(USART_IT));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	395 assert_param(IS_FUNCTIONAL_STATE(NewState));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	396 /* The CTS interrupt is not available for UART4 and UART5 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	397 if (USART_IT == USART_IT_CTS)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	398 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	399 assert_param(IS_USART_123_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	400 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	401
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	402 usartxbase = (uint32_t)USARTx;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	403
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	404 /* Get the USART register index */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	405 usartreg = (((uint8_t)USART_IT) >> 0x05);
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	406
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	407 /* Get the interrupt position */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	408 itpos = USART_IT & IT_Mask;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	409 itmask = (((uint32_t)0x01) << itpos);
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	410
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	411 if (usartreg == 0x01) /* The IT is in CR1 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	412 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	413 usartxbase += 0x0C;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	414 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	415 else if (usartreg == 0x02) /* The IT is in CR2 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	416 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	417 usartxbase += 0x10;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	418 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	419 else /* The IT is in CR3 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	420 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	421 usartxbase += 0x14;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	422 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	423 if (NewState != DISABLE)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	424 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	425 (__IO uint32_t)usartxbase \|= itmask;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	426 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	427 else
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	428 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	429 (__IO uint32_t)usartxbase &= ~itmask;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	430 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	431 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	432
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	433 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	434 * @brief Enables or disables the USART�s DMA interface.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	435 * @param USARTx: Select the USART or the UART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	436 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	437 * USART1, USART2, USART3, UART4 or UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	438 * @param USART_DMAReq: specifies the DMA request.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	439 * This parameter can be any combination of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	440 * @arg USART_DMAReq_Tx: USART DMA transmit request
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	441 * @arg USART_DMAReq_Rx: USART DMA receive request
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	442 * @param NewState: new state of the DMA Request sources.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	443 * This parameter can be: ENABLE or DISABLE.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	444 * @note The DMA mode is not available for UART5 except in the STM32
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	445 * High density value line devices(STM32F10X_HD_VL).
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	446 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	447 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	448 void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	449 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	450 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	451 assert_param(IS_USART_ALL_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	452 assert_param(IS_USART_DMAREQ(USART_DMAReq));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	453 assert_param(IS_FUNCTIONAL_STATE(NewState));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	454 if (NewState != DISABLE)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	455 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	456 /* Enable the DMA transfer for selected requests by setting the DMAT and/or
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	457 DMAR bits in the USART CR3 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	458 USARTx->CR3 \|= USART_DMAReq;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	459 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	460 else
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	461 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	462 /* Disable the DMA transfer for selected requests by clearing the DMAT and/or
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	463 DMAR bits in the USART CR3 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	464 USARTx->CR3 &= (uint16_t)~USART_DMAReq;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	465 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	466 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	467
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	468 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	469 * @brief Sets the address of the USART node.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	470 * @param USARTx: Select the USART or the UART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	471 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	472 * USART1, USART2, USART3, UART4 or UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	473 * @param USART_Address: Indicates the address of the USART node.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	474 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	475 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	476 void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	477 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	478 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	479 assert_param(IS_USART_ALL_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	480 assert_param(IS_USART_ADDRESS(USART_Address));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	481
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	482 /* Clear the USART address */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	483 USARTx->CR2 &= CR2_Address_Mask;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	484 /* Set the USART address node */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	485 USARTx->CR2 \|= USART_Address;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	486 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	487
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	488 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	489 * @brief Selects the USART WakeUp method.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	490 * @param USARTx: Select the USART or the UART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	491 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	492 * USART1, USART2, USART3, UART4 or UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	493 * @param USART_WakeUp: specifies the USART wakeup method.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	494 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	495 * @arg USART_WakeUp_IdleLine: WakeUp by an idle line detection
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	496 * @arg USART_WakeUp_AddressMark: WakeUp by an address mark
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	497 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	498 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	499 void USART_WakeUpConfig(USART_TypeDef* USARTx, uint16_t USART_WakeUp)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	500 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	501 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	502 assert_param(IS_USART_ALL_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	503 assert_param(IS_USART_WAKEUP(USART_WakeUp));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	504
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	505 USARTx->CR1 &= CR1_WAKE_Mask;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	506 USARTx->CR1 \|= USART_WakeUp;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	507 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	508
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	509 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	510 * @brief Determines if the USART is in mute mode or not.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	511 * @param USARTx: Select the USART or the UART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	512 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	513 * USART1, USART2, USART3, UART4 or UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	514 * @param NewState: new state of the USART mute mode.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	515 * This parameter can be: ENABLE or DISABLE.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	516 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	517 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	518 void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	519 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	520 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	521 assert_param(IS_USART_ALL_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	522 assert_param(IS_FUNCTIONAL_STATE(NewState));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	523
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	524 if (NewState != DISABLE)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	525 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	526 /* Enable the USART mute mode by setting the RWU bit in the CR1 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	527 USARTx->CR1 \|= CR1_RWU_Set;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	528 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	529 else
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	530 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	531 /* Disable the USART mute mode by clearing the RWU bit in the CR1 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	532 USARTx->CR1 &= CR1_RWU_Reset;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	533 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	534 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	535
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	536 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	537 * @brief Sets the USART LIN Break detection length.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	538 * @param USARTx: Select the USART or the UART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	539 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	540 * USART1, USART2, USART3, UART4 or UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	541 * @param USART_LINBreakDetectLength: specifies the LIN break detection length.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	542 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	543 * @arg USART_LINBreakDetectLength_10b: 10-bit break detection
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	544 * @arg USART_LINBreakDetectLength_11b: 11-bit break detection
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	545 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	546 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	547 void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint16_t USART_LINBreakDetectLength)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	548 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	549 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	550 assert_param(IS_USART_ALL_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	551 assert_param(IS_USART_LIN_BREAK_DETECT_LENGTH(USART_LINBreakDetectLength));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	552
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	553 USARTx->CR2 &= CR2_LBDL_Mask;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	554 USARTx->CR2 \|= USART_LINBreakDetectLength;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	555 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	556
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	557 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	558 * @brief Enables or disables the USART�s LIN mode.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	559 * @param USARTx: Select the USART or the UART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	560 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	561 * USART1, USART2, USART3, UART4 or UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	562 * @param NewState: new state of the USART LIN mode.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	563 * This parameter can be: ENABLE or DISABLE.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	564 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	565 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	566 void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	567 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	568 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	569 assert_param(IS_USART_ALL_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	570 assert_param(IS_FUNCTIONAL_STATE(NewState));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	571
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	572 if (NewState != DISABLE)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	573 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	574 /* Enable the LIN mode by setting the LINEN bit in the CR2 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	575 USARTx->CR2 \|= CR2_LINEN_Set;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	576 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	577 else
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	578 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	579 /* Disable the LIN mode by clearing the LINEN bit in the CR2 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	580 USARTx->CR2 &= CR2_LINEN_Reset;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	581 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	582 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	583
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	584 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	585 * @brief Transmits single data through the USARTx peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	586 * @param USARTx: Select the USART or the UART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	587 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	588 * USART1, USART2, USART3, UART4 or UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	589 * @param Data: the data to transmit.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	590 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	591 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	592 void USART_SendData(USART_TypeDef* USARTx, uint16_t Data)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	593 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	594 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	595 assert_param(IS_USART_ALL_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	596 assert_param(IS_USART_DATA(Data));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	597
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	598 /* Transmit Data */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	599 USARTx->DR = (Data & (uint16_t)0x01FF);
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	600 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	601
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	602 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	603 * @brief Returns the most recent received data by the USARTx peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	604 * @param USARTx: Select the USART or the UART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	605 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	606 * USART1, USART2, USART3, UART4 or UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	607 * @retval The received data.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	608 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	609 uint16_t USART_ReceiveData(USART_TypeDef* USARTx)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	610 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	611 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	612 assert_param(IS_USART_ALL_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	613
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	614 /* Receive Data */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	615 return (uint16_t)(USARTx->DR & (uint16_t)0x01FF);
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	616 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	617
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	618 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	619 * @brief Transmits break characters.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	620 * @param USARTx: Select the USART or the UART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	621 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	622 * USART1, USART2, USART3, UART4 or UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	623 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	624 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	625 void USART_SendBreak(USART_TypeDef* USARTx)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	626 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	627 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	628 assert_param(IS_USART_ALL_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	629
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	630 /* Send break characters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	631 USARTx->CR1 \|= CR1_SBK_Set;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	632 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	633
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	634 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	635 * @brief Sets the specified USART guard time.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	636 * @param USARTx: where x can be 1, 2 or 3 to select the USART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	637 * @param USART_GuardTime: specifies the guard time.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	638 * @note The guard time bits are not available for UART4 and UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	639 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	640 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	641 void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	642 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	643 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	644 assert_param(IS_USART_123_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	645
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	646 /* Clear the USART Guard time */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	647 USARTx->GTPR &= GTPR_LSB_Mask;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	648 /* Set the USART guard time */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	649 USARTx->GTPR \|= (uint16_t)((uint16_t)USART_GuardTime << 0x08);
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	650 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	651
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	652 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	653 * @brief Sets the system clock prescaler.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	654 * @param USARTx: Select the USART or the UART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	655 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	656 * USART1, USART2, USART3, UART4 or UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	657 * @param USART_Prescaler: specifies the prescaler clock.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	658 * @note The function is used for IrDA mode with UART4 and UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	659 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	660 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	661 void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	662 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	663 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	664 assert_param(IS_USART_ALL_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	665
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	666 /* Clear the USART prescaler */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	667 USARTx->GTPR &= GTPR_MSB_Mask;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	668 /* Set the USART prescaler */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	669 USARTx->GTPR \|= USART_Prescaler;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	670 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	671
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	672 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	673 * @brief Enables or disables the USART�s Smart Card mode.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	674 * @param USARTx: where x can be 1, 2 or 3 to select the USART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	675 * @param NewState: new state of the Smart Card mode.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	676 * This parameter can be: ENABLE or DISABLE.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	677 * @note The Smart Card mode is not available for UART4 and UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	678 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	679 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	680 void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	681 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	682 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	683 assert_param(IS_USART_123_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	684 assert_param(IS_FUNCTIONAL_STATE(NewState));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	685 if (NewState != DISABLE)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	686 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	687 /* Enable the SC mode by setting the SCEN bit in the CR3 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	688 USARTx->CR3 \|= CR3_SCEN_Set;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	689 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	690 else
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	691 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	692 /* Disable the SC mode by clearing the SCEN bit in the CR3 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	693 USARTx->CR3 &= CR3_SCEN_Reset;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	694 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	695 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	696
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	697 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	698 * @brief Enables or disables NACK transmission.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	699 * @param USARTx: where x can be 1, 2 or 3 to select the USART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	700 * @param NewState: new state of the NACK transmission.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	701 * This parameter can be: ENABLE or DISABLE.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	702 * @note The Smart Card mode is not available for UART4 and UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	703 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	704 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	705 void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	706 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	707 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	708 assert_param(IS_USART_123_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	709 assert_param(IS_FUNCTIONAL_STATE(NewState));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	710 if (NewState != DISABLE)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	711 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	712 /* Enable the NACK transmission by setting the NACK bit in the CR3 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	713 USARTx->CR3 \|= CR3_NACK_Set;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	714 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	715 else
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	716 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	717 /* Disable the NACK transmission by clearing the NACK bit in the CR3 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	718 USARTx->CR3 &= CR3_NACK_Reset;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	719 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	720 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	721
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	722 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	723 * @brief Enables or disables the USART�s Half Duplex communication.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	724 * @param USARTx: Select the USART or the UART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	725 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	726 * USART1, USART2, USART3, UART4 or UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	727 * @param NewState: new state of the USART Communication.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	728 * This parameter can be: ENABLE or DISABLE.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	729 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	730 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	731 void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	732 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	733 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	734 assert_param(IS_USART_ALL_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	735 assert_param(IS_FUNCTIONAL_STATE(NewState));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	736
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	737 if (NewState != DISABLE)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	738 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	739 /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	740 USARTx->CR3 \|= CR3_HDSEL_Set;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	741 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	742 else
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	743 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	744 /* Disable the Half-Duplex mode by clearing the HDSEL bit in the CR3 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	745 USARTx->CR3 &= CR3_HDSEL_Reset;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	746 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	747 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	748
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	749
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	750 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	751 * @brief Enables or disables the USART's 8x oversampling mode.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	752 * @param USARTx: Select the USART or the UART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	753 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	754 * USART1, USART2, USART3, UART4 or UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	755 * @param NewState: new state of the USART one bit sampling method.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	756 * This parameter can be: ENABLE or DISABLE.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	757 * @note
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	758 * This function has to be called before calling USART_Init()
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	759 * function in order to have correct baudrate Divider value.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	760 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	761 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	762 void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	763 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	764 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	765 assert_param(IS_USART_ALL_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	766 assert_param(IS_FUNCTIONAL_STATE(NewState));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	767
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	768 if (NewState != DISABLE)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	769 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	770 /* Enable the 8x Oversampling mode by setting the OVER8 bit in the CR1 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	771 USARTx->CR1 \|= CR1_OVER8_Set;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	772 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	773 else
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	774 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	775 /* Disable the 8x Oversampling mode by clearing the OVER8 bit in the CR1 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	776 USARTx->CR1 &= CR1_OVER8_Reset;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	777 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	778 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	779
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	780 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	781 * @brief Enables or disables the USART's one bit sampling method.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	782 * @param USARTx: Select the USART or the UART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	783 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	784 * USART1, USART2, USART3, UART4 or UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	785 * @param NewState: new state of the USART one bit sampling method.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	786 * This parameter can be: ENABLE or DISABLE.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	787 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	788 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	789 void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	790 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	791 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	792 assert_param(IS_USART_ALL_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	793 assert_param(IS_FUNCTIONAL_STATE(NewState));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	794
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	795 if (NewState != DISABLE)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	796 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	797 /* Enable the one bit method by setting the ONEBITE bit in the CR3 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	798 USARTx->CR3 \|= CR3_ONEBITE_Set;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	799 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	800 else
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	801 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	802 /* Disable tthe one bit method by clearing the ONEBITE bit in the CR3 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	803 USARTx->CR3 &= CR3_ONEBITE_Reset;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	804 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	805 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	806
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	807 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	808 * @brief Configures the USART's IrDA interface.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	809 * @param USARTx: Select the USART or the UART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	810 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	811 * USART1, USART2, USART3, UART4 or UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	812 * @param USART_IrDAMode: specifies the IrDA mode.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	813 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	814 * @arg USART_IrDAMode_LowPower
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	815 * @arg USART_IrDAMode_Normal
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	816 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	817 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	818 void USART_IrDAConfig(USART_TypeDef* USARTx, uint16_t USART_IrDAMode)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	819 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	820 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	821 assert_param(IS_USART_ALL_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	822 assert_param(IS_USART_IRDA_MODE(USART_IrDAMode));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	823
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	824 USARTx->CR3 &= CR3_IRLP_Mask;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	825 USARTx->CR3 \|= USART_IrDAMode;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	826 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	827
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	828 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	829 * @brief Enables or disables the USART's IrDA interface.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	830 * @param USARTx: Select the USART or the UART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	831 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	832 * USART1, USART2, USART3, UART4 or UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	833 * @param NewState: new state of the IrDA mode.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	834 * This parameter can be: ENABLE or DISABLE.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	835 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	836 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	837 void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	838 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	839 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	840 assert_param(IS_USART_ALL_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	841 assert_param(IS_FUNCTIONAL_STATE(NewState));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	842
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	843 if (NewState != DISABLE)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	844 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	845 /* Enable the IrDA mode by setting the IREN bit in the CR3 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	846 USARTx->CR3 \|= CR3_IREN_Set;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	847 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	848 else
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	849 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	850 /* Disable the IrDA mode by clearing the IREN bit in the CR3 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	851 USARTx->CR3 &= CR3_IREN_Reset;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	852 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	853 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	854
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	855 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	856 * @brief Checks whether the specified USART flag is set or not.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	857 * @param USARTx: Select the USART or the UART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	858 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	859 * USART1, USART2, USART3, UART4 or UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	860 * @param USART_FLAG: specifies the flag to check.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	861 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	862 * @arg USART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	863 * @arg USART_FLAG_LBD: LIN Break detection flag
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	864 * @arg USART_FLAG_TXE: Transmit data register empty flag
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	865 * @arg USART_FLAG_TC: Transmission Complete flag
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	866 * @arg USART_FLAG_RXNE: Receive data register not empty flag
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	867 * @arg USART_FLAG_IDLE: Idle Line detection flag
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	868 * @arg USART_FLAG_ORE: OverRun Error flag
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	869 * @arg USART_FLAG_NE: Noise Error flag
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	870 * @arg USART_FLAG_FE: Framing Error flag
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	871 * @arg USART_FLAG_PE: Parity Error flag
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	872 * @retval The new state of USART_FLAG (SET or RESET).
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	873 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	874 FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t USART_FLAG)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	875 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	876 FlagStatus bitstatus = RESET;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	877 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	878 assert_param(IS_USART_ALL_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	879 assert_param(IS_USART_FLAG(USART_FLAG));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	880 /* The CTS flag is not available for UART4 and UART5 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	881 if (USART_FLAG == USART_FLAG_CTS)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	882 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	883 assert_param(IS_USART_123_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	884 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	885
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	886 if ((USARTx->SR & USART_FLAG) != (uint16_t)RESET)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	887 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	888 bitstatus = SET;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	889 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	890 else
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	891 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	892 bitstatus = RESET;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	893 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	894 return bitstatus;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	895 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	896
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	897 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	898 * @brief Clears the USARTx's pending flags.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	899 * @param USARTx: Select the USART or the UART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	900 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	901 * USART1, USART2, USART3, UART4 or UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	902 * @param USART_FLAG: specifies the flag to clear.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	903 * This parameter can be any combination of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	904 * @arg USART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5).
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	905 * @arg USART_FLAG_LBD: LIN Break detection flag.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	906 * @arg USART_FLAG_TC: Transmission Complete flag.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	907 * @arg USART_FLAG_RXNE: Receive data register not empty flag.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	908 *
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	909 * @note
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	910 * - PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	911 * error) and IDLE (Idle line detected) flags are cleared by software
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	912 * sequence: a read operation to USART_SR register (USART_GetFlagStatus())
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	913 * followed by a read operation to USART_DR register (USART_ReceiveData()).
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	914 * - RXNE flag can be also cleared by a read to the USART_DR register
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	915 * (USART_ReceiveData()).
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	916 * - TC flag can be also cleared by software sequence: a read operation to
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	917 * USART_SR register (USART_GetFlagStatus()) followed by a write operation
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	918 * to USART_DR register (USART_SendData()).
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	919 * - TXE flag is cleared only by a write to the USART_DR register
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	920 * (USART_SendData()).
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	921 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	922 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	923 void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	924 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	925 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	926 assert_param(IS_USART_ALL_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	927 assert_param(IS_USART_CLEAR_FLAG(USART_FLAG));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	928 /* The CTS flag is not available for UART4 and UART5 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	929 if ((USART_FLAG & USART_FLAG_CTS) == USART_FLAG_CTS)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	930 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	931 assert_param(IS_USART_123_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	932 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	933
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	934 USARTx->SR = (uint16_t)~USART_FLAG;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	935 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	936
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	937 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	938 * @brief Checks whether the specified USART interrupt has occurred or not.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	939 * @param USARTx: Select the USART or the UART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	940 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	941 * USART1, USART2, USART3, UART4 or UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	942 * @param USART_IT: specifies the USART interrupt source to check.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	943 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	944 * @arg USART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	945 * @arg USART_IT_LBD: LIN Break detection interrupt
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	946 * @arg USART_IT_TXE: Tansmit Data Register empty interrupt
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	947 * @arg USART_IT_TC: Transmission complete interrupt
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	948 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	949 * @arg USART_IT_IDLE: Idle line detection interrupt
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	950 * @arg USART_IT_ORE: OverRun Error interrupt
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	951 * @arg USART_IT_NE: Noise Error interrupt
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	952 * @arg USART_IT_FE: Framing Error interrupt
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	953 * @arg USART_IT_PE: Parity Error interrupt
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	954 * @retval The new state of USART_IT (SET or RESET).
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	955 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	956 ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	957 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	958 uint32_t bitpos = 0x00, itmask = 0x00, usartreg = 0x00;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	959 ITStatus bitstatus = RESET;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	960 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	961 assert_param(IS_USART_ALL_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	962 assert_param(IS_USART_GET_IT(USART_IT));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	963 /* The CTS interrupt is not available for UART4 and UART5 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	964 if (USART_IT == USART_IT_CTS)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	965 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	966 assert_param(IS_USART_123_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	967 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	968
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	969 /* Get the USART register index */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	970 usartreg = (((uint8_t)USART_IT) >> 0x05);
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	971 /* Get the interrupt position */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	972 itmask = USART_IT & IT_Mask;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	973 itmask = (uint32_t)0x01 << itmask;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	974
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	975 if (usartreg == 0x01) /* The IT is in CR1 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	976 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	977 itmask &= USARTx->CR1;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	978 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	979 else if (usartreg == 0x02) /* The IT is in CR2 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	980 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	981 itmask &= USARTx->CR2;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	982 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	983 else /* The IT is in CR3 register */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	984 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	985 itmask &= USARTx->CR3;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	986 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	987
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	988 bitpos = USART_IT >> 0x08;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	989 bitpos = (uint32_t)0x01 << bitpos;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	990 bitpos &= USARTx->SR;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	991 if ((itmask != (uint16_t)RESET)&&(bitpos != (uint16_t)RESET))
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	992 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	993 bitstatus = SET;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	994 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	995 else
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	996 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	997 bitstatus = RESET;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	998 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	999
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1000 return bitstatus;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1001 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1002
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1003 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1004 * @brief Clears the USARTx's interrupt pending bits.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1005 * @param USARTx: Select the USART or the UART peripheral.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1006 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1007 * USART1, USART2, USART3, UART4 or UART5.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1008 * @param USART_IT: specifies the interrupt pending bit to clear.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1009 * This parameter can be one of the following values:
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1010 * @arg USART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1011 * @arg USART_IT_LBD: LIN Break detection interrupt
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1012 * @arg USART_IT_TC: Transmission complete interrupt.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1013 * @arg USART_IT_RXNE: Receive Data register not empty interrupt.
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1014 *
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1015 * @note
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1016 * - PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1017 * error) and IDLE (Idle line detected) pending bits are cleared by
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1018 * software sequence: a read operation to USART_SR register
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1019 * (USART_GetITStatus()) followed by a read operation to USART_DR register
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1020 * (USART_ReceiveData()).
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1021 * - RXNE pending bit can be also cleared by a read to the USART_DR register
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1022 * (USART_ReceiveData()).
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1023 * - TC pending bit can be also cleared by software sequence: a read
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1024 * operation to USART_SR register (USART_GetITStatus()) followed by a write
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1025 * operation to USART_DR register (USART_SendData()).
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1026 * - TXE pending bit is cleared only by a write to the USART_DR register
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1027 * (USART_SendData()).
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1028 * @retval None
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1029 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1030 void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1031 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1032 uint16_t bitpos = 0x00, itmask = 0x00;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1033 /* Check the parameters */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1034 assert_param(IS_USART_ALL_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1035 assert_param(IS_USART_CLEAR_IT(USART_IT));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1036 /* The CTS interrupt is not available for UART4 and UART5 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1037 if (USART_IT == USART_IT_CTS)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1038 {
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1039 assert_param(IS_USART_123_PERIPH(USARTx));
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1040 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1041
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1042 bitpos = USART_IT >> 0x08;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1043 itmask = ((uint16_t)0x01 << (uint16_t)bitpos);
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1044 USARTx->SR = (uint16_t)~itmask;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1045 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1046 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1047 * @}
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1048 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1049
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1050 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1051 * @}
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1052 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1053
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1054 /**
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1055 * @}
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1056 */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1057
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1058 /***************** (C) COPYRIGHT 2011 STMicroelectronics *END OF FILE**/

Mercurial > ~darius > hgwebdir.cgi > stm32temp

annotate libs/STM32F10x_StdPeriph_Lib_V3.5.0/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c @ 89:fc21fb5b171b default tip