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annotate libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/FSMC/SRAM_DataMemory/MDK-ARM/startup_stm32f10x_hd_vl.s @ 44:f1cc171b06b5

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Remove useless delay test. Add GPIO PE2 changes to make testing arbitary delays possible.
author Daniel O'Connor <darius@dons.net.au>
date Tue, 02 Apr 2013 10:54:20 +1030
parents c59513fd84fb
children
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c59513fd84fb Initial commit of STM32 test code.
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1 ;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
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2 ;* File Name : startup_stm32f10x_hd.s
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3 ;* Author : MCD Application Team
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4 ;* Version : V3.5.0
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5 ;* Date : 08-April-2011
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6 ;* Description : STM32F10x High Density Devices vector table for MDK-ARM
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7 ;* toolchain.
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8 ;* This module performs:
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9 ;* - Set the initial SP
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10 ;* - Set the initial PC == Reset_Handler
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11 ;* - Set the vector table entries with the exceptions ISR address
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12 ;* - Configure the clock system and also configure the external
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13 ;* SRAM mounted on STM32100E-EVAL board to be used as data
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14 ;* memory (optional, to be enabled by user)
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15 ;* - Branches to __main in the C library (which eventually
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16 ;* calls main()).
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17 ;* After Reset the CortexM3 processor is in Thread mode,
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18 ;* priority is Privileged, and the Stack is set to Main.
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19 ;* <<< Use Configuration Wizard in Context Menu >>>
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20 ;*******************************************************************************
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21 ; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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22 ; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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23 ; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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24 ; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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25 ; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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26 ; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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27 ;*******************************************************************************
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28
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29 ; Amount of memory (in bytes) allocated for Stack
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30 ; Tailor this value to your application needs
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31 ; <h> Stack Configuration
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32 ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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33 ; </h>
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34
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35 Stack_Size EQU 0x00000400
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36
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37 AREA STACK, NOINIT, READWRITE, ALIGN=3
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38 Stack_Mem SPACE Stack_Size
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39 __initial_sp
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40
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41 __initial_spTop EQU 0x20000400 ; stack used for SystemInit & SystemInit_ExtMemCtl
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42
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43 ; <h> Heap Configuration
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44 ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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45 ; </h>
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46
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47 Heap_Size EQU 0x00000200
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48
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49 AREA HEAP, NOINIT, READWRITE, ALIGN=3
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50 __heap_base
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51 Heap_Mem SPACE Heap_Size
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52 __heap_limit
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53
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54 PRESERVE8
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55 THUMB
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56
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57
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58 ; Vector Table Mapped to Address 0 at Reset
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59 AREA RESET, DATA, READONLY
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60 EXPORT __Vectors
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61 EXPORT __Vectors_End
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62 EXPORT __Vectors_Size
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63
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64 __Vectors DCD __initial_spTop ; use internal RAM for stack for calling SystemInit
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65 DCD Reset_Handler ; Reset Handler
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66 DCD NMI_Handler ; NMI Handler
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67 DCD HardFault_Handler ; Hard Fault Handler
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68 DCD MemManage_Handler ; MPU Fault Handler
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69 DCD BusFault_Handler ; Bus Fault Handler
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70 DCD UsageFault_Handler ; Usage Fault Handler
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71 DCD 0 ; Reserved
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72 DCD 0 ; Reserved
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73 DCD 0 ; Reserved
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74 DCD 0 ; Reserved
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75 DCD SVC_Handler ; SVCall Handler
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76 DCD DebugMon_Handler ; Debug Monitor Handler
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77 DCD 0 ; Reserved
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78 DCD PendSV_Handler ; PendSV Handler
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79 DCD SysTick_Handler ; SysTick Handler
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80
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81 ; External Interrupts
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82 DCD WWDG_IRQHandler ; Window Watchdog
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83 DCD PVD_IRQHandler ; PVD through EXTI Line detect
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84 DCD TAMPER_IRQHandler ; Tamper
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85 DCD RTC_IRQHandler ; RTC
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86 DCD FLASH_IRQHandler ; Flash
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87 DCD RCC_IRQHandler ; RCC
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88 DCD EXTI0_IRQHandler ; EXTI Line 0
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89 DCD EXTI1_IRQHandler ; EXTI Line 1
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90 DCD EXTI2_IRQHandler ; EXTI Line 2
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91 DCD EXTI3_IRQHandler ; EXTI Line 3
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92 DCD EXTI4_IRQHandler ; EXTI Line 4
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93 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
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94 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
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95 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
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96 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
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97 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
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98 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
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99 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
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100 DCD ADC1_IRQHandler ; ADC1
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101 DCD 0 ; Reserved
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102 DCD 0 ; Reserved
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103 DCD 0 ; Reserved
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104 DCD 0 ; Reserved
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105 DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
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106 DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
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107 DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
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108 DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17
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109 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
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110 DCD TIM2_IRQHandler ; TIM2
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111 DCD TIM3_IRQHandler ; TIM3
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112 DCD TIM4_IRQHandler ; TIM4
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113 DCD I2C1_EV_IRQHandler ; I2C1 Event
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114 DCD I2C1_ER_IRQHandler ; I2C1 Error
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115 DCD I2C2_EV_IRQHandler ; I2C2 Event
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116 DCD I2C2_ER_IRQHandler ; I2C2 Error
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117 DCD SPI1_IRQHandler ; SPI1
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118 DCD SPI2_IRQHandler ; SPI2
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119 DCD USART1_IRQHandler ; USART1
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120 DCD USART2_IRQHandler ; USART2
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121 DCD USART3_IRQHandler ; USART3
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122 DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
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123 DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
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124 DCD CEC_IRQHandler ; HDMI-CEC
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125 DCD TIM12_IRQHandler ; TIM12
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126 DCD TIM13_IRQHandler ; TIM13
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127 DCD TIM14_IRQHandler ; TIM14
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128 DCD 0 ; Reserved
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129 DCD 0 ; Reserved
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130 DCD 0 ; Reserved
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131 DCD 0 ; Reserved
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132 DCD TIM5_IRQHandler ; TIM5
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133 DCD SPI3_IRQHandler ; SPI3
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134 DCD UART4_IRQHandler ; UART4
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135 DCD UART5_IRQHandler ; UART5
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136 DCD TIM6_DAC_IRQHandler ; TIM6 and DAC underrun
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137 DCD TIM7_IRQHandler ; TIM7
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138 DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
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139 DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
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140 DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
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141 DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
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142 DCD DMA2_Channel5_IRQHandler ; DMA2 Channel5
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143 __Vectors_End
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144
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
145 __Vectors_Size EQU __Vectors_End - __Vectors
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
146
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
147 AREA |.text|, CODE, READONLY
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
148
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
149 ; Reset handler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
150 Reset_Handler PROC
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
151 EXPORT Reset_Handler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
152 IMPORT __main
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
153 IMPORT SystemInit
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
154
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
155 LDR R0, =SystemInit
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
156 BLX R0
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
157
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
158 LDR R0, =__initial_sp ; restore original stack pointer
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
159 MSR MSP, R0
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
160
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
161 LDR R0, =__main
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
162 BX R0
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
163 ENDP
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
164
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
165 ; Dummy Exception Handlers (infinite loops which can be modified)
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
166
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
167 NMI_Handler PROC
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
168 EXPORT NMI_Handler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
169 B .
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
170 ENDP
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
171 HardFault_Handler\
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
172 PROC
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
173 EXPORT HardFault_Handler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
174 B .
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
175 ENDP
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
176 MemManage_Handler\
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
177 PROC
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
178 EXPORT MemManage_Handler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
179 B .
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
180 ENDP
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
181 BusFault_Handler\
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
182 PROC
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
183 EXPORT BusFault_Handler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
184 B .
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
185 ENDP
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
186 UsageFault_Handler\
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
187 PROC
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
188 EXPORT UsageFault_Handler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
189 B .
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
190 ENDP
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
191 SVC_Handler PROC
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
192 EXPORT SVC_Handler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
193 B .
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
194 ENDP
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
195 DebugMon_Handler\
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
196 PROC
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
197 EXPORT DebugMon_Handler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
198 B .
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
199 ENDP
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
200 PendSV_Handler PROC
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
201 EXPORT PendSV_Handler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
202 B .
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
203 ENDP
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
204 SysTick_Handler PROC
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
205 EXPORT SysTick_Handler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
206 B .
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
207 ENDP
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
208
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
209 Default_Handler PROC
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
210
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
211 EXPORT WWDG_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
212 EXPORT PVD_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
213 EXPORT TAMPER_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
214 EXPORT RTC_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
215 EXPORT FLASH_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
216 EXPORT RCC_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
217 EXPORT EXTI0_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
218 EXPORT EXTI1_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
219 EXPORT EXTI2_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
220 EXPORT EXTI3_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
221 EXPORT EXTI4_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
222 EXPORT DMA1_Channel1_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
223 EXPORT DMA1_Channel2_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
224 EXPORT DMA1_Channel3_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
225 EXPORT DMA1_Channel4_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
226 EXPORT DMA1_Channel5_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
227 EXPORT DMA1_Channel6_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
228 EXPORT DMA1_Channel7_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
229 EXPORT ADC1_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
230 EXPORT EXTI9_5_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
231 EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
232 EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
233 EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
234 EXPORT TIM1_CC_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
235 EXPORT TIM2_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
236 EXPORT TIM3_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
237 EXPORT TIM4_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
238 EXPORT I2C1_EV_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
239 EXPORT I2C1_ER_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
240 EXPORT I2C2_EV_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
241 EXPORT I2C2_ER_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
242 EXPORT SPI1_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
243 EXPORT SPI2_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
244 EXPORT USART1_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
245 EXPORT USART2_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
246 EXPORT USART3_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
247 EXPORT EXTI15_10_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
248 EXPORT RTCAlarm_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
249 EXPORT CEC_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
250 EXPORT TIM12_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
251 EXPORT TIM13_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
252 EXPORT TIM14_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
253 EXPORT TIM5_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
254 EXPORT SPI3_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
255 EXPORT UART4_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
256 EXPORT UART5_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
257 EXPORT TIM6_DAC_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
258 EXPORT TIM7_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
259 EXPORT DMA2_Channel1_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
260 EXPORT DMA2_Channel2_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
261 EXPORT DMA2_Channel3_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
262 EXPORT DMA2_Channel4_5_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
263 EXPORT DMA2_Channel5_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
264
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
265 WWDG_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
266 PVD_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
267 TAMPER_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
268 RTC_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
269 FLASH_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
270 RCC_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
271 EXTI0_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
272 EXTI1_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
273 EXTI2_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
274 EXTI3_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
275 EXTI4_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
276 DMA1_Channel1_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
277 DMA1_Channel2_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
278 DMA1_Channel3_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
279 DMA1_Channel4_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
280 DMA1_Channel5_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
281 DMA1_Channel6_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
282 DMA1_Channel7_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
283 ADC1_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
284 EXTI9_5_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
285 TIM1_BRK_TIM15_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
286 TIM1_UP_TIM16_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
287 TIM1_TRG_COM_TIM17_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
288 TIM1_CC_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
289 TIM2_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
290 TIM3_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
291 TIM4_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
292 I2C1_EV_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
293 I2C1_ER_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
294 I2C2_EV_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
295 I2C2_ER_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
296 SPI1_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
297 SPI2_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
298 USART1_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
299 USART2_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
300 USART3_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
301 EXTI15_10_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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302 RTCAlarm_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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303 CEC_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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diff changeset
304 TIM12_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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305 TIM13_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
306 TIM14_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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307 TIM5_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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diff changeset
308 SPI3_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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309 UART4_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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310 UART5_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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311 TIM6_DAC_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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312 TIM7_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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313 DMA2_Channel1_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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314 DMA2_Channel2_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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315 DMA2_Channel3_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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diff changeset
316 DMA2_Channel4_5_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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317 DMA2_Channel5_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
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318 B .
c59513fd84fb Initial commit of STM32 test code.
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319
c59513fd84fb Initial commit of STM32 test code.
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320 ENDP
c59513fd84fb Initial commit of STM32 test code.
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321
c59513fd84fb Initial commit of STM32 test code.
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322 ALIGN
c59513fd84fb Initial commit of STM32 test code.
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323
c59513fd84fb Initial commit of STM32 test code.
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324 ;*******************************************************************************
c59513fd84fb Initial commit of STM32 test code.
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325 ; User Stack and Heap initialization
c59513fd84fb Initial commit of STM32 test code.
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326 ;*******************************************************************************
c59513fd84fb Initial commit of STM32 test code.
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327 IF :DEF:__MICROLIB
c59513fd84fb Initial commit of STM32 test code.
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328
c59513fd84fb Initial commit of STM32 test code.
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329 EXPORT __initial_sp
c59513fd84fb Initial commit of STM32 test code.
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330 EXPORT __heap_base
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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331 EXPORT __heap_limit
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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332
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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333 ELSE
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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334
c59513fd84fb Initial commit of STM32 test code.
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335 IMPORT __use_two_region_memory
c59513fd84fb Initial commit of STM32 test code.
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336 EXPORT __user_initial_stackheap
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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diff changeset
337
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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diff changeset
338 __user_initial_stackheap
c59513fd84fb Initial commit of STM32 test code.
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339
c59513fd84fb Initial commit of STM32 test code.
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340 LDR R0, = Heap_Mem
c59513fd84fb Initial commit of STM32 test code.
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341 LDR R1, =(Stack_Mem + Stack_Size)
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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diff changeset
342 LDR R2, = (Heap_Mem + Heap_Size)
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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diff changeset
343 LDR R3, = Stack_Mem
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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diff changeset
344 BX LR
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
345
c59513fd84fb Initial commit of STM32 test code.
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diff changeset
346 ALIGN
c59513fd84fb Initial commit of STM32 test code.
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347
c59513fd84fb Initial commit of STM32 test code.
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348 ENDIF
c59513fd84fb Initial commit of STM32 test code.
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349
c59513fd84fb Initial commit of STM32 test code.
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350 END
c59513fd84fb Initial commit of STM32 test code.
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351
c59513fd84fb Initial commit of STM32 test code.
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352 ;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****