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annotate libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/CortexM3/MPU/accesspermission.c @ 44:f1cc171b06b5

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Remove useless delay test. Add GPIO PE2 changes to make testing arbitary delays possible.
author Daniel O'Connor <darius@dons.net.au>
date Tue, 02 Apr 2013 10:54:20 +1030
parents c59513fd84fb
children
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1 /**
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2 ******************************************************************************
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3 * @file CortexM3/MPU/accesspermission.c
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4 * @author MCD Application Team
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5 * @version V3.5.0
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6 * @date 08-April-2011
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7 * @brief Access rights configuration using Cortex-M3 MPU regions.
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8 ******************************************************************************
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9 * @attention
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10 *
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11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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17 *
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18 * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
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19 ******************************************************************************
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20 */
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21
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22
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23 /* Includes ------------------------------------------------------------------*/
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24 #include "main.h"
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25
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26 /** @addtogroup STM32F10x_StdPeriph_Examples
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27 * @{
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28 */
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29
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30 /** @addtogroup CortexM3_MPU
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31 * @{
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32 */
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33
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34 /* Private typedef -----------------------------------------------------------*/
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35 /* Private define ------------------------------------------------------------*/
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36 #define ARRAY_ADDRESS_START (0x20002000UL)
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37 #define ARRAY_SIZE (0x09UL << 0UL)
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38 #define ARRAY_REGION_NUMBER (0x03UL << MPU_RNR_REGION_Pos)
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39
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40 /* Private macro -------------------------------------------------------------*/
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41 /* Private variables ---------------------------------------------------------*/
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42
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43 #if defined ( __CC_ARM )
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44 uint8_t privilegedreadonlyarray[32] __attribute__((at(0x20002000)));
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45
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46 #elif defined ( __ICCARM__ )
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47 #pragma location=0x20002000
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48 __no_init uint8_t privilegedreadonlyarray[32];
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49
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50 #elif defined ( __GNUC__ )
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51 uint8_t privilegedreadonlyarray[32] __attribute__((section(".ROarraySection")));
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52
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53 #elif defined ( __TASKING__ )
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54 uint8_t privilegedreadonlyarray[32] __at(0x20002000);
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55 #endif
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56
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57 /* Private functions ---------------------------------------------------------*/
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58 /**
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59 * @brief This function configure the access right using Cortex-M3 MPU regions.
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60 * @param None
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61 * @retval None
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62 */
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63 void accesspermission(void)
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64 {
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65 uint8_t a;
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66
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67 /* Configure region for privilegedreadonlyarray as REGION NƯ3, 32byte and R
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68 only in privileged mode */
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69 MPU->RNR = ARRAY_REGION_NUMBER;
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70 MPU->RBAR |= ARRAY_ADDRESS_START;
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71 MPU->RASR |= ARRAY_SIZE | portMPU_REGION_PRIVILEGED_READ_ONLY;
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72
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73 /* Read from privilegedreadonlyarray. This will not generate error */
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74 a = privilegedreadonlyarray[0];
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75
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76 /* Uncomment the following line to write to privilegedreadonlyarray. This will
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77 generate error */
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78 //privilegedreadonlyarray[0] = 'e';
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79
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80 }
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81
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82 /**
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83 * @}
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84 */
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85
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86 /**
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87 * @}
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88 */
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89
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90 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/