Mercurial > ~darius > hgwebdir.cgi > stm32temp
annotate 1wire-config.h @ 44:f1cc171b06b5
Remove useless delay test. Add GPIO PE2 changes to make testing arbitary delays possible.
author | Daniel O'Connor <darius@dons.net.au> |
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date | Tue, 02 Apr 2013 10:54:20 +1030 |
parents | 38869c474104 |
children | 345a42f6151b |
rev | line source |
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13 | 1 /* |
2 * Example configuration header for 1-wire bus code. | |
3 * | |
4 * This is the user servicable stuff - how to do delays and how to | |
5 * frob the IO pins. | |
6 * | |
7 * Copyright (c) 2009 | |
8 * Daniel O'Connor <darius@dons.net.au>. All rights reserved. | |
9 * | |
10 * Redistribution and use in source and binary forms, with or without | |
11 * modification, are permitted provided that the following conditions | |
12 * are met: | |
13 * 1. Redistributions of source code must retain the above copyright | |
14 * notice, this list of conditions and the following disclaimer. | |
15 * 2. Redistributions in binary form must reproduce the above copyright | |
16 * notice, this list of conditions and the following disclaimer in the | |
17 * documentation and/or other materials provided with the distribution. | |
18 * | |
19 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND | |
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
22 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE | |
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
29 * SUCH DAMAGE. | |
30 */ | |
31 | |
32 /* | |
33 * The configuration described here has the 1-wire IO on GPIOE3, | |
34 * with no pull down, nor VPP | |
35 */ | |
36 | |
37 #include "stm32f10x.h" /* GPIO* */ | |
15
b12881051261
Use corrected delay() routine.
Daniel O'Connor <darius@dons.net.au>
parents:
13
diff
changeset
|
38 #include "delay.h" |
13 | 39 |
40 /* Fudge AVR stuff for ARM */ | |
41 #define PROGMEM | |
42 #define PSTR(x) x | |
43 #define pgm_read_byte(x) *(x) | |
44 | |
45 /* Init bus */ | |
46 #define OWBUSINIT() | |
47 | |
48 /* Set the port up to allow reading from the 1 wire bus */ | |
49 #define OWSETREAD() do { \ | |
50 GPIO_InitTypeDef GPIO_InitStructure; \ | |
51 \ | |
52 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3; \ | |
53 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; \ | |
54 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; \ | |
55 GPIO_Init(GPIOE, &GPIO_InitStructure); \ | |
56 } while (0) | |
57 | |
58 | |
59 /* Read the 1-wire bus, non-inverting logic */ | |
60 #define OWREADBUS() (GPIO_ReadInputDataBit(GPIOE, GPIO_Pin_3) ? 1 : 0) | |
61 | |
62 /* Set the 1-wire bus to 0 | |
63 */ | |
64 #define OWSETBUSLOW() do { \ | |
65 GPIO_InitTypeDef GPIO_InitStructure; \ | |
66 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3; \ | |
67 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; \ | |
68 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; \ | |
69 GPIO_Init(GPIOE, &GPIO_InitStructure); \ | |
70 GPIO_ResetBits(GPIOE, GPIO_Pin_3); \ | |
71 } while (0) | |
72 | |
73 /* Set the 1-wire bus to 1 | |
74 * Change to input and let the pull up do its job | |
75 */ | |
76 #define OWSETBUSHIGH() do { \ | |
77 GPIO_InitTypeDef GPIO_InitStructure; \ | |
78 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3; \ | |
79 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; \ | |
80 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; \ | |
81 GPIO_Init(GPIOE, &GPIO_InitStructure); \ | |
82 } while (0) | |
83 | |
15
b12881051261
Use corrected delay() routine.
Daniel O'Connor <darius@dons.net.au>
parents:
13
diff
changeset
|
84 #define OWDELAY_A delay(6) /* 6 usec */ |
38 | 85 #define OWDELAY_B delay(65) /* 64 usec */ |
15
b12881051261
Use corrected delay() routine.
Daniel O'Connor <darius@dons.net.au>
parents:
13
diff
changeset
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86 #define OWDELAY_C delay(60) /* 60 usec */ |
b12881051261
Use corrected delay() routine.
Daniel O'Connor <darius@dons.net.au>
parents:
13
diff
changeset
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87 #define OWDELAY_D delay(10) /* 10 usec */ |
b12881051261
Use corrected delay() routine.
Daniel O'Connor <darius@dons.net.au>
parents:
13
diff
changeset
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88 #define OWDELAY_E delay(9) /* 9 usec */ |
b12881051261
Use corrected delay() routine.
Daniel O'Connor <darius@dons.net.au>
parents:
13
diff
changeset
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89 #define OWDELAY_F delay(55) /* 55 usec */ |
b12881051261
Use corrected delay() routine.
Daniel O'Connor <darius@dons.net.au>
parents:
13
diff
changeset
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90 #define OWDELAY_G /* 0 usec */ |
b12881051261
Use corrected delay() routine.
Daniel O'Connor <darius@dons.net.au>
parents:
13
diff
changeset
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91 #define OWDELAY_H delay(480) /* 480 usec */ |
b12881051261
Use corrected delay() routine.
Daniel O'Connor <darius@dons.net.au>
parents:
13
diff
changeset
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92 #define OWDELAY_I delay(70) /* 70 usec */ |
b12881051261
Use corrected delay() routine.
Daniel O'Connor <darius@dons.net.au>
parents:
13
diff
changeset
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93 #define OWDELAY_J delay(410) /* 410 usec */ |
38 | 94 |
15
b12881051261
Use corrected delay() routine.
Daniel O'Connor <darius@dons.net.au>
parents:
13
diff
changeset
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95 //#define OW_DEBUG |
13 | 96 #ifdef OW_DEBUG |
97 #define OWPUTS(x) puts(x) | |
98 #define OWPUTSP(x) puts(x) | |
99 #define OWPRINTFP(fmt, ...) printf(fmt, ## __VA_ARGS__) | |
100 #else | |
101 #define OWPUTS(x) | |
102 #define OWPUTSP(x) | |
103 #define OWPRINTFP(fmt, ...) | |
104 #endif |