stm32temp: hw.c annotate

annotate hw.c @ 16:db6011aa94d6

Use new delay routine on pin 2 so it doesn't interfere with 1 wire.

author	Daniel O'Connor <darius@dons.net.au>
date	Wed, 14 Nov 2012 12:30:05 +1030
parents	96c345d304af
children	afdd22502c2a

rev	line source
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1 #include <stdint.h>
10 0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	2 #include <stdio.h>
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	3 #include "stm32f10x.h"
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	4
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	5 #include "1wire.h"
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	6 #include "lcd.h"
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	7
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	8 static void hw_port_cfg(void);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	9
10 0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	10 /* Wait for cnt microseconds */
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	11 void
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	12 _usleep16(uint16_t cnt) {
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	13 TIM6->ARR = cnt > 3 ? cnt - 3 : cnt;
10 0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	14 TIM_SetCounter(TIM6, 0);
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	15 TIM_Cmd(TIM6, ENABLE);
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	16 while ((TIM6->CR1 & TIM_CR1_CEN) != 0)
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	17 ;
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	18 }
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	19
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	20 void
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	21 hw_init(void) {
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	22 hw_port_cfg();
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	23 lcd_init();
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	24 lcd_setpwm(1000);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	25 }
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	26
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	27 static void
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	28 hw_port_cfg(void) {
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	29 GPIO_InitTypeDef GPIO_InitStructure;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	30 USART_InitTypeDef USART_InitStructure;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	31 SPI_InitTypeDef SPI_InitStructure;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	32 FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	33 FSMC_NORSRAMTimingInitTypeDef p;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	34 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	35
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	36 /* RTC stuff */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	37 /* Enable PWR and BKP clocks */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	38 RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR \| RCC_APB1Periph_BKP, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	39
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	40 /* Allow access to BKP Domain */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	41 PWR_BackupAccessCmd(ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	42
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	43 /* Reset Backup Domain
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	44 *
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	45 * This resets the RTC etc back to 0 so probably only useful under user command
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	46 BKP_DeInit();
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	47 */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	48
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	49 /* Enable Low Speed External clock */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	50 RCC_LSEConfig(RCC_LSE_ON);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	51
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	52 /* Wait till LSE is ready */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	53 while (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET)
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	54 ;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	55
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	56 /* Select LSE as RTC Clock Source */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	57 RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	58
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	59 /* Enable RTC Clock */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	60 RCC_RTCCLKCmd(ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	61
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	62 /* Wait for RTC registers synchronization */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	63 RTC_WaitForSynchro();
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	64
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	65 /* Wait until last write operation on RTC registers has finished */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	66 RTC_WaitForLastTask();
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	67
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	68 /* Wait until last write operation on RTC registers has finished */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	69 RTC_WaitForLastTask();
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	70
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	71 /* Set RTC prescaler: set RTC period to 1sec */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	72 RTC_SetPrescaler(32767); /* RTC period = RTCCLK/RTC_PR = (32.768 KHz)/(32767+1) */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	73
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	74 /* Wait until last write operation on RTC registers has finished */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	75 RTC_WaitForLastTask();
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	76
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	77 /* Clock setup */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	78 RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 \| RCC_APB2Periph_GPIOA, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	79
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	80 /* Port configuration */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	81 /* Configure USART1 TX (PA.09) as alternate function push-pull */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	82 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	83 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	84 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	85 GPIO_Init(GPIOA, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	86
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	87 /* Configure USART1 RX (PA.10) as input floating */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	88 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	89 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	90 GPIO_Init(GPIOA, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	91
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	92 /* Enable GPIOB clock */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	93 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	94
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	95 /* Configure PB5 as output push-pull for LED */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	96 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	97 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	98 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	99 GPIO_Init(GPIOB, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	100
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	101 /* Configure PB15 as input pull-up push-pull for push button */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	102 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	103 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	104 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	105 GPIO_Init(GPIOB, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	106
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	107 /* USART configuration */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	108 /* USART1 - 115200 8n1, no flow control TX & RX enabled */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	109 USART_InitStructure.USART_BaudRate = 115200;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	110 USART_InitStructure.USART_WordLength = USART_WordLength_8b;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	111 USART_InitStructure.USART_StopBits = USART_StopBits_1;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	112 USART_InitStructure.USART_Parity = USART_Parity_No;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	113 USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	114 USART_InitStructure.USART_Mode = USART_Mode_Rx \| USART_Mode_Tx;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	115 USART_Init(USART1, &USART_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	116
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	117 /* Enable interrupts on receive data */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	118 USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	119
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	120 /* Enable USART */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	121 USART_Cmd(USART1, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	122
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	123 /* Enable FSMC clock */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	124 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	125
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	126 /* Enable alternate function IO clock */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	127 RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	128
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	129 /* Enable GPIOD clock */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	130 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	131
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	132 /* Enable GPIOD clock */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	133 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOE, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	134
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	135 /* Configures LCD Control lines (FSMC Pins) in alternate function Push-Pull mode.
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	136 *
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	137 * PD0(D2), PD1(D3), PD4(NOE), PD5(NWE), PD7(NE1/CS), PD8(D13), PD9(D14),
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	138 * PD10(D15), PD11(A16/RS) PD14(D0), PD15(D1)
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	139 */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	140 GPIO_InitStructure.GPIO_Pin = (GPIO_Pin_0 \| GPIO_Pin_1 \| GPIO_Pin_4 \| GPIO_Pin_5 \| GPIO_Pin_7 \|
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	141 GPIO_Pin_8 \| GPIO_Pin_9 \| GPIO_Pin_10 \| GPIO_Pin_11 \|
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	142 GPIO_Pin_14 \| GPIO_Pin_15);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	143 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	144 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	145 GPIO_Init(GPIOD, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	146
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	147 /* PE7(D4), PE8(D5), PE9(D6), PE10(D7), PE11(D8), PE12(D9), PE13(D10),
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	148 * PE14(D11), PE15(D12)
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	149 */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	150 GPIO_InitStructure.GPIO_Pin = (GPIO_Pin_7 \| GPIO_Pin_8 \| GPIO_Pin_9 \| GPIO_Pin_10 \|
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	151 GPIO_Pin_11 \| GPIO_Pin_12 \| GPIO_Pin_13 \| GPIO_Pin_14 \|
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	152 GPIO_Pin_15);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	153 GPIO_Init(GPIOE, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	154
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	155 /* Configure backlight control (PD13/FSMC_A18 remapped to TIM4_CH2) */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	156 /* Enable TIM4 clock */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	157 RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	158
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	159 /* Enable timer function
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	160 * Note source clock is SYSCLK / 2 = 36MHz
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	161 */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	162 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	163 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	164 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	165 GPIO_Init(GPIOD, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	166
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	167 /* Remap TIM4_CH2 to PD13 */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	168 GPIO_PinRemapConfig(GPIO_Remap_TIM4, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	169
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	170 /* Reset TIM4 */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	171 TIM_DeInit(TIM4);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	172
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	173 /* Time Base configuration */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	174 TIM_TimeBaseStructure.TIM_Period = 999;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	175 TIM_TimeBaseStructure.TIM_Prescaler = 0;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	176 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	177 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Down;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	178
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	179 TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	180
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	181 /* Enable timer */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	182 TIM_OC2PreloadConfig(TIM4, TIM_OCPreload_Enable);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	183 TIM_ARRPreloadConfig(TIM4, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	184 TIM_Cmd(TIM4, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	185
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	186 /* Configure reset pin (PE1) as GPIO out PP */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	187 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	188 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	189 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	190 GPIO_Init(GPIOE, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	191
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	192 /* Configures the Parallel interface (FSMC) for LCD (Parallel mode) */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	193 /* Timing configuration */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	194 p.FSMC_AddressSetupTime = 5;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	195 p.FSMC_AddressHoldTime = 5;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	196 p.FSMC_DataSetupTime = 5;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	197 p.FSMC_BusTurnAroundDuration = 0;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	198 p.FSMC_CLKDivision = 0;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	199 p.FSMC_DataLatency = 0;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	200 p.FSMC_AccessMode = FSMC_AccessMode_A;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	201
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	202 /* FSMC_Bank1_NORSRAM1 configured as follows:
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	203 - Data/Address MUX = Disable
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	204 - Memory Type = SRAM
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	205 - Data Width = 16bit
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	206 - Write Operation = Enable
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	207 - Extended Mode = Disable
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	208 - Asynchronous Wait = Disable */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	209 FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	210 FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	211 FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	212 FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	213 FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	214 FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	215 FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	216 FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	217 FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	218 FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	219 FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	220 FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	221 FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	222 FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	223 FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	224 FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	225
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	226 /* Enable FSMC_Bank1_NORSRAM1 */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	227 FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	228
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	229 /* Configure touch screen controller
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	230 *
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	231 * Connected to SPI1 which is shared with the AT45DB161D.
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	232 *
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	233 * The touch screen is selected with PB7.
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	234 * The flash chip is selected with PA4.
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	235 */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	236
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	237 /* Enable SPI1 clock */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	238 RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	239
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	240 /* Configure MOSI, MISO and SCLK as alternate function PP */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	241 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 \| GPIO_Pin_6 \| GPIO_Pin_7;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	242 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	243 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	244 GPIO_Init(GPIOA, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	245
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	246 /* Configure flash chip select pin (PA4) as GPIO out PP */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	247 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	248 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	249 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	250 GPIO_Init(GPIOA, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	251
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	252 /* Configure touch chip select pin (PB7) as GPIO out PP */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	253 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	254 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	255 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	256 GPIO_Init(GPIOB, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	257
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	258 /* De-select touch & flash */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	259 GPIO_SetBits(GPIOA, GPIO_Pin_4);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	260 GPIO_SetBits(GPIOB, GPIO_Pin_7);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	261
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	262 /* SPI1 Config */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	263 SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	264 SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	265 SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	266 SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	267 SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	268 SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	269 SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_64;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	270 SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	271 SPI_InitStructure.SPI_CRCPolynomial = 7;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	272 SPI_Init(SPI1, &SPI_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	273
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	274 /* SPI1 enable */
10 0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	275 SPI_Cmd(SPI1, ENABLE);
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	276
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	277 /* Configure TIM6 for interval timing */
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	278 RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM6, ENABLE);
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	279
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	280 /* Reset TIM6 */
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	281 TIM_DeInit(TIM6);
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	282
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	283 /* Time Base configuration */
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	284 TIM_TimeBaseStructure.TIM_Period = 0;
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	285 TIM_TimeBaseStructure.TIM_Prescaler = (SystemCoreClock / 2 / 1000000) - 1; /* 1 MHz clock */
10 0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	286 TIM_TimeBaseInit(TIM6, &TIM_TimeBaseStructure);
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	287
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	288 TIM_Cmd(TIM6, DISABLE);
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	289
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	290 /* Setup for single pulse mode clear UDIS */
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	291 TIM_SelectOnePulseMode(TIM6, TIM_OPMode_Single);
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	292 TIM_UpdateDisableConfig(TIM6, DISABLE);
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	293
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	294 /* Setup GPIO for 1-wire */
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	295 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2 \| GPIO_Pin_3;
10 0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	296 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	297 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	298 GPIO_Init(GPIOE, &GPIO_InitStructure);
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	299
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	300 OWInit();
10 0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	301
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	302 #if 0
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	303 while (1) {
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	304 GPIO_SetBits(GPIOE, GPIO_Pin_2);
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	305 _usleep16(10);
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	306 GPIO_ResetBits(GPIOE, GPIO_Pin_2);
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	307 _usleep16(20);
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	308 GPIO_SetBits(GPIOE, GPIO_Pin_2);
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	309 _usleep16(30);
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	310 GPIO_ResetBits(GPIOE, GPIO_Pin_2);
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	311 _usleep16(100);
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	312 }
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	313 #endif
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	314 }

Mercurial > ~darius > hgwebdir.cgi > stm32temp

annotate hw.c @ 16:db6011aa94d6