Mercurial > ~darius > hgwebdir.cgi > stm32temp
annotate startup_stm32f10x_md_mthomas.c @ 50:d7207a9d3c3b
Add write support. LFN still broken though.
Make sure we wait for the card to be done after a read or write (didn't seem to break reading but hosed writes).
author | Daniel O'Connor <darius@dons.net.au> |
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date | Fri, 05 Apr 2013 00:08:31 +1030 |
parents | 74e9b3baac1e |
children | 6ad0603ea909 |
rev | line source |
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1 /** |
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2 ****************************************************************************** |
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3 * @file startup_stm32f10x_md.c |
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4 * @author MCD Application Team, modified by Martin Thomas |
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5 * @version V3.0.0-mthomas4 |
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6 * @date 19. Mar. 2010 |
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7 * @brief STM32F10x Medium Density Devices vector table for GNU toolchain. |
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8 * This module performs: |
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9 * - Set the initial SP |
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10 * - Set the initial PC == Reset_Handler, |
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11 * - Set the vector table entries with the exceptions ISR address |
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12 * - Configure the clock system |
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13 * - Branches to main in the C library (which eventually |
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14 * calls main()). |
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15 * After Reset the Cortex-M3 processor is in Thread mode, |
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16 * priority is Privileged, and the Stack is set to Main. |
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17 ******************************************************************************* |
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18 * @copy |
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19 * |
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20 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
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21 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE |
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22 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY |
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23 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING |
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24 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE |
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25 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
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26 * |
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27 * <h2><center>© COPYRIGHT 2009 STMicroelectronics, 2010 M.Thomas</center></h2> |
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28 */ |
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29 |
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30 /* Modified by Martin Thomas |
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31 - to take VECT_TAB_RAM setting into account, also see the linker-script |
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32 - to avoid warning "ISO C forbids initialization between function pointer and 'void *'". |
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33 - added optional startup-delay to avoid unwanted operations while connecting with |
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34 debugger/programmer |
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35 - tested with the GNU arm-eabi toolchain as in CS G++ lite Q1/2009-161 |
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36 - minor modification in .data copy to avoid copy while "run from RAM" |
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37 during debugging |
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38 */ |
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39 |
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40 /* Includes ------------------------------------------------------------------*/ |
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41 /* Private typedef -----------------------------------------------------------*/ |
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42 /* Private typedef -----------------------------------------------------------*/ |
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43 typedef void( *const intfunc )( void ); |
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44 |
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45 /* Private define ------------------------------------------------------------*/ |
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46 #define WEAK __attribute__ ((weak)) |
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47 |
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48 /* Private macro -------------------------------------------------------------*/ |
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49 extern unsigned long _etext; |
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50 /* start address for the initialization values of the .data section. |
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51 defined in linker script */ |
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52 extern unsigned long _sidata; |
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53 |
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54 /* start address for the .data section. defined in linker script */ |
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55 extern unsigned long _sdata; |
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56 |
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57 /* end address for the .data section. defined in linker script */ |
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58 extern unsigned long _edata; |
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59 |
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60 /* start address for the .bss section. defined in linker script */ |
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61 extern unsigned long _sbss; |
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62 |
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63 /* end address for the .bss section. defined in linker script */ |
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64 extern unsigned long _ebss; |
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65 |
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66 /* init value for the stack pointer. defined in linker script */ |
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67 extern unsigned long _estack; |
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68 |
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69 /* Private variables ---------------------------------------------------------*/ |
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70 |
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71 /* Private function prototypes -----------------------------------------------*/ |
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72 void Reset_Handler(void) __attribute__((__interrupt__)); |
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73 void __Init_Data_and_BSS(void); |
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74 void Default_Handler(void); |
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75 |
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76 /* External function prototypes ----------------------------------------------*/ |
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77 extern int main(void); /* Application's main function */ |
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78 extern void SystemInit(void); /* STM's system init */ |
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79 extern void __libc_init_array(void); /* calls CTORS of static objects */ |
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80 |
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81 |
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82 /******************************************************************************* |
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83 * |
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84 * Forward declaration of the default fault handlers. |
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85 * |
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86 *******************************************************************************/ |
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87 //mthomas void WEAK Reset_Handler(void); |
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88 void WEAK NMI_Handler(void); |
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89 void WEAK HardFault_Handler(void); |
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90 void WEAK MemManage_Handler(void); |
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91 void WEAK BusFault_Handler(void); |
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92 void WEAK UsageFault_Handler(void); |
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93 //mthomas void WEAK MemManage_Handler(void); |
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94 void WEAK SVC_Handler(void); |
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95 void WEAK DebugMon_Handler(void); |
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96 void WEAK PendSV_Handler(void); |
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97 void WEAK SysTick_Handler(void); |
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98 |
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99 /* External Interrupts */ |
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100 void WEAK WWDG_IRQHandler(void); |
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101 void WEAK PVD_IRQHandler(void); |
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102 void WEAK TAMPER_IRQHandler(void); |
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103 void WEAK RTC_IRQHandler(void); |
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104 void WEAK FLASH_IRQHandler(void); |
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105 void WEAK RCC_IRQHandler(void); |
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106 void WEAK EXTI0_IRQHandler(void); |
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107 void WEAK EXTI1_IRQHandler(void); |
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108 void WEAK EXTI2_IRQHandler(void); |
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109 void WEAK EXTI3_IRQHandler(void); |
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110 void WEAK EXTI4_IRQHandler(void); |
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111 void WEAK DMA1_Channel1_IRQHandler(void); |
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112 void WEAK DMA1_Channel2_IRQHandler(void); |
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113 void WEAK DMA1_Channel3_IRQHandler(void); |
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114 void WEAK DMA1_Channel4_IRQHandler(void); |
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115 void WEAK DMA1_Channel5_IRQHandler(void); |
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116 void WEAK DMA1_Channel6_IRQHandler(void); |
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117 void WEAK DMA1_Channel7_IRQHandler(void); |
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118 void WEAK ADC1_2_IRQHandler(void); |
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119 void WEAK USB_HP_CAN1_TX_IRQHandler(void); |
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120 void WEAK USB_LP_CAN1_RX0_IRQHandler(void); |
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121 void WEAK CAN1_RX1_IRQHandler(void); |
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122 void WEAK CAN1_SCE_IRQHandler(void); |
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123 void WEAK EXTI9_5_IRQHandler(void); |
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124 void WEAK TIM1_BRK_IRQHandler(void); |
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125 void WEAK TIM1_UP_IRQHandler(void); |
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126 void WEAK TIM1_TRG_COM_IRQHandler(void); |
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127 void WEAK TIM1_CC_IRQHandler(void); |
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128 void WEAK TIM2_IRQHandler(void); |
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129 void WEAK TIM3_IRQHandler(void); |
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130 void WEAK TIM4_IRQHandler(void); |
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131 void WEAK I2C1_EV_IRQHandler(void); |
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132 void WEAK I2C1_ER_IRQHandler(void); |
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133 void WEAK I2C2_EV_IRQHandler(void); |
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134 void WEAK I2C2_ER_IRQHandler(void); |
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135 void WEAK SPI1_IRQHandler(void); |
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136 void WEAK SPI2_IRQHandler(void); |
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137 void WEAK USART1_IRQHandler(void); |
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138 void WEAK USART2_IRQHandler(void); |
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139 void WEAK USART3_IRQHandler(void); |
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140 void WEAK EXTI15_10_IRQHandler(void); |
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141 void WEAK RTCAlarm_IRQHandler(void); |
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142 void WEAK USBWakeUp_IRQHandler(void); |
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143 |
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144 /* Private functions ---------------------------------------------------------*/ |
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145 /****************************************************************************** |
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146 * |
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147 * mthomas: If been built with VECT_TAB_RAM this creates two tables: |
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148 * (1) a minimal table (stack-pointer, reset-vector) used during startup |
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149 * before relocation of the vector table using SCB_VTOR |
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150 * (2) a full table which is copied to RAM and used after vector relocation |
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151 * (NVIC_SetVectorTable) |
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152 * If been built without VECT_TAB_RAM the following comment from STM is valid: |
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153 * The minimal vector table for a Cortex M3. Note that the proper constructs |
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154 * must be placed on this to ensure that it ends up at physical address |
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155 * 0x0000.0000. |
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156 * |
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157 ******************************************************************************/ |
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158 |
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159 #ifdef VECT_TAB_RAM |
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160 __attribute__ ((section(".isr_vectorsflash"))) |
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161 void (* const g_pfnVectorsStartup[])(void) = |
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162 { |
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163 (intfunc)((unsigned long)&_estack), /* The initial stack pointer during startup */ |
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164 Reset_Handler, /* The reset handler during startup */ |
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165 HardFault_Handler, /* Hard Fault Handler */ |
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166 MemManage_Handler, /* MPU Fault Handler */ |
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167 BusFault_Handler, /* Bus Fault Handler */ |
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168 UsageFault_Handler, /* Usage Fault Handler */ |
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169 }; |
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170 __attribute__ ((section(".isr_vectorsram"))) |
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171 void (* g_pfnVectors[])(void) = |
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172 #else /* VECT_TAB_RAM */ |
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173 __attribute__ ((section(".isr_vectorsflash"))) |
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174 void (* const g_pfnVectors[])(void) = |
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175 #endif /* VECT_TAB_RAM */ |
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176 { |
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177 (intfunc)((unsigned long)&_estack), /* The stack pointer after relocation */ |
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178 Reset_Handler, /* Reset Handler */ |
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179 NMI_Handler, /* NMI Handler */ |
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180 HardFault_Handler, /* Hard Fault Handler */ |
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181 MemManage_Handler, /* MPU Fault Handler */ |
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182 BusFault_Handler, /* Bus Fault Handler */ |
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183 UsageFault_Handler, /* Usage Fault Handler */ |
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184 0, /* Reserved */ |
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185 0, /* Reserved */ |
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186 0, /* Reserved */ |
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187 0, /* Reserved */ |
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188 SVC_Handler, /* SVCall Handler */ |
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189 DebugMon_Handler, /* Debug Monitor Handler */ |
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190 0, /* Reserved */ |
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191 PendSV_Handler, /* PendSV Handler */ |
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192 SysTick_Handler, /* SysTick Handler */ |
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193 |
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194 /* External Interrupts */ |
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195 WWDG_IRQHandler, /* Window Watchdog */ |
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196 PVD_IRQHandler, /* PVD through EXTI Line detect */ |
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197 TAMPER_IRQHandler, /* Tamper */ |
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198 RTC_IRQHandler, /* RTC */ |
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199 FLASH_IRQHandler, /* Flash */ |
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200 RCC_IRQHandler, /* RCC */ |
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201 EXTI0_IRQHandler, /* EXTI Line 0 */ |
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202 EXTI1_IRQHandler, /* EXTI Line 1 */ |
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203 EXTI2_IRQHandler, /* EXTI Line 2 */ |
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204 EXTI3_IRQHandler, /* EXTI Line 3 */ |
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205 EXTI4_IRQHandler, /* EXTI Line 4 */ |
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206 DMA1_Channel1_IRQHandler, /* DMA1 Channel 1 */ |
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207 DMA1_Channel2_IRQHandler, /* DMA1 Channel 2 */ |
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208 DMA1_Channel3_IRQHandler, /* DMA1 Channel 3 */ |
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209 DMA1_Channel4_IRQHandler, /* DMA1 Channel 4 */ |
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210 DMA1_Channel5_IRQHandler, /* DMA1 Channel 5 */ |
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211 DMA1_Channel6_IRQHandler, /* DMA1 Channel 6 */ |
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212 DMA1_Channel7_IRQHandler, /* DMA1 Channel 7 */ |
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213 ADC1_2_IRQHandler, /* ADC1 & ADC2 */ |
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214 USB_HP_CAN1_TX_IRQHandler, /* USB High Priority or CAN1 TX */ |
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215 USB_LP_CAN1_RX0_IRQHandler, /* USB Low Priority or CAN1 RX0 */ |
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216 CAN1_RX1_IRQHandler, /* CAN1 RX1 */ |
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217 CAN1_SCE_IRQHandler, /* CAN1 SCE */ |
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218 EXTI9_5_IRQHandler, /* EXTI Line 9..5 */ |
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219 TIM1_BRK_IRQHandler, /* TIM1 Break */ |
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220 TIM1_UP_IRQHandler, /* TIM1 Update */ |
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221 TIM1_TRG_COM_IRQHandler, /* TIM1 Trigger and Commutation */ |
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222 TIM1_CC_IRQHandler, /* TIM1 Capture Compare */ |
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223 TIM2_IRQHandler, /* TIM2 */ |
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224 TIM3_IRQHandler, /* TIM3 */ |
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225 TIM4_IRQHandler, /* TIM4 */ |
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226 I2C1_EV_IRQHandler, /* I2C1 Event */ |
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227 I2C1_ER_IRQHandler, /* I2C1 Error */ |
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228 I2C2_EV_IRQHandler, /* I2C2 Event */ |
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229 I2C2_ER_IRQHandler, /* I2C2 Error */ |
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230 SPI1_IRQHandler, /* SPI1 */ |
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231 SPI2_IRQHandler, /* SPI2 */ |
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232 USART1_IRQHandler, /* USART1 */ |
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233 USART2_IRQHandler, /* USART2 */ |
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234 USART3_IRQHandler, /* USART3 */ |
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235 EXTI15_10_IRQHandler, /* EXTI Line 15..10 */ |
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236 RTCAlarm_IRQHandler, /* RTC Alarm through EXTI Line */ |
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237 USBWakeUp_IRQHandler, /* USB Wakeup from suspend */ |
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238 0,0,0,0,0,0,0, |
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239 (intfunc)0xF108F85F /* @0x108. This is for boot in RAM mode for |
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240 STM32F10x Medium Density devices. */ |
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241 }; |
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242 |
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243 /** |
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244 * @brief This is the code that gets called when the processor first |
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245 * starts execution following a reset event. Only the absolutely |
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246 * necessary set is performed, after which the application |
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247 * supplied main() routine is called. |
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248 * @param None |
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249 * @retval : None |
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250 */ |
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251 |
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252 void Reset_Handler(void) |
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253 { |
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254 |
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255 #ifdef STARTUP_DELAY |
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256 volatile unsigned long i; |
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257 for (i=0;i<500000;i++) { ; } |
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258 #endif |
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259 |
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260 /* Initialize data and bss */ |
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261 __Init_Data_and_BSS(); |
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262 |
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263 /* Call CTORS of static objects, not needed for "pure C": */ |
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264 /* __libc_init_array(); */ |
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265 |
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266 /* Setup the microcontroller system. Initialize the Embedded Flash Interface, |
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267 initialize the PLL and update the SystemFrequency variable. */ |
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268 SystemInit(); |
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269 |
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270 /* Call the application's entry point.*/ |
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271 main(); |
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272 |
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273 while(1) { |
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274 } |
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275 } |
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276 |
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277 /** |
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278 * @brief initializes data and bss sections |
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279 * @param None |
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280 * @retval : None |
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281 */ |
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282 |
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283 void |
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284 __Init_Data_and_BSS(void) { |
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285 unsigned long *pulSrc, *pulDest; |
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286 |
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287 /* Copy the data segment initializers from flash to SRAM */ |
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288 pulSrc = &_sidata; |
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289 pulDest = &_sdata; |
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290 if (pulSrc != pulDest) { |
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291 for(; pulDest < &_edata; ) { |
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292 *(pulDest++) = *(pulSrc++); |
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293 } |
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294 } |
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295 /* Zero fill the bss segment. */ |
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296 for(pulDest = &_sbss; pulDest < &_ebss; ) { |
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297 *(pulDest++) = 0; |
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298 } |
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299 } |
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300 |
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301 /******************************************************************************* |
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302 * |
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303 * Provide weak aliases for each Exception handler to the Default_Handler. |
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304 * As they are weak aliases, any function with the same name will override |
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305 * this definition. |
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306 * |
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307 *******************************************************************************/ |
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308 #pragma weak MMI_Handler = Default_Handler |
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309 #pragma weak MemManage_Handler = Default_Handler |
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310 #pragma weak BusFault_Handler = Default_Handler |
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311 #pragma weak UsageFault_Handler = Default_Handler |
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312 #pragma weak SVC_Handler = Default_Handler |
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313 #pragma weak DebugMon_Handler = Default_Handler |
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314 #pragma weak PendSV_Handler = Default_Handler |
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315 #pragma weak SysTick_Handler = Default_Handler |
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316 #pragma weak WWDG_IRQHandler = Default_Handler |
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317 #pragma weak PVD_IRQHandler = Default_Handler |
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318 #pragma weak TAMPER_IRQHandler = Default_Handler |
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319 #pragma weak RTC_IRQHandler = Default_Handler |
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320 #pragma weak FLASH_IRQHandler = Default_Handler |
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321 #pragma weak RCC_IRQHandler = Default_Handler |
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322 #pragma weak EXTI0_IRQHandler = Default_Handler |
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323 #pragma weak EXTI1_IRQHandler = Default_Handler |
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324 #pragma weak EXTI2_IRQHandler = Default_Handler |
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325 #pragma weak EXTI3_IRQHandler = Default_Handler |
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326 #pragma weak EXTI4_IRQHandler = Default_Handler |
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327 #pragma weak DMA1_Channel1_IRQHandler = Default_Handler |
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328 #pragma weak DMA1_Channel2_IRQHandler = Default_Handler |
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329 #pragma weak DMA1_Channel3_IRQHandler = Default_Handler |
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330 #pragma weak DMA1_Channel4_IRQHandler = Default_Handler |
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331 #pragma weak DMA1_Channel5_IRQHandler = Default_Handler |
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332 #pragma weak DMA1_Channel6_IRQHandler = Default_Handler |
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333 #pragma weak DMA1_Channel7_IRQHandler = Default_Handler |
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334 #pragma weak ADC1_2_IRQHandler = Default_Handler |
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335 #pragma weak USB_HP_CAN1_TX_IRQHandler = Default_Handler |
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336 #pragma weak USB_LP_CAN1_RX0_IRQHandler = Default_Handler |
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337 #pragma weak CAN1_RX1_IRQHandler = Default_Handler |
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338 #pragma weak CAN1_SCE_IRQHandler = Default_Handler |
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339 #pragma weak EXTI9_5_IRQHandler = Default_Handler |
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340 #pragma weak TIM1_BRK_IRQHandler = Default_Handler |
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341 #pragma weak TIM1_UP_IRQHandler = Default_Handler |
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342 #pragma weak TIM1_TRG_COM_IRQHandler = Default_Handler |
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343 #pragma weak TIM1_CC_IRQHandler = Default_Handler |
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344 #pragma weak TIM2_IRQHandler = Default_Handler |
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345 #pragma weak TIM3_IRQHandler = Default_Handler |
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346 #pragma weak TIM4_IRQHandler = Default_Handler |
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347 #pragma weak I2C1_EV_IRQHandler = Default_Handler |
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348 #pragma weak I2C1_ER_IRQHandler = Default_Handler |
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349 #pragma weak I2C2_EV_IRQHandler = Default_Handler |
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350 #pragma weak I2C2_ER_IRQHandler = Default_Handler |
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351 #pragma weak SPI1_IRQHandler = Default_Handler |
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352 #pragma weak SPI2_IRQHandler = Default_Handler |
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353 #pragma weak USART1_IRQHandler = Default_Handler |
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354 #pragma weak USART2_IRQHandler = Default_Handler |
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355 #pragma weak USART3_IRQHandler = Default_Handler |
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356 #pragma weak EXTI15_10_IRQHandler = Default_Handler |
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357 #pragma weak RTCAlarm_IRQHandler = Default_Handler |
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358 #pragma weak USBWakeUp_IRQHandler = Default_Handler |
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359 |
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360 /** |
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361 * @brief This is the code that gets called when the processor receives an |
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362 * unexpected interrupt. This simply enters an infinite loop, preserving |
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363 * the system state for examination by a debugger. |
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364 * |
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365 * @param None |
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366 * @retval : None |
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367 */ |
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368 |
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369 void |
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370 Default_Handler(void) { |
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371 /* Go into an infinite loop. */ |
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372 while (1) { |
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373 } |
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374 } |
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375 |
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376 /******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ |