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annotate libs/STM32F10x_StdPeriph_Lib_V3.5.0/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/arm/startup_stm32f10x_ld_vl.s @ 50:d7207a9d3c3b

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Add write support. LFN still broken though. Make sure we wait for the card to be done after a read or write (didn't seem to break reading but hosed writes).
author Daniel O'Connor <darius@dons.net.au>
date Fri, 05 Apr 2013 00:08:31 +1030
parents c59513fd84fb
children
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c59513fd84fb Initial commit of STM32 test code.
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1 ;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
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2 ;* File Name : startup_stm32f10x_ld_vl.s
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3 ;* Author : MCD Application Team
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4 ;* Version : V3.5.0
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5 ;* Date : 11-March-2011
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6 ;* Description : STM32F10x Low Density Value Line Devices vector table
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7 ;* for MDK-ARM toolchain.
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8 ;* This module performs:
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9 ;* - Set the initial SP
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10 ;* - Set the initial PC == Reset_Handler
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11 ;* - Set the vector table entries with the exceptions ISR address
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12 ;* - Configure the clock system
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13 ;* - Branches to __main in the C library (which eventually
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14 ;* calls main()).
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15 ;* After Reset the CortexM3 processor is in Thread mode,
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16 ;* priority is Privileged, and the Stack is set to Main.
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17 ;* <<< Use Configuration Wizard in Context Menu >>>
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18 ;*******************************************************************************
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19 ; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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20 ; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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21 ; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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22 ; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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23 ; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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24 ; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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25 ;*******************************************************************************
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26
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27 ; Amount of memory (in bytes) allocated for Stack
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28 ; Tailor this value to your application needs
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29 ; <h> Stack Configuration
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30 ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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31 ; </h>
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32
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33 Stack_Size EQU 0x00000400
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34
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35 AREA STACK, NOINIT, READWRITE, ALIGN=3
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36 Stack_Mem SPACE Stack_Size
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37 __initial_sp
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38
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39
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40 ; <h> Heap Configuration
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41 ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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42 ; </h>
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43
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44 Heap_Size EQU 0x00000200
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45
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46 AREA HEAP, NOINIT, READWRITE, ALIGN=3
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47 __heap_base
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48 Heap_Mem SPACE Heap_Size
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49 __heap_limit
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50
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51 PRESERVE8
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52 THUMB
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53
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54
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55 ; Vector Table Mapped to Address 0 at Reset
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56 AREA RESET, DATA, READONLY
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57 EXPORT __Vectors
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58 EXPORT __Vectors_End
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59 EXPORT __Vectors_Size
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60
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61 __Vectors DCD __initial_sp ; Top of Stack
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62 DCD Reset_Handler ; Reset Handler
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63 DCD NMI_Handler ; NMI Handler
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64 DCD HardFault_Handler ; Hard Fault Handler
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65 DCD MemManage_Handler ; MPU Fault Handler
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66 DCD BusFault_Handler ; Bus Fault Handler
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67 DCD UsageFault_Handler ; Usage Fault Handler
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68 DCD 0 ; Reserved
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69 DCD 0 ; Reserved
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70 DCD 0 ; Reserved
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71 DCD 0 ; Reserved
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72 DCD SVC_Handler ; SVCall Handler
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73 DCD DebugMon_Handler ; Debug Monitor Handler
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74 DCD 0 ; Reserved
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75 DCD PendSV_Handler ; PendSV Handler
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76 DCD SysTick_Handler ; SysTick Handler
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77
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78 ; External Interrupts
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79 DCD WWDG_IRQHandler ; Window Watchdog
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80 DCD PVD_IRQHandler ; PVD through EXTI Line detect
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81 DCD TAMPER_IRQHandler ; Tamper
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82 DCD RTC_IRQHandler ; RTC
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83 DCD FLASH_IRQHandler ; Flash
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84 DCD RCC_IRQHandler ; RCC
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85 DCD EXTI0_IRQHandler ; EXTI Line 0
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86 DCD EXTI1_IRQHandler ; EXTI Line 1
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87 DCD EXTI2_IRQHandler ; EXTI Line 2
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88 DCD EXTI3_IRQHandler ; EXTI Line 3
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89 DCD EXTI4_IRQHandler ; EXTI Line 4
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90 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
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91 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
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92 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
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93 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
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94 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
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95 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
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96 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
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97 DCD ADC1_IRQHandler ; ADC1
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98 DCD 0 ; Reserved
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99 DCD 0 ; Reserved
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100 DCD 0 ; Reserved
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101 DCD 0 ; Reserved
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102 DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
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103 DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
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104 DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
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105 DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17
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106 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
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107 DCD TIM2_IRQHandler ; TIM2
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108 DCD TIM3_IRQHandler ; TIM3
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109 DCD 0 ; Reserved
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110 DCD I2C1_EV_IRQHandler ; I2C1 Event
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111 DCD I2C1_ER_IRQHandler ; I2C1 Error
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112 DCD 0 ; Reserved
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113 DCD 0 ; Reserved
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114 DCD SPI1_IRQHandler ; SPI1
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115 DCD 0 ; Reserved
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116 DCD USART1_IRQHandler ; USART1
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117 DCD USART2_IRQHandler ; USART2
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118 DCD 0 ; Reserved
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119 DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
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120 DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
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121 DCD CEC_IRQHandler ; HDMI-CEC
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122 DCD 0 ; Reserved
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123 DCD 0 ; Reserved
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124 DCD 0 ; Reserved
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125 DCD 0 ; Reserved
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126 DCD 0 ; Reserved
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127 DCD 0 ; Reserved
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128 DCD 0 ; Reserved
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129 DCD 0 ; Reserved
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130 DCD 0 ; Reserved
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131 DCD 0 ; Reserved
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132 DCD 0 ; Reserved
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133 DCD TIM6_DAC_IRQHandler ; TIM6 and DAC underrun
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134 DCD TIM7_IRQHandler ; TIM7
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135 __Vectors_End
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136
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137 __Vectors_Size EQU __Vectors_End - __Vectors
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138
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139 AREA |.text|, CODE, READONLY
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140
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141 ; Reset handler
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142 Reset_Handler PROC
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143 EXPORT Reset_Handler [WEAK]
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144 IMPORT __main
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145 IMPORT SystemInit
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146 LDR R0, =SystemInit
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147 BLX R0
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
148 LDR R0, =__main
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
149 BX R0
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
150 ENDP
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
151
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
152 ; Dummy Exception Handlers (infinite loops which can be modified)
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
153
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
154 NMI_Handler PROC
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
155 EXPORT NMI_Handler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
156 B .
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
157 ENDP
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
158 HardFault_Handler\
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
159 PROC
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
160 EXPORT HardFault_Handler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
161 B .
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
162 ENDP
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
163 MemManage_Handler\
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
164 PROC
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
165 EXPORT MemManage_Handler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
166 B .
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
167 ENDP
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
168 BusFault_Handler\
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
169 PROC
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
170 EXPORT BusFault_Handler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
171 B .
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
172 ENDP
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
173 UsageFault_Handler\
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
174 PROC
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
175 EXPORT UsageFault_Handler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
176 B .
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
177 ENDP
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
178 SVC_Handler PROC
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
179 EXPORT SVC_Handler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
180 B .
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
181 ENDP
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
182 DebugMon_Handler\
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
183 PROC
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
184 EXPORT DebugMon_Handler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
185 B .
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
186 ENDP
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
187 PendSV_Handler PROC
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
188 EXPORT PendSV_Handler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
189 B .
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
190 ENDP
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
191 SysTick_Handler PROC
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
192 EXPORT SysTick_Handler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
193 B .
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
194 ENDP
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
195
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
196 Default_Handler PROC
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
197
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
198 EXPORT WWDG_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
199 EXPORT PVD_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
200 EXPORT TAMPER_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
201 EXPORT RTC_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
202 EXPORT FLASH_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
203 EXPORT RCC_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
204 EXPORT EXTI0_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
205 EXPORT EXTI1_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
206 EXPORT EXTI2_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
207 EXPORT EXTI3_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
208 EXPORT EXTI4_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
209 EXPORT DMA1_Channel1_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
210 EXPORT DMA1_Channel2_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
211 EXPORT DMA1_Channel3_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
212 EXPORT DMA1_Channel4_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
213 EXPORT DMA1_Channel5_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
214 EXPORT DMA1_Channel6_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
215 EXPORT DMA1_Channel7_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
216 EXPORT ADC1_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
217 EXPORT EXTI9_5_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
218 EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
219 EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
220 EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
221 EXPORT TIM1_CC_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
222 EXPORT TIM2_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
223 EXPORT TIM3_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
224 EXPORT I2C1_EV_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
225 EXPORT I2C1_ER_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
226 EXPORT SPI1_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
227 EXPORT USART1_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
228 EXPORT USART2_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
229 EXPORT EXTI15_10_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
230 EXPORT RTCAlarm_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
231 EXPORT CEC_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
232 EXPORT TIM6_DAC_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
233 EXPORT TIM7_IRQHandler [WEAK]
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
234 WWDG_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
235 PVD_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
236 TAMPER_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
237 RTC_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
238 FLASH_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
239 RCC_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
240 EXTI0_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
241 EXTI1_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
242 EXTI2_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
243 EXTI3_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
244 EXTI4_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
245 DMA1_Channel1_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
246 DMA1_Channel2_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
247 DMA1_Channel3_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
248 DMA1_Channel4_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
249 DMA1_Channel5_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
250 DMA1_Channel6_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
251 DMA1_Channel7_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
252 ADC1_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
253 EXTI9_5_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
254 TIM1_BRK_TIM15_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
255 TIM1_UP_TIM16_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
256 TIM1_TRG_COM_TIM17_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
257 TIM1_CC_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
258 TIM2_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
259 TIM3_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
260 I2C1_EV_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
261 I2C1_ER_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
262 SPI1_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
263 USART1_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
264 USART2_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
265 EXTI15_10_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
266 RTCAlarm_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
267 CEC_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
268 TIM6_DAC_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
269 TIM7_IRQHandler
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
270 B .
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
271
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
272 ENDP
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
273
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
274 ALIGN
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
275
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
276 ;*******************************************************************************
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
277 ; User Stack and Heap initialization
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
278 ;*******************************************************************************
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
279 IF :DEF:__MICROLIB
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
280
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
281 EXPORT __initial_sp
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
282 EXPORT __heap_base
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
283 EXPORT __heap_limit
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
284
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
285 ELSE
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
286
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
287 IMPORT __use_two_region_memory
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
288 EXPORT __user_initial_stackheap
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
289
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
290 __user_initial_stackheap
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
291
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
292 LDR R0, = Heap_Mem
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
293 LDR R1, =(Stack_Mem + Stack_Size)
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
294 LDR R2, = (Heap_Mem + Heap_Size)
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
295 LDR R3, = Stack_Mem
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
296 BX LR
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
297
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
298 ALIGN
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
299
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
300 ENDIF
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
301
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
302 END
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
303
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
304 ;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****