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annotate libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/DAC/DualModeDMA_SineWave/readme.txt @ 68:cc998b0b2bae

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Handle missing modules in OWGetTemp.
author Daniel O'Connor <darius@dons.net.au>
date Sun, 14 Apr 2013 16:07:29 +0930
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1 /**
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2 @page DAC_DualModeDMA_SineWave DAC dual mode sine wave example
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3
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4 @verbatim
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5 ******************** (C) COPYRIGHT 2011 STMicroelectronics *******************
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6 * @file DAC/DualModeDMA_SineWave/readme.txt
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7 * @author MCD Application Team
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8 * @version V3.5.0
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9 * @date 08-April-2011
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10 * @brief Description of the DAC dual mode sine wave example.
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11 ******************************************************************************
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12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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18 ******************************************************************************
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19 @endverbatim
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20
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21 @par Example Description
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22
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23 This example describes how to use DAC dual channel mode with DMA to generate sine
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24 waves on both DAC channels outputs.
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25
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26 Both DAC channels conversions are configured to be triggered by TIM2 TRGO triggers
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27 and without noise/triangle wave generation. 12bit right data alignment is selected
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28 since we choose to access DAC_DHR12RD register. DMA2 channel4 is configured to
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29 transfer continuously, word by word, a 32-word buffer to the dual DAC register
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30 DAC_DHR12RD.
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31
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32 The transferred 32buffer is made to have a sine wave generation on each DAC channel
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33 output. Both DAC channels are then enabled. Only DAC channel2 DMA capability is enabled.
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34
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35 Once TIM2 is enabled, each TIM2 TRGO update event generate a DMA request which
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36 transfer data to the dual DAC register and DAC conversion is started. The sine
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37 waves can be visualized by connecting both PA.04 and PA.05 pins to an oscilloscope.
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39
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40 @par Directory contents
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41
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42 - DAC/DualModeDMA_SineWave/stm32f10x_conf.h Library Configuration file
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43 - DAC/DualModeDMA_SineWave/stm32f10x_it.c Interrupt handlers
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44 - DAC/DualModeDMA_SineWave/stm32f10x_it.h Header for stm32f10x_it.c
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45 - DAC/DualModeDMA_SineWave/main.c Main program
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46 - DAC/DualModeDMA_SineWave/system_stm32f10x.c STM32F10x system source file
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47
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48 @par Hardware and Software environment
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49
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50 - This example runs on STM32F10x Connectivity line, High-Density, High-Density
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51 Value line, XL-Density, Medium-Density Value line and Low-Density Value line
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52 Devices.
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53
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54 - This example has been tested with STMicroelectronics STM32100E-EVAL
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55 (High-Density Value line), STM32100B-EVAL (Medium-Density Value line),
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56 STM3210C-EVAL (Connectivity line) and STM3210E-EVAL (High-Density and XL-Density)
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57 evaluation boards and can be easily tailored to any other supported device
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58 and development board.
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59
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60 - STM32100E-EVAL Set-up
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61 - Connect PA.04 and PA.05 pins to an oscilloscope
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62
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63 - STM32100B-EVAL Set-up
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64 - Connect PA.04 and PA.05 pins to an oscilloscope
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65
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66 - STM3210C-EVAL Set-up
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67 - Only PA.04 can be monitored on an oscilloscope, PA.05 is used by other
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68 module (Motor control connector) that prevents to have DAC channel output
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69 on it. However, if you don't use Motor control connector, you can remove
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70 the 0ohm resistor R84 and thus PA.05 can be used for DAC output.
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71 @note Make shure that jumper JP15 is open.
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72
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73 - STM3210E-EVAL Set-up
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74 - Connect PA.04 and PA.05 pins to an oscilloscope
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75
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76
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77 @par How to use it ?
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78
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79 In order to make the program work, you must do the following :
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80 - Copy all source files from this example folder to the template folder under
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81 Project\STM32F10x_StdPeriph_Template
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82 - Open your preferred toolchain
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83 - Rebuild all files and load your image into target memory
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84 - Run the example
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85
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86 @note
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87 - Low-density Value line devices are STM32F100xx microcontrollers where the
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88 Flash memory density ranges between 16 and 32 Kbytes.
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89 - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx
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90 microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
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91 - Medium-density Value line devices are STM32F100xx microcontrollers where
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92 the Flash memory density ranges between 64 and 128 Kbytes.
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93 - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx
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94 microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
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95 - High-density devices are STM32F101xx and STM32F103xx microcontrollers where
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96 the Flash memory density ranges between 256 and 512 Kbytes.
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97 - High-density Value line devices are STM32F100xx microcontrollers where
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98 the Flash memory density ranges between 256 and 512 Kbytes.
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99 - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where
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100 the Flash memory density ranges between 512 and 1024 Kbytes.
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101 - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.
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102
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103 * <h3><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h3>
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104 */