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annotate libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/TIM/ExtTrigger_Synchro/main.c @ 0:c59513fd84fb
Initial commit of STM32 test code.
author | Daniel O'Connor <darius@dons.net.au> |
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date | Mon, 03 Oct 2011 21:19:15 +1030 |
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1 /** |
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2 ****************************************************************************** |
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3 * @file TIM/ExtTrigger_Synchro/main.c |
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4 * @author MCD Application Team |
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5 * @version V3.5.0 |
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6 * @date 08-April-2011 |
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7 * @brief Main program body |
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8 ****************************************************************************** |
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9 * @attention |
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10 * |
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11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
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12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE |
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13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY |
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14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING |
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15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE |
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16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
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17 * |
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18 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> |
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19 ****************************************************************************** |
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20 */ |
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21 |
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22 /* Includes ------------------------------------------------------------------*/ |
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23 #include "stm32f10x.h" |
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24 |
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25 /** @addtogroup STM32F10x_StdPeriph_Examples |
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26 * @{ |
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27 */ |
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28 |
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29 /** @addtogroup TIM_ExtTrigger_Synchro |
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30 * @{ |
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31 */ |
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32 |
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33 /* Private typedef -----------------------------------------------------------*/ |
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34 /* Private define ------------------------------------------------------------*/ |
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35 /* Private macro -------------------------------------------------------------*/ |
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36 /* Private variables ---------------------------------------------------------*/ |
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37 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; |
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38 TIM_ICInitTypeDef TIM_ICInitStructure; |
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39 TIM_OCInitTypeDef TIM_OCInitStructure; |
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40 |
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41 /* Private function prototypes -----------------------------------------------*/ |
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42 void RCC_Configuration(void); |
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43 void GPIO_Configuration(void); |
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44 |
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45 /* Private functions ---------------------------------------------------------*/ |
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46 |
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47 /** |
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48 * @brief Main program |
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49 * @param None |
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50 * @retval None |
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51 */ |
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52 int main(void) |
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53 { |
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54 /*!< At this stage the microcontroller clock setting is already configured, |
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55 this is done through SystemInit() function which is called from startup |
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56 file (startup_stm32f10x_xx.s) before to branch to application main. |
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57 To reconfigure the default setting of SystemInit() function, refer to |
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58 system_stm32f10x.c file |
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59 */ |
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60 |
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61 /* System Clocks Configuration */ |
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62 RCC_Configuration(); |
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63 |
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64 /* Configure the GPIO ports */ |
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65 GPIO_Configuration(); |
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66 |
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67 /* Timers synchronisation in cascade mode with an external trigger ----- |
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68 1/TIM1 is configured as Master Timer: |
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69 - Toggle Mode is used |
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70 - The TIM1 Enable event is used as Trigger Output |
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71 |
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72 2/TIM1 is configured as Slave Timer for an external Trigger connected |
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73 to TIM1 TI2 pin (TIM1 CH2 configured as input pin): |
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74 - The TIM1 TI2FP2 is used as Trigger Input |
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75 - Rising edge is used to start and stop the TIM1: Gated Mode. |
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76 |
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77 3/TIM3 is slave for TIM1 and Master for TIM4, |
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78 - Toggle Mode is used |
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79 - The ITR1(TIM1) is used as input trigger |
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80 - Gated mode is used, so start and stop of slave counter |
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81 are controlled by the Master trigger output signal(TIM1 enable event). |
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82 - The TIM3 enable event is used as Trigger Output. |
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83 |
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84 4/TIM4 is slave for TIM3, |
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85 - Toggle Mode is used |
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86 - The ITR2(TIM3) is used as input trigger |
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87 - Gated mode is used, so start and stop of slave counter |
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88 are controlled by the Master trigger output signal(TIM3 enable event). |
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89 |
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90 * For Low-density, Medium-density, High-density and Connectivity line devices: |
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91 The TIMxCLK is fixed to 72 MHZ, the Prescaler is equal to 2 so the TIMx clock |
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92 counter is equal to 24 MHz. |
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93 The Three Timers are running at: |
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94 TIMx frequency = TIMx clock counter/ 2*(TIMx_Period + 1) = 162.1 KHz. |
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95 |
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96 * For Low-Density Value line and Medium-Density Value line devices: |
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97 The TIMxCLK is fixed to 24 MHz, the Prescaler is equal to 2 so the TIMx clock |
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98 counter is equal to 8 MHz. |
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99 TIMx frequency = TIMx clock counter/ 2*(TIMx_Period + 1) = 54 KHz. |
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100 |
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101 The starts and stops of the TIM1 counters are controlled by the |
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102 external trigger. |
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103 The TIM3 starts and stops are controlled by the TIM1, and the TIM4 |
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104 starts and stops are controlled by the TIM3. |
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105 -------------------------------------------------------------------- */ |
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106 |
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107 /* Time base configuration */ |
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108 TIM_TimeBaseStructure.TIM_Period = 73; |
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109 TIM_TimeBaseStructure.TIM_Prescaler = 2; |
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110 TIM_TimeBaseStructure.TIM_ClockDivision = 0; |
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111 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; |
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112 |
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113 TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure); |
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114 |
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115 TIM_TimeBaseStructure.TIM_Period = 73; |
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116 TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure); |
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117 |
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118 TIM_TimeBaseStructure.TIM_Period = 73; |
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119 TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure); |
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120 |
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121 /* Master Configuration in Toggle Mode */ |
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122 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Toggle; |
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123 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; |
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124 TIM_OCInitStructure.TIM_Pulse = 64; |
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125 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; |
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126 |
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127 TIM_OC1Init(TIM1, &TIM_OCInitStructure); |
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128 |
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129 /* TIM1 Input Capture Configuration */ |
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130 TIM_ICInitStructure.TIM_Channel = TIM_Channel_2; |
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131 TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Rising; |
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132 TIM_ICInitStructure.TIM_ICSelection = TIM_ICSelection_DirectTI; |
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133 TIM_ICInitStructure.TIM_ICPrescaler = TIM_ICPSC_DIV1; |
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134 TIM_ICInitStructure.TIM_ICFilter = 0; |
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135 |
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136 TIM_ICInit(TIM1, &TIM_ICInitStructure); |
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137 |
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138 /* TIM1 Input trigger configuration: External Trigger connected to TI2 */ |
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139 TIM_SelectInputTrigger(TIM1, TIM_TS_TI2FP2); |
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140 TIM_SelectSlaveMode(TIM1, TIM_SlaveMode_Gated); |
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141 |
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142 /* Select the Master Slave Mode */ |
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143 TIM_SelectMasterSlaveMode(TIM1, TIM_MasterSlaveMode_Enable); |
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144 |
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145 /* Master Mode selection: TIM1 */ |
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146 TIM_SelectOutputTrigger(TIM1, TIM_TRGOSource_Enable); |
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147 |
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148 /* Slaves Configuration: Toggle Mode */ |
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149 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Toggle; |
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150 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; |
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151 |
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152 TIM_OC1Init(TIM3, &TIM_OCInitStructure); |
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153 |
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154 TIM_OC1Init(TIM4, &TIM_OCInitStructure); |
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155 |
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156 /* Slave Mode selection: TIM3 */ |
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157 TIM_SelectInputTrigger(TIM3, TIM_TS_ITR0); |
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158 TIM_SelectSlaveMode(TIM3, TIM_SlaveMode_Gated); |
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159 |
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160 /* Select the Master Slave Mode */ |
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161 TIM_SelectMasterSlaveMode(TIM3, TIM_MasterSlaveMode_Enable); |
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162 |
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163 /* Master Mode selection: TIM3 */ |
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164 TIM_SelectOutputTrigger(TIM3, TIM_TRGOSource_Enable); |
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165 |
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166 /* Slave Mode selection: TIM4 */ |
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167 TIM_SelectInputTrigger(TIM4, TIM_TS_ITR2); |
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168 TIM_SelectSlaveMode(TIM4, TIM_SlaveMode_Gated); |
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169 |
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170 /* TIM1 Main Output Enable */ |
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171 TIM_CtrlPWMOutputs(TIM1, ENABLE); |
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172 |
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173 /* TIM enable counter */ |
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174 TIM_Cmd(TIM1, ENABLE); |
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175 TIM_Cmd(TIM3, ENABLE); |
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176 TIM_Cmd(TIM4, ENABLE); |
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177 |
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178 while (1) |
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179 {} |
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180 } |
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181 |
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182 /** |
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183 * @brief Configures the different system clocks. |
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184 * @param None |
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185 * @retval None |
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186 */ |
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187 void RCC_Configuration(void) |
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188 { |
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189 /* TIM1, TIM3 and TIM4 clock enable */ |
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190 RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3 | |
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191 RCC_APB1Periph_TIM4, ENABLE); |
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192 |
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193 /* TIM1, GPIOA, GPIOE, GPIOC and GPIOB clocks enable */ |
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194 RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1 | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | |
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195 RCC_APB2Periph_GPIOE | RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO, ENABLE); |
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196 } |
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197 |
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198 /** |
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199 * @brief Configure the GPIO Pins. |
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200 * @param None |
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201 * @retval None |
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202 */ |
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203 void GPIO_Configuration(void) |
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204 { |
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205 GPIO_InitTypeDef GPIO_InitStructure; |
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206 #ifdef STM32F10X_CL |
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207 /* GPIOE Configuration: Channel 1 as alternate function push-pull */ |
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208 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; |
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209 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; |
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210 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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211 |
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212 GPIO_Init(GPIOE, &GPIO_InitStructure); |
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213 |
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214 /* GPIOE Configuration: Channel 2 as Input floating */ |
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215 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11; |
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216 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; |
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217 |
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218 GPIO_Init(GPIOE, &GPIO_InitStructure); |
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219 |
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220 /* TIM1 Full remapping pins */ |
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221 GPIO_PinRemapConfig(GPIO_FullRemap_TIM1, ENABLE); |
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222 |
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223 /*GPIOB Configuration: TIM3 channel1, 2, 3 and 4 */ |
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224 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6; |
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225 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; |
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226 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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227 |
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228 GPIO_Init(GPIOC, &GPIO_InitStructure); |
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229 |
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230 GPIO_PinRemapConfig(GPIO_FullRemap_TIM3, ENABLE); |
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231 |
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232 /* GPIOB Configuration: PB.06(TIM4 CH1) as alternate function push-pull */ |
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233 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6; |
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234 |
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235 GPIO_Init(GPIOB, &GPIO_InitStructure); |
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236 |
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237 #else |
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238 /* GPIOA Configuration: PA.08(TIM1 CH1) and PA.06(TIM3 CH1) as alternate function push-pull */ |
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239 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_6; |
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240 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; |
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241 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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242 |
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243 GPIO_Init(GPIOA, &GPIO_InitStructure); |
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244 |
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245 /* GPIOB Configuration: PB.06(TIM4 CH1) as alternate function push-pull */ |
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246 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6; |
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247 |
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248 GPIO_Init(GPIOB, &GPIO_InitStructure); |
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249 |
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250 /* GPIOA Configuration: PA.09(TIM1 CH2) */ |
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251 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; |
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252 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; |
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253 |
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254 GPIO_Init(GPIOA, &GPIO_InitStructure); |
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255 |
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256 #endif |
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257 |
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258 } |
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259 |
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260 #ifdef USE_FULL_ASSERT |
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261 |
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262 /** |
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263 * @brief Reports the name of the source file and the source line number |
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264 * where the assert_param error has occurred. |
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265 * @param file: pointer to the source file name |
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266 * @param line: assert_param error line source number |
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267 * @retval None |
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268 */ |
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269 void assert_failed(uint8_t* file, uint32_t line) |
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270 { |
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271 /* User can add his own implementation to report the file name and line number, |
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272 ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ |
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273 |
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274 while (1) |
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275 {} |
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276 } |
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277 |
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278 #endif |
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279 |
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280 /** |
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281 * @} |
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282 */ |
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283 |
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284 /** |
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285 * @} |
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286 */ |
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287 |
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288 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |