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annotate libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/TIM/DMABurst/main.c @ 0:c59513fd84fb
Initial commit of STM32 test code.
author | Daniel O'Connor <darius@dons.net.au> |
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date | Mon, 03 Oct 2011 21:19:15 +1030 |
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1 /** |
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2 ****************************************************************************** |
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3 * @file TIM/DMABurst/main.c |
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4 * @author MCD Application Team |
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5 * @version V3.5.0 |
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6 * @date 08-April-2011 |
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7 * @brief Main program body |
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8 ****************************************************************************** |
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9 * @attention |
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10 * |
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11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
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12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE |
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13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY |
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14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING |
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15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE |
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16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
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17 * |
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18 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> |
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19 ****************************************************************************** |
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20 */ |
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21 |
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22 /* Includes ------------------------------------------------------------------*/ |
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23 #include "stm32f10x.h" |
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24 |
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25 /** @addtogroup STM32F10x_StdPeriph_Examples |
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26 * @{ |
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27 */ |
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28 |
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29 /** @addtogroup TIM_DMABurst |
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30 * @{ |
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31 */ |
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32 |
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33 /* Private typedef -----------------------------------------------------------*/ |
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34 /* Private define ------------------------------------------------------------*/ |
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35 #define TIM1_DMAR_ADDRESS ((uint32_t)0x40012C4C) /* TIM ARR (Auto Reload Register) address */ |
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36 |
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37 /* Private macro -------------------------------------------------------------*/ |
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38 /* Private variables ---------------------------------------------------------*/ |
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39 GPIO_InitTypeDef GPIO_InitStructure; |
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40 DMA_InitTypeDef DMA_InitStructure; |
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41 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; |
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42 TIM_OCInitTypeDef TIM_OCInitStructure; |
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43 uint16_t SRC_Buffer[6] = {0x0FFF, 0x0000, 0x0555}; |
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44 |
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45 /* Private function prototypes -----------------------------------------------*/ |
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46 /* Private functions ---------------------------------------------------------*/ |
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47 |
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48 /** |
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49 * @brief Main program |
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50 * @param None |
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51 * @retval None |
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52 */ |
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53 int main(void) |
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54 { |
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55 /*!< At this stage the microcontroller clock setting is already configured, |
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56 this is done through SystemInit() function which is called from startup |
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57 file (startup_stm32f10x_xx.s) before to branch to application main. |
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58 To reconfigure the default setting of SystemInit() function, refer to |
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59 system_stm32f10x.c file |
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60 */ |
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61 |
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62 /* TIM1 and GPIOA clock enable */ |
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63 RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1 | RCC_APB2Periph_GPIOA, ENABLE); |
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64 |
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65 /* DMA clock enable */ |
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66 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); |
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67 |
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68 /* GPIOA Configuration: Channel 1 as alternate function push-pull */ |
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69 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8; |
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70 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; |
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71 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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72 GPIO_Init(GPIOA, &GPIO_InitStructure); |
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73 |
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74 /* TIM1 DeInit */ |
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75 TIM_DeInit(TIM1); |
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76 |
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77 /* DMA1 Channel5 Config */ |
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78 DMA_DeInit(DMA1_Channel5); |
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79 |
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80 DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)TIM1_DMAR_ADDRESS; |
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81 DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)SRC_Buffer; |
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82 DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; |
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83 DMA_InitStructure.DMA_BufferSize = 3; |
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84 DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; |
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85 DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; |
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86 DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; |
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87 DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; |
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88 DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; |
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89 DMA_InitStructure.DMA_Priority = DMA_Priority_High; |
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90 DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; |
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91 DMA_Init(DMA1_Channel5, &DMA_InitStructure); |
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92 |
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93 /* Time base configuration */ |
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94 /* ----------------------------------------------------------------------- |
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95 TIM1 Configuration: generate 1 PWM signal using the DMA burst mode: |
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96 The TIM1CLK frequency is set to SystemCoreClock (Hz), to get TIM1 counter |
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97 clock at 24 MHz the Prescaler is computed as following: |
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98 - Prescaler = (TIM1CLK / TIM1 counter clock) - 1 |
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99 SystemCoreClock is set to 72 MHz for Low-density, Medium-density, High-density |
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100 and Connectivity line devices and to 24 MHz for Low-Density Value line and |
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101 Medium-Density Value line devices |
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102 |
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103 The TIM1 period is 5.8 KHz: TIM1 Frequency = TIM1 counter clock/(ARR + 1) |
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104 = 24 MHz / 4096 = 5.8KHz KHz |
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105 TIM1 Channel1 duty cycle = (TIM1_CCR1/ TIM1_ARR)* 100 = 33.33% |
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106 ----------------------------------------------------------------------- */ |
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107 TIM_TimeBaseStructure.TIM_Period = 0xFFFF; |
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108 TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t) (SystemCoreClock / 24000000) - 1; |
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109 TIM_TimeBaseStructure.TIM_ClockDivision = 0x0; |
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110 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; |
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111 TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure); |
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112 |
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113 /* TIM Configuration in PWM Mode */ |
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114 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; |
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115 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; |
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116 TIM_OCInitStructure.TIM_Pulse = 0xFFF; |
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117 TIM_OC1Init(TIM1, &TIM_OCInitStructure); |
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118 |
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119 /* TIM1 DMAR Base register and DMA Burst Length Config */ |
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120 TIM_DMAConfig(TIM1, TIM_DMABase_ARR, TIM_DMABurstLength_3Transfers); |
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121 |
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122 /* TIM1 DMA Update enable */ |
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123 TIM_DMACmd(TIM1, TIM_DMA_Update, ENABLE); |
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124 |
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125 /* TIM1 enable */ |
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126 TIM_Cmd(TIM1, ENABLE); |
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127 |
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128 /* TIM1 PWM Outputs Enable */ |
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129 TIM_CtrlPWMOutputs(TIM1, ENABLE); |
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130 |
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131 /* DMA1 Channel5 enable */ |
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132 DMA_Cmd(DMA1_Channel5, ENABLE); |
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133 |
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134 /* Wait until DMA1 Channel5 end of Transfer */ |
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135 while (!DMA_GetFlagStatus(DMA1_FLAG_TC5)) |
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136 { |
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137 } |
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138 |
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139 /* Infinite loop */ |
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140 while(1) |
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141 { |
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142 } |
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143 } |
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144 |
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145 |
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146 #ifdef USE_FULL_ASSERT |
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147 |
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148 /** |
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149 * @brief Reports the name of the source file and the source line number |
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150 * where the assert_param error has occurred. |
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151 * @param file: pointer to the source file name |
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152 * @param line: assert_param error line source number |
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153 * @retval None |
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154 */ |
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155 void assert_failed(uint8_t* file, uint32_t line) |
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156 { |
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157 /* User can add his own implementation to report the file name and line number, |
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158 ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ |
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159 |
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160 while (1) |
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161 {} |
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162 } |
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163 #endif |
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164 |
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165 /** |
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166 * @} |
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167 */ |
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168 |
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169 /** |
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170 * @} |
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171 */ |
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172 |
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173 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |