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annotate libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/IWDG/IWDG_Reset/readme.txt @ 0:c59513fd84fb
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author | Daniel O'Connor <darius@dons.net.au> |
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date | Mon, 03 Oct 2011 21:19:15 +1030 |
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1 /** |
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2 @page IWDG_Reset IWDG Reset example |
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3 |
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4 @verbatim |
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5 ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* |
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6 * @file IWDG/IWDG_Reset/readme.txt |
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7 * @author MCD Application Team |
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8 * @version V3.5.0 |
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9 * @date 08-April-2011 |
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10 * @brief Description of the IWDG Reset example. |
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11 ****************************************************************************** |
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12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
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13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE |
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14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY |
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15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING |
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16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE |
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17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
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18 ****************************************************************************** |
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19 @endverbatim |
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20 |
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21 @par Example Description |
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22 |
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23 This example shows how to update at regular period the IWDG reload counter and |
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24 how to simulate a software fault generating an MCU IWDG reset on expiry of a |
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25 programmed time period. |
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26 |
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27 The IWDG timeout is set to 250 ms (the timeout may varies due to LSI frequency |
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28 dispersion). |
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29 |
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30 First, the TIM5 timer is configured to measure the LSI frequency as the |
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31 LSI is internally connected to TIM5 CH4, in order to adjust the IWDG clock. |
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32 |
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33 The LSI measurement using the TIM5 is described below: |
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34 - Configure the TIM5 to remap internally the TIM5 Channel 4 Input Capture to |
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35 the LSI clock output. |
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36 - Enable the TIM5 Input Capture interrupt: after one cycle of LSI clock, the |
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37 period value is stored in a variable and compared to the HCLK clock to get |
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38 its real value. |
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39 |
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40 @note The LSI is internally connected to TIM5 IC4 only on STM32F10x Connectivity |
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41 line, High-Density Value line, High-Density and XL-Density Devices. |
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42 When using other devices, you should comment the "#define LSI_TIM_MEASURE" |
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43 in main.c file and in this case the LSI frequency is set by default to 40KHz. |
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44 |
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45 Then, the IWDG reload counter is configured to obtain 240ms according to the |
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46 measured LSI frequency. |
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47 |
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48 The IWDG reload counter is refreshed each 240ms in the main program infinite loop |
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49 to prevent a IWDG reset. |
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50 LED2 is also toggled each 240ms indicating that the program is running. |
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51 |
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52 An EXTI Line is connected to a GPIO pin, and configured to generate an interrupt |
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53 on the rising edge of the signal. |
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54 |
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55 The EXTI Line is used to simulate a software failure: once the EXTI Line event |
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56 occurs, by pressing the Key push-button, the corresponding interrupt is served. |
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57 In the ISR, a write to invalid address generates a Hardfault exception containing |
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58 an infinite loop and preventing to return to main program (the IWDG reload counter |
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59 is not refreshed). |
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60 As a result, when the IWDG counter reaches 00h, the IWDG reset occurs. |
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61 If the IWDG reset is generated, after the system resumes from reset, LED1 turns on. |
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62 |
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63 If the EXTI Line event does not occur, the IWDG counter is indefinitely refreshed |
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64 in the main program infinite loop, and there is no IWDG reset. |
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65 |
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66 |
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67 In this example the system clock is set to 24 MHz on Value line devices and to |
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68 72MHz on other devices. |
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69 |
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70 @note The IWDG Counter can be only written when the RVU flag is reset. |
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71 In this example, as the SysTick period is too higher than the IWDG Counter |
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72 Update timing (5 Cycles 40KHz RC), the Reload Value Update "RVU" flag is |
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73 not checked before reloading the counter. |
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74 |
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75 @par Directory contents |
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76 |
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77 - IWDG/IWDG_Reset/stm32f10x_conf.h Library Configuration file |
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78 - IWDG/IWDG_Reset/stm32f10x_it.c Interrupt handlers |
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79 - IWDG/IWDG_Reset/stm32f10x_it.h Header for stm32f10x_it.c |
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80 - IWDG/IWDG_Reset/main.c Main program |
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81 - IWDG/IWDG_Reset/system_stm32f10x.c STM32F10x system source file |
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82 |
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83 @par Hardware and Software environment |
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84 |
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85 - This example runs on STM32F10x Connectivity line, High-Density, High-Density |
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86 Value line, Medium-Density, XL-Density, High-Density Value line, Medium-Density |
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87 Value line, Low-Density and Low-Density Value line Devices. |
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88 |
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89 - This example has been tested with STMicroelectronics STM32100E-EVAL (High-Density |
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90 Value line), STM32100B-EVAL (Medium-Density Value line), STM3210C-EVAL |
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91 (Connectivity line), STM3210E-EVAL (High-Density and XL-Density), STM32100E-EVAL |
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92 (High-Density Value line) and STM3210B-EVAL (Medium-Density) evaluation |
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93 boards and can be easily tailored to any other supported device and development |
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94 board. |
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95 To select the STMicroelectronics evaluation board used to run the example, |
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96 uncomment the corresponding line in stm32_eval.h file (under Utilities\STM32_EVAL) |
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97 |
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98 - STM32100E-EVAL Set-up |
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99 - Use LD1 and LD2 leds connected respectively to PF.06 and PF.07 pins |
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100 - Use the KEY push button connected to PG.08 pin (EXTI Line8). |
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101 |
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102 - STM32100B-EVAL Set-up |
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103 - Use LD1 and LD2 leds connected respectively to PC.06 and PC.07 pins |
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104 - Use the KEY push button connected to PB.09 pin (EXTI Line9). |
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105 |
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106 - STM3210C-EVAL Set-up |
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107 - Use LD1 and LD2 connected respectively to PD.07 and PD.13 pins |
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108 - Use the Key push-button connected to pin PB.09 (EXTI Line9). |
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109 |
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110 - STM3210E-EVAL Set-up |
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111 - Use LD1 and LD2 leds connected respectively to PF.06 and PF.07 pins |
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112 - Use the KEY push button connected to PG.08 pin (EXTI Line8). |
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113 |
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114 - STM3210B-EVAL Set-up |
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115 - Use LD1 and LD2 leds connected respectively to PC.06 and PC.07 pins |
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116 - Use the KEY push button connected to PB.09 pin (EXTI Line9). |
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117 |
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118 |
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119 @par How to use it ? |
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120 |
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121 In order to make the program work, you must do the following : |
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122 - Copy all source files from this example folder to the template folder under |
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123 Project\STM32F10x_StdPeriph_Template |
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124 - Open your preferred toolchain |
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125 - Rebuild all files and load your image into target memory |
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126 - Link all compiled files and load your image into target memory |
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127 - Run the example in standalone mode (without debugger connection) |
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128 |
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129 @note |
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130 - Low-density Value line devices are STM32F100xx microcontrollers where the |
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131 Flash memory density ranges between 16 and 32 Kbytes. |
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132 - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx |
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133 microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. |
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134 - Medium-density Value line devices are STM32F100xx microcontrollers where |
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135 the Flash memory density ranges between 64 and 128 Kbytes. |
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136 - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx |
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137 microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes. |
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138 - High-density Value line devices are STM32F100xx microcontrollers where |
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139 the Flash memory density ranges between 256 and 512 Kbytes. |
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140 - High-density devices are STM32F101xx and STM32F103xx microcontrollers where |
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141 the Flash memory density ranges between 256 and 512 Kbytes. |
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142 - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where |
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143 the Flash memory density ranges between 512 and 1024 Kbytes. |
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144 - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. |
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145 |
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146 * <h3><center>© COPYRIGHT 2011 STMicroelectronics</center></h3> |
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147 */ |