annotate hw.c @ 17:b62eaa3131b1

Catch up with new toolchain location
author Daniel O'Connor <darius@dons.net.au>
date Wed, 14 Nov 2012 12:30:29 +1030
parents 96c345d304af
children afdd22502c2a
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1 #include <stdint.h>
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2 #include <stdio.h>
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3 #include "stm32f10x.h"
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4
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5 #include "1wire.h"
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6 #include "lcd.h"
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7
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8 static void hw_port_cfg(void);
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9
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10 /* Wait for cnt microseconds */
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11 void
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12 _usleep16(uint16_t cnt) {
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13 TIM6->ARR = cnt > 3 ? cnt - 3 : cnt;
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14 TIM_SetCounter(TIM6, 0);
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15 TIM_Cmd(TIM6, ENABLE);
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16 while ((TIM6->CR1 & TIM_CR1_CEN) != 0)
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17 ;
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18 }
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19
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20 void
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21 hw_init(void) {
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22 hw_port_cfg();
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23 lcd_init();
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24 lcd_setpwm(1000);
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25 }
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26
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27 static void
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28 hw_port_cfg(void) {
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29 GPIO_InitTypeDef GPIO_InitStructure;
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30 USART_InitTypeDef USART_InitStructure;
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31 SPI_InitTypeDef SPI_InitStructure;
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32 FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
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33 FSMC_NORSRAMTimingInitTypeDef p;
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34 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
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35
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36 /* RTC stuff */
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37 /* Enable PWR and BKP clocks */
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38 RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);
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39
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40 /* Allow access to BKP Domain */
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41 PWR_BackupAccessCmd(ENABLE);
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42
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43 /* Reset Backup Domain
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44 *
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45 * This resets the RTC etc back to 0 so probably only useful under user command
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46 BKP_DeInit();
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47 */
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48
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49 /* Enable Low Speed External clock */
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50 RCC_LSEConfig(RCC_LSE_ON);
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51
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52 /* Wait till LSE is ready */
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53 while (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET)
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54 ;
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55
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56 /* Select LSE as RTC Clock Source */
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57 RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
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58
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59 /* Enable RTC Clock */
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60 RCC_RTCCLKCmd(ENABLE);
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61
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62 /* Wait for RTC registers synchronization */
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63 RTC_WaitForSynchro();
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64
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65 /* Wait until last write operation on RTC registers has finished */
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66 RTC_WaitForLastTask();
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67
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68 /* Wait until last write operation on RTC registers has finished */
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69 RTC_WaitForLastTask();
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70
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71 /* Set RTC prescaler: set RTC period to 1sec */
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72 RTC_SetPrescaler(32767); /* RTC period = RTCCLK/RTC_PR = (32.768 KHz)/(32767+1) */
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73
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74 /* Wait until last write operation on RTC registers has finished */
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75 RTC_WaitForLastTask();
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76
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77 /* Clock setup */
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78 RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE);
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79
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80 /* Port configuration */
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81 /* Configure USART1 TX (PA.09) as alternate function push-pull */
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82 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
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83 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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84 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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85 GPIO_Init(GPIOA, &GPIO_InitStructure);
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86
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87 /* Configure USART1 RX (PA.10) as input floating */
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88 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
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89 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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90 GPIO_Init(GPIOA, &GPIO_InitStructure);
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91
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92 /* Enable GPIOB clock */
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93 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
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94
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95 /* Configure PB5 as output push-pull for LED */
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96 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
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97 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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98 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
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99 GPIO_Init(GPIOB, &GPIO_InitStructure);
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100
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101 /* Configure PB15 as input pull-up push-pull for push button */
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102 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15;
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103 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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104 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
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105 GPIO_Init(GPIOB, &GPIO_InitStructure);
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106
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107 /* USART configuration */
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108 /* USART1 - 115200 8n1, no flow control TX & RX enabled */
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109 USART_InitStructure.USART_BaudRate = 115200;
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110 USART_InitStructure.USART_WordLength = USART_WordLength_8b;
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111 USART_InitStructure.USART_StopBits = USART_StopBits_1;
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112 USART_InitStructure.USART_Parity = USART_Parity_No;
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113 USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
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114 USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
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115 USART_Init(USART1, &USART_InitStructure);
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116
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117 /* Enable interrupts on receive data */
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118 USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
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119
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120 /* Enable USART */
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121 USART_Cmd(USART1, ENABLE);
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122
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123 /* Enable FSMC clock */
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124 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
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125
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126 /* Enable alternate function IO clock */
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127 RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
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128
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129 /* Enable GPIOD clock */
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130 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD, ENABLE);
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131
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132 /* Enable GPIOD clock */
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133 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOE, ENABLE);
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134
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135 /* Configures LCD Control lines (FSMC Pins) in alternate function Push-Pull mode.
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136 *
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137 * PD0(D2), PD1(D3), PD4(NOE), PD5(NWE), PD7(NE1/CS), PD8(D13), PD9(D14),
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138 * PD10(D15), PD11(A16/RS) PD14(D0), PD15(D1)
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139 */
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140 GPIO_InitStructure.GPIO_Pin = (GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_7 |
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141 GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 |
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142 GPIO_Pin_14 | GPIO_Pin_15);
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143 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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144 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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145 GPIO_Init(GPIOD, &GPIO_InitStructure);
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146
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147 /* PE7(D4), PE8(D5), PE9(D6), PE10(D7), PE11(D8), PE12(D9), PE13(D10),
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148 * PE14(D11), PE15(D12)
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149 */
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150 GPIO_InitStructure.GPIO_Pin = (GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 |
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151 GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 |
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152 GPIO_Pin_15);
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153 GPIO_Init(GPIOE, &GPIO_InitStructure);
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154
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155 /* Configure backlight control (PD13/FSMC_A18 remapped to TIM4_CH2) */
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156 /* Enable TIM4 clock */
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157 RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE);
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158
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159 /* Enable timer function
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160 * Note source clock is SYSCLK / 2 = 36MHz
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161 */
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162 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13;
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163 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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164 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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165 GPIO_Init(GPIOD, &GPIO_InitStructure);
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166
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167 /* Remap TIM4_CH2 to PD13 */
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168 GPIO_PinRemapConfig(GPIO_Remap_TIM4, ENABLE);
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169
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170 /* Reset TIM4 */
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171 TIM_DeInit(TIM4);
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172
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173 /* Time Base configuration */
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174 TIM_TimeBaseStructure.TIM_Period = 999;
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175 TIM_TimeBaseStructure.TIM_Prescaler = 0;
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176 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
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177 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Down;
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178
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179 TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure);
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180
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181 /* Enable timer */
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182 TIM_OC2PreloadConfig(TIM4, TIM_OCPreload_Enable);
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183 TIM_ARRPreloadConfig(TIM4, ENABLE);
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184 TIM_Cmd(TIM4, ENABLE);
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185
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186 /* Configure reset pin (PE1) as GPIO out PP */
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187 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1;
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188 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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189 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
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190 GPIO_Init(GPIOE, &GPIO_InitStructure);
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191
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192 /* Configures the Parallel interface (FSMC) for LCD (Parallel mode) */
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193 /* Timing configuration */
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194 p.FSMC_AddressSetupTime = 5;
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195 p.FSMC_AddressHoldTime = 5;
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196 p.FSMC_DataSetupTime = 5;
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197 p.FSMC_BusTurnAroundDuration = 0;
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198 p.FSMC_CLKDivision = 0;
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199 p.FSMC_DataLatency = 0;
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200 p.FSMC_AccessMode = FSMC_AccessMode_A;
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201
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202 /* FSMC_Bank1_NORSRAM1 configured as follows:
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203 - Data/Address MUX = Disable
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204 - Memory Type = SRAM
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205 - Data Width = 16bit
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206 - Write Operation = Enable
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207 - Extended Mode = Disable
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208 - Asynchronous Wait = Disable */
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209 FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;
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210 FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
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211 FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
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212 FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
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213 FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
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214 FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
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215 FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
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216 FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
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217 FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
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218 FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
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219 FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
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220 FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
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221 FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
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222 FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
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223 FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
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224 FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
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225
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226 /* Enable FSMC_Bank1_NORSRAM1 */
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227 FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);
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228
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229 /* Configure touch screen controller
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230 *
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231 * Connected to SPI1 which is shared with the AT45DB161D.
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232 *
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233 * The touch screen is selected with PB7.
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234 * The flash chip is selected with PA4.
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235 */
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236
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237 /* Enable SPI1 clock */
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238 RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE);
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239
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240 /* Configure MOSI, MISO and SCLK as alternate function PP */
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241 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;
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242 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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243 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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244 GPIO_Init(GPIOA, &GPIO_InitStructure);
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245
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246 /* Configure flash chip select pin (PA4) as GPIO out PP */
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247 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;
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248 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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249 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
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250 GPIO_Init(GPIOA, &GPIO_InitStructure);
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251
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252 /* Configure touch chip select pin (PB7) as GPIO out PP */
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253 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;
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254 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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255 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
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256 GPIO_Init(GPIOB, &GPIO_InitStructure);
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257
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258 /* De-select touch & flash */
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259 GPIO_SetBits(GPIOA, GPIO_Pin_4);
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260 GPIO_SetBits(GPIOB, GPIO_Pin_7);
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261
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262 /* SPI1 Config */
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263 SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
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264 SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
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265 SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
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266 SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
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267 SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
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268 SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
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269 SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_64;
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270 SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
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271 SPI_InitStructure.SPI_CRCPolynomial = 7;
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272 SPI_Init(SPI1, &SPI_InitStructure);
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273
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274 /* SPI1 enable */
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275 SPI_Cmd(SPI1, ENABLE);
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276
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277 /* Configure TIM6 for interval timing */
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278 RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM6, ENABLE);
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279
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280 /* Reset TIM6 */
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281 TIM_DeInit(TIM6);
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282
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283 /* Time Base configuration */
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284 TIM_TimeBaseStructure.TIM_Period = 0;
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285 TIM_TimeBaseStructure.TIM_Prescaler = (SystemCoreClock / 2 / 1000000) - 1; /* 1 MHz clock */
10
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286 TIM_TimeBaseInit(TIM6, &TIM_TimeBaseStructure);
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287
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288 TIM_Cmd(TIM6, DISABLE);
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289
13
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290 /* Setup for single pulse mode clear UDIS */
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291 TIM_SelectOnePulseMode(TIM6, TIM_OPMode_Single);
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292 TIM_UpdateDisableConfig(TIM6, DISABLE);
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293
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294 /* Setup GPIO for 1-wire */
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295 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2 | GPIO_Pin_3;
10
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296 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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297 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
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298 GPIO_Init(GPIOE, &GPIO_InitStructure);
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299
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300 OWInit();
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301
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302 #if 0
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303 while (1) {
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304 GPIO_SetBits(GPIOE, GPIO_Pin_2);
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305 _usleep16(10);
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306 GPIO_ResetBits(GPIOE, GPIO_Pin_2);
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307 _usleep16(20);
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308 GPIO_SetBits(GPIOE, GPIO_Pin_2);
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309 _usleep16(30);
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310 GPIO_ResetBits(GPIOE, GPIO_Pin_2);
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311 _usleep16(100);
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312 }
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313 #endif
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314 }