Mercurial > ~darius > hgwebdir.cgi > stm32temp
annotate 1wire-config.h @ 25:a9cc07caa801
Add stream read/write commands.
| author | Daniel O'Connor <darius@dons.net.au> |
|---|---|
| date | Sat, 17 Nov 2012 12:18:24 +1030 |
| parents | b12881051261 |
| children | 38869c474104 |
| rev | line source |
|---|---|
| 13 | 1 /* |
| 2 * Example configuration header for 1-wire bus code. | |
| 3 * | |
| 4 * This is the user servicable stuff - how to do delays and how to | |
| 5 * frob the IO pins. | |
| 6 * | |
| 7 * Copyright (c) 2009 | |
| 8 * Daniel O'Connor <darius@dons.net.au>. All rights reserved. | |
| 9 * | |
| 10 * Redistribution and use in source and binary forms, with or without | |
| 11 * modification, are permitted provided that the following conditions | |
| 12 * are met: | |
| 13 * 1. Redistributions of source code must retain the above copyright | |
| 14 * notice, this list of conditions and the following disclaimer. | |
| 15 * 2. Redistributions in binary form must reproduce the above copyright | |
| 16 * notice, this list of conditions and the following disclaimer in the | |
| 17 * documentation and/or other materials provided with the distribution. | |
| 18 * | |
| 19 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND | |
| 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
| 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
| 22 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE | |
| 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
| 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
| 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
| 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
| 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
| 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
| 29 * SUCH DAMAGE. | |
| 30 */ | |
| 31 | |
| 32 /* | |
| 33 * The configuration described here has the 1-wire IO on GPIOE3, | |
| 34 * with no pull down, nor VPP | |
| 35 */ | |
| 36 | |
| 37 #include "stm32f10x.h" /* GPIO* */ | |
|
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38 #include "delay.h" |
| 13 | 39 |
| 40 /* Fudge AVR stuff for ARM */ | |
| 41 #define PROGMEM | |
| 42 #define PSTR(x) x | |
| 43 #define pgm_read_byte(x) *(x) | |
| 44 | |
| 45 /* Init bus */ | |
| 46 #define OWBUSINIT() | |
| 47 | |
| 48 /* Set the port up to allow reading from the 1 wire bus */ | |
| 49 #define OWSETREAD() do { \ | |
| 50 GPIO_InitTypeDef GPIO_InitStructure; \ | |
| 51 \ | |
| 52 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3; \ | |
| 53 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; \ | |
| 54 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; \ | |
| 55 GPIO_Init(GPIOE, &GPIO_InitStructure); \ | |
| 56 } while (0) | |
| 57 | |
| 58 | |
| 59 /* Read the 1-wire bus, non-inverting logic */ | |
| 60 #define OWREADBUS() (GPIO_ReadInputDataBit(GPIOE, GPIO_Pin_3) ? 1 : 0) | |
| 61 | |
| 62 /* Set the 1-wire bus to 0 | |
| 63 */ | |
| 64 #define OWSETBUSLOW() do { \ | |
| 65 GPIO_InitTypeDef GPIO_InitStructure; \ | |
| 66 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3; \ | |
| 67 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; \ | |
| 68 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; \ | |
| 69 GPIO_Init(GPIOE, &GPIO_InitStructure); \ | |
| 70 GPIO_ResetBits(GPIOE, GPIO_Pin_3); \ | |
| 71 } while (0) | |
| 72 | |
| 73 /* Set the 1-wire bus to 1 | |
| 74 * Change to input and let the pull up do its job | |
| 75 */ | |
| 76 #define OWSETBUSHIGH() do { \ | |
| 77 GPIO_InitTypeDef GPIO_InitStructure; \ | |
| 78 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3; \ | |
| 79 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; \ | |
| 80 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; \ | |
| 81 GPIO_Init(GPIOE, &GPIO_InitStructure); \ | |
| 82 } while (0) | |
| 83 | |
|
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84 #if 0 |
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85 #define OWDELAY_A delay(6) /* 6 usec */ |
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86 #define OWDELAY_B delay(64) /* 64 usec */ |
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87 #define OWDELAY_C delay(60) /* 60 usec */ |
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88 #define OWDELAY_D delay(10) /* 10 usec */ |
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89 #define OWDELAY_E delay(9) /* 9 usec */ |
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90 #define OWDELAY_F delay(55) /* 55 usec */ |
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91 #define OWDELAY_G /* 0 usec */ |
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92 #define OWDELAY_H delay(480) /* 480 usec */ |
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93 #define OWDELAY_I delay(70) /* 70 usec */ |
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94 #define OWDELAY_J delay(410) /* 410 usec */ |
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95 #else |
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96 /* As measured by the cro delay() is correct, but the code does not work and I don't understand why. |
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97 * We need to use delays 2/3 the expected amount. |
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98 * Possibly due to use of GPIO_Init(), however the STM32 lib doesn't seem to have a function to |
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99 * just set the GPIO mode. |
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100 */ |
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101 #define OWDELAY_A delay(4) /* 6 usec */ |
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102 #define OWDELAY_B delay(43) /* 64 usec */ |
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103 #define OWDELAY_C delay(40) /* 60 usec */ |
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104 #define OWDELAY_D delay(7) /* 10 usec */ |
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105 #define OWDELAY_E delay(6) /* 9 usec */ |
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106 #define OWDELAY_F delay(37) /* 55 usec */ |
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107 #define OWDELAY_G /* 0 usec */ |
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108 #define OWDELAY_H delay(320) /* 480 usec */ |
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109 #define OWDELAY_I delay(47) /* 70 usec */ |
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110 #define OWDELAY_J delay(273) /* 410 usec */ |
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111 #endif |
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112 //#define OW_DEBUG |
| 13 | 113 #ifdef OW_DEBUG |
| 114 #define OWPUTS(x) puts(x) | |
| 115 #define OWPUTSP(x) puts(x) | |
| 116 #define OWPRINTFP(fmt, ...) printf(fmt, ## __VA_ARGS__) | |
| 117 #else | |
| 118 #define OWPUTS(x) | |
| 119 #define OWPUTSP(x) | |
| 120 #define OWPRINTFP(fmt, ...) | |
| 121 #endif |