stm32temp: main.c annotate

annotate main.c @ 40:a38003b97de6

Use debug cycle counter to handle delays.

author	Daniel O'Connor <darius@dons.net.au>
date	Mon, 01 Apr 2013 20:06:03 +1030
parents	1fdfbad9eca7
children	f1cc171b06b5

rev	line source
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1 #include <ctype.h>
3 74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	2 #include <malloc.h>
31 03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	3 #include <math.h>
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	4 #include <stdio.h>
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	5 #include <stdint.h>
3 74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	6 #include <time.h>
74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	7 #include <string.h>
74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	8 #include <sys/time.h>
74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	9 #include <stdlib.h>
22 198ac9d95770 Add test for assert Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	10 #include <assert.h>
3 74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	11
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	12 #include "stm32f10x.h"
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	13
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 12 diff changeset	14 #include "1wire.h"
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	15 #include "comm.h"
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	16 #include "delay.h"
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	17 #include "flash.h"
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	18 #include "hw.h"
3 74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	19 #include "lcd.h"
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	20 #include "main.h"
31 03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	21 #include "rtc.h"
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	22 #include "tempctrl.h"
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	23 #include "touch.h"
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	24
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	25 #define MAXARGS 10
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	26 #define LINEBUF 40
3 74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	27 typedef struct {
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	28 char *buf;
3 74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	29 volatile uint8_t state;
74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	30 uint8_t len;
2 274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	31 } consbuf_t;
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	32
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	33 void NVIC_Configuration(void);
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	34
3 74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	35
74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	36 /* Called every 1 / TICK_FREQ */
74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	37 #define TICK_FREQ 10000
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	38 RAMFUNC void
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	39 SysTick_Handler(void) {
2 274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	40 static uint32_t tick = 0;
3 74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	41 static int led = 0;
74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	42
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	43 tick++;
3 74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	44 if (tick % 10000 == 0) {
74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	45 led = !led;
74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	46 if (led)
74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	47 GPIO_SetBits(GPIOB, GPIO_Pin_5);
74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	48 else
74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	49 GPIO_ResetBits(GPIOB, GPIO_Pin_5);
74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	50 }
74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	51
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	52 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	53
2 274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	54 consbuf_t cmd;
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	55
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	56 RAMFUNC void
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	57 USART1_IRQHandler(void) {
2 274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	58 char c;
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	59 int i;
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	60
2 274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	61 /* Recieved data */
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	62 while (USART_GetITStatus(USART1, USART_IT_RXNE) != RESET) {
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	63 c = USART_ReceiveData(USART1);
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	64
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	65 /* End of line? */
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	66 if (c == '\n' \|\| c == '\r') {
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	67 cmd.buf[cmd.state] = '\0';
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	68 fputs("\r\n", stdout);
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	69 cmd.len = cmd.state;
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	70 cmd.state = 255;
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	71 continue;
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	72 }
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	73
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	74 /* Ctrl-w / Ctrl-u */
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	75 if (c == 0x17 \|\| c == 0x15) {
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	76 for (i = 0; i < cmd.state; i++)
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	77 fputs("\010\040\010", stdout);
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	78 cmd.state = 0;
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	79 continue;
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	80 }
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	81
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	82 /* Backspace/delete */
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	83 if (c == 0x08 \|\| c == 0x7f) {
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	84 if (cmd.state > 0) {
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	85 cmd.state--;
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	86 fputs("\010\040\010", stdout);
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	87 }
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	88 continue;
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	89 }
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	90
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	91 /* Anything unprintable just ignore it */
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	92 if (!isprint(c))
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	93 continue;
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	94
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	95 cmd.buf[cmd.state] = tolower(c);
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	96
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	97 /* Echo back to the user */
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	98 comm_put(cmd.buf[cmd.state]);
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	99
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	100 cmd.state++;
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	101 /* Over flow? */
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	102 if (cmd.state == LINEBUF - 1) {
2 274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	103 fputs("\r\nLine too long", stdout);
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	104 cmd.state = 0;
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	105 continue;
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	106 }
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	107 }
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	108 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	109
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	110 int
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	111 main(void) {
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	112 char buf[40], argv[MAXARGS], ap, tmp;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	113 int argc;
3 74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	114 struct tm nowtm;
74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	115 time_t now;
12 093bc0c3b1cc Add delay, ellipse and line demos. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	116 uint16_t x, y, x1, y1, z1, z2, r, c, rx, ry;
093bc0c3b1cc Add delay, ellipse and line demos. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	117 float t, t2;
093bc0c3b1cc Add delay, ellipse and line demos. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	118
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	119 cmd.state = cmd.len = 0;
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	120 cmd.buf = malloc(LINEBUF);
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	121
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	122 /* Init hardware - configure IO ports and external peripherals */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	123 hw_init();
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	124
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	125 /* NVIC configuration */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	126 NVIC_Configuration();
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	127
3 74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	128 /* Setup SysTick Timer rate, also enables Systick and Systick-Interrupt */
74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	129 if (SysTick_Config(SystemCoreClock / TICK_FREQ)) {
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	130 /* Capture error */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	131 comm_puts("Can't setup SysTick\r\n");
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	132 while (1)
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	133 ;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	134 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	135
3 74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	136 /* Set stdout to unbuffered */
2 274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	137 setvbuf(stdout, NULL, _IONBF, 0);
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	138
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	139 /* Say hello */
7 9404b9869c27 Make the LCD panel work (timings, GPIOE clock needs to be on, etc) Daniel O'Connor <darius@dons.net.au> parents: 5 diff changeset	140 fputs("\r\n\r\n\r\nHello world\r\n", stdout);
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	141
12 093bc0c3b1cc Add delay, ellipse and line demos. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	142 lcd_stripes();
093bc0c3b1cc Add delay, ellipse and line demos. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	143
093bc0c3b1cc Add delay, ellipse and line demos. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	144 lcd_circle(20, 20, 20, 1, LCD_RED); /* Bottom left */
093bc0c3b1cc Add delay, ellipse and line demos. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	145 lcd_circle(300, 220, 20, 1, LCD_WHITE); /* Top right */
093bc0c3b1cc Add delay, ellipse and line demos. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	146 lcd_circle(20, 220, 20, 1, LCD_BLUE); /* Top left */
093bc0c3b1cc Add delay, ellipse and line demos. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	147 lcd_circle(300, 20, 20, 1, LCD_GREEN); /* Bottom right */
093bc0c3b1cc Add delay, ellipse and line demos. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	148
093bc0c3b1cc Add delay, ellipse and line demos. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	149 lcd_line(20, 20, 20, 220, LCD_BLACK);
093bc0c3b1cc Add delay, ellipse and line demos. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	150 lcd_line(20, 220, 300, 220, LCD_BLACK);
093bc0c3b1cc Add delay, ellipse and line demos. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	151 lcd_line(300, 220, 300, 20, LCD_BLACK);
093bc0c3b1cc Add delay, ellipse and line demos. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	152 lcd_line(300, 20, 20, 20, LCD_BLACK);
093bc0c3b1cc Add delay, ellipse and line demos. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	153
093bc0c3b1cc Add delay, ellipse and line demos. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	154 lcd_ellipse(160, 120, 50, 30, 1, LCD_WHITE);
093bc0c3b1cc Add delay, ellipse and line demos. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	155 lcd_ellipse(160, 120, 30, 50, 1, LCD_WHITE);
093bc0c3b1cc Add delay, ellipse and line demos. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	156
31 03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	157 /* Setup temperature control stuff */
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	158 tempctrl_init();
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	159
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	160 while (1) {
2 274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	161 fputs("> ", stdout);
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	162
31 03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	163 while (cmd.state != 255) {
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	164 tempctrl_update();
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	165 }
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	166
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	167 if (cmd.len < 1)
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	168 goto out;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	169
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	170 /* Split command string on space/tab boundaries into argv/argc */
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	171 argc = 0;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	172 tmp = cmd.buf;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	173 for (ap = argv; (*ap = strsep(&cmd.buf, " \t")) != NULL;) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	174 if (**ap != '\0') {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	175 argc++;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	176 if (++ap >= &argv[MAXARGS])
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	177 break;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	178 }
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	179 }
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	180 /* Reset the buffer pointer after strsep() has mangled it */
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	181 cmd.buf = tmp;
12 093bc0c3b1cc Add delay, ellipse and line demos. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	182
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	183 if (!strcmp("gc", argv[0])) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	184 now = time(NULL);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	185 gmtime_r(&now, &nowtm);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	186 strftime(buf, sizeof(buf) - 1, "%Y/%m/%d %H:%M:%S UTC", &nowtm);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	187 printf("Time is %s (%d)\r\n", buf, (int)now);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	188 } else if (!strcmp("sc", argv[0])) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	189 struct timeval tv;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	190 if (argc != 2) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	191 fputs("Incorrect number of arguments\r\n", stdout);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	192 goto out;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	193 }
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	194
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	195 tv.tv_sec = atoi(argv[1]);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	196 tv.tv_usec = 0;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	197 settimeofday(&tv, NULL);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	198 } else if (!strcmp("read", argv[0])) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	199 printf("PB5 = %d\r\n", GPIO_ReadInputDataBit(GPIOB, GPIO_Pin_15));
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	200 } else if (!strcmp("touch", argv[0])) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	201 for (int i = 0; i < 10; i++) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	202 tp_getcoords(&x, &y, &z1, &z2, &t, &t2);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	203 printf("X = %5d Y = %5d Z1 = %5d Z2 = %5d T = %7.2f T2 = %7.2f\r\n", x, y, z1, z2, t, t2);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	204 }
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	205 } else if (!strcmp("fl", argv[0])) {
31 03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	206 flashcmd(argc - 1, argv + 1);
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	207 } else if (!strcmp("tc", argv[0])) {
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	208 tempctrl_cmd(argc - 1, argv + 1);
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	209 } else if (!strcmp("pwm", argv[0])) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	210 lcd_setpwm(atoi(argv[1]));
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	211 } else if (!strcmp("timing", argv[0])) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	212 fputs("Timing..\r\n", stdout);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	213 delay(10000);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	214 fputs("Done\r\n", stdout);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	215 } else if (!strcmp("circ", argv[0])) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	216 if (argc != 5) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	217 fputs("Unable to parse circ args\r\n", stdout);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	218 goto out;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	219 }
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	220 x = atoi(argv[1]);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	221 y = atoi(argv[2]);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	222 r = atoi(argv[3]);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	223 c = lcd_parsecol(argv[4][0]);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	224 lcd_circle(x, y, r, 0, c);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	225 } else if (!strncmp("ellip", cmd.buf, 6)) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	226 if (argc != 5) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	227 fputs("Unable to parse ellip args\r\n", stdout);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	228 goto out;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	229 }
16 db6011aa94d6 Use new delay routine on pin 2 so it doesn't interfere with 1 wire. Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	230
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	231 x = atoi(argv[1]);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	232 y = atoi(argv[2]);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	233 rx = atoi(argv[3]);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	234 ry = atoi(argv[4]);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	235 c = lcd_parsecol(argv[5][0]);
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 12 diff changeset	236
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	237 lcd_ellipse(x, y, rx, ry, 0, c);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	238 } else if (!strncmp("line", cmd.buf, 5)) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	239 if (argc != 5) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	240 fputs("Unable to parse line args\r\n", stdout);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	241 goto out;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	242 }
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	243
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	244 x = atoi(argv[1]);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	245 y = atoi(argv[2]);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	246 x1 = atoi(argv[3]);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	247 y1 = atoi(argv[4]);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	248 c = lcd_parsecol(argv[5][0]);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	249
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	250 lcd_line(x, y, x1, y1, c);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	251 } else if (!strcmp("delay", argv[0])) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	252 GPIO_InitTypeDef GPIO_InitStructure;
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 12 diff changeset	253
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	254 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	255 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	256 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	257 GPIO_Init(GPIOE, &GPIO_InitStructure);
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 12 diff changeset	258
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	259 for (x = 0; x < 100; x++) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	260 GPIO_SetBits(GPIOE, GPIO_Pin_2);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	261 delay(30);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	262 GPIO_ResetBits(GPIOE, GPIO_Pin_2);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	263 delay(60);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	264 }
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	265 } else if (!strcmp("rs", argv[0])) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	266 printf("Reset got %d\r\n", OWTouchReset());
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	267 } else if (!strcmp("sr", argv[0])) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	268 uint8_t ROM[8];
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	269 int8_t i;
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 12 diff changeset	270
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	271 memset(ROM, 0, 8);
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 12 diff changeset	272
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	273 i = OWFirst(ROM, 1, 0);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	274 do {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	275 switch (i) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	276 case OW_NOMODULES:
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	277 case OW_FOUND:
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 12 diff changeset	278 break;
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	279
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	280 case OW_BADWIRE:
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	281 case OW_NOPRESENCE:
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	282 case OW_BADCRC:
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 12 diff changeset	283 default:
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	284 printf("Err %d\r\n", i);
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 12 diff changeset	285 break;
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 12 diff changeset	286 }
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	287
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	288 if (i != OW_FOUND)
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	289 break;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	290
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	291 for (i = 0; i < 8; i++)
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	292 printf("%02x%s", ROM[i], i == 7 ? "\r\n" : ":");
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	293
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	294 i = OWNext(ROM, 1, 0);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	295 } while (1);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	296 } else if (!strcmp("rb", argv[0])) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	297 printf("Read bit returned %d\r\n", OWReadBit());
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	298 } else if (!strcmp("wb", argv[0])) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	299 if (argc != 2) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	300 fputs("Incorrect number of arguments\r\n", stdout);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	301 goto out;
3 74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	302 }
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	303
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	304 x = atoi(argv[1]);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	305 OWWriteBit(x);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	306 printf("Wrote %d\r\n", x);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	307 } else if (!strcmp("te", argv[0])) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	308 uint8_t ROM[8];
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	309 int16_t res;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	310
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	311 if (sscanf(argv[1], "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx:%hhx:%hhx",
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	312 &ROM[0], &ROM[1], &ROM[2], &ROM[3],
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	313 &ROM[4], &ROM[5], &ROM[6], &ROM[7]) != 8) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	314 fputs("Unable to parse ROM ID\r\n", stdout);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	315 goto out;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	316 }
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	317
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	318 res = OWGetTemp(ROM);
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	319 switch (res) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	320 case OW_TEMP_WRONG_FAM:
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	321 printf("ROM specified isn't a temperature sensor\r\n");
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	322 break;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	323
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	324 case OW_TEMP_CRC_ERR:
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	325 printf("CRC mismatch\r\n");
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	326 break;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	327
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	328 case OW_TEMP_NO_ROM:
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	329 printf("No ROM found\r\n");
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	330 break;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	331
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	332 default:
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	333 printf("%hd.%02hd\r\n", GETWHOLE(res), GETFRAC(res));
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	334 break;
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	335 }
31 03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	336 } else if (!strcmp("rtc", argv[0])) {
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	337 float f, err, maxerr;
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	338 uint32_t d, i;
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	339
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	340 maxerr = 0;
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	341 for (i = 0; i < 32768; i++) {
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	342 d = RTC_PS2USEC(32768 - i);
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	343 f = ((float)i * 1e6) / (float)RTC_PRESCALE;
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	344 err = fabs(d - f);
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	345 //rtcprintf("i = %d, d = %d, f = %.3f, err = %.3f\r\n", i, d, f, err);
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	346 if (err > maxerr)
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	347 maxerr = err;
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	348 }
03592ca4d37e Port tempctrl.c from AVR. I removed the beep code as I don't have a Daniel O'Connor <darius@dons.net.au> parents: 22 diff changeset	349 printf("Max err = %.3f\r\n", maxerr);
22 198ac9d95770 Add test for assert Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	350 } else if (!strcmp("assert", argv[0])) {
198ac9d95770 Add test for assert Daniel O'Connor <darius@dons.net.au> parents: 21 diff changeset	351 assert(0 == 1);
35 1fdfbad9eca7 Add 'cyc' command to test CM3 debug cycle counter. Daniel O'Connor <darius@dons.net.au> parents: 31 diff changeset	352 } else if (!strcmp("cyc", argv[0])) {
40 a38003b97de6 Use debug cycle counter to handle delays. Daniel O'Connor <darius@dons.net.au> parents: 35 diff changeset	353 if (argc != 2) {
a38003b97de6 Use debug cycle counter to handle delays. Daniel O'Connor <darius@dons.net.au> parents: 35 diff changeset	354 fputs("Incorrect number of arguments\r\n", stdout);
a38003b97de6 Use debug cycle counter to handle delays. Daniel O'Connor <darius@dons.net.au> parents: 35 diff changeset	355 goto out;
a38003b97de6 Use debug cycle counter to handle delays. Daniel O'Connor <darius@dons.net.au> parents: 35 diff changeset	356 }
a38003b97de6 Use debug cycle counter to handle delays. Daniel O'Connor <darius@dons.net.au> parents: 35 diff changeset	357
a38003b97de6 Use debug cycle counter to handle delays. Daniel O'Connor <darius@dons.net.au> parents: 35 diff changeset	358 delay(atoi(argv[1]));
35 1fdfbad9eca7 Add 'cyc' command to test CM3 debug cycle counter. Daniel O'Connor <darius@dons.net.au> parents: 31 diff changeset	359
40 a38003b97de6 Use debug cycle counter to handle delays. Daniel O'Connor <darius@dons.net.au> parents: 35 diff changeset	360 fputs("Done\r\n", stdout);
21 bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	361 } else if (!strcmp("zz", argv[0])) {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	362 NVIC_SystemReset();
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	363 } else {
bd8e2cf04034 - Add flash erase, write & read commands (needs more work). Daniel O'Connor <darius@dons.net.au> parents: 19 diff changeset	364 printf("Unknown command\r\n");
3 74e9b3baac1e Jumbo commit to make things work. Daniel O'Connor <darius@dons.net.au> parents: 2 diff changeset	365 }
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: 7 diff changeset	366 out:
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	367 cmd.state = 0;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	368 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	369 }
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	370
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	371 /* Configure interrupt controller */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	372 #ifdef VECT_TAB_RAM
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	373 /* vector-offset (TBLOFF) from bottom of SRAM. defined in linker script */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	374 extern uint32_t _isr_vectorsram_offs;
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	375 #else
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	376 extern uint32_t _isr_vectorsflash_offs;
2 274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	377 #endif
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	378
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	379 void
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	380 NVIC_Configuration(void) {
2 274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	381 NVIC_InitTypeDef NVIC_InitStructure;
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	382
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	383 #ifdef VECT_TAB_RAM
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	384 /* Set the Vector Table base location at 0x20000000+_isr_vectorsram_offs */
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	385 NVIC_SetVectorTable(NVIC_VectTab_RAM, (uint32_t)&_isr_vectorsram_offs);
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	386 #else
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	387 /* Set the Vector Table base location at 0x08000000+_isr_vectorsflash_offs */
c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	388 NVIC_SetVectorTable(NVIC_VectTab_FLASH, (uint32_t)&_isr_vectorsflash_offs);
2 274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	389 #endif
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	390
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	391 /* Enable the USART1 Interrupt */
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	392 NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	393 NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	394 NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	395 NVIC_Init(&NVIC_InitStructure);
0 c59513fd84fb Initial commit of STM32 test code. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	396 }
2 274e01fa5a4c - Do console IO with RX IRQs. Daniel O'Connor <darius@dons.net.au> parents: 0 diff changeset	397

Mercurial > ~darius > hgwebdir.cgi > stm32temp

annotate main.c @ 40:a38003b97de6