stm32temp: hw.c annotate

annotate hw.c @ 27:5c9d2e3d6591

Add flashread/writeblock commands which read/write a block of data to flash with a CRC.

author	Daniel O'Connor <darius@dons.net.au>
date	Tue, 20 Nov 2012 21:54:06 +1030
parents	1e2fa7396f98
children	435c6330896c

rev	line source
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	1 #include <stdint.h>
10 0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	2 #include <stdio.h>
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	3 #include "stm32f10x.h"
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	4
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	5 #include "1wire.h"
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	6 #include "lcd.h"
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	7
18 afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	8 #define I2C_TIMEOUT 10000
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	9
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	10 static void hw_port_cfg(void);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	11
10 0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	12 /* Wait for cnt microseconds */
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	13 void
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	14 _usleep16(uint16_t cnt) {
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	15 TIM6->ARR = cnt > 3 ? cnt - 3 : cnt;
10 0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	16 TIM_SetCounter(TIM6, 0);
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	17 TIM_Cmd(TIM6, ENABLE);
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	18 while ((TIM6->CR1 & TIM_CR1_CEN) != 0)
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	19 ;
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	20 }
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	21
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	22 void
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	23 hw_init(void) {
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	24 hw_port_cfg();
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	25 lcd_init();
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	26 lcd_setpwm(1000);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	27 }
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	28
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	29 static void
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	30 hw_port_cfg(void) {
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	31 FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	32 FSMC_NORSRAMTimingInitTypeDef p;
18 afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	33 GPIO_InitTypeDef GPIO_InitStructure;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	34 I2C_InitTypeDef I2C_InitStructure;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	35 SPI_InitTypeDef SPI_InitStructure;
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	36 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
18 afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	37 USART_InitTypeDef USART_InitStructure;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	38
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	39 /* Enable clocks */
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	40 RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR \| RCC_APB1Periph_BKP \| RCC_APB1Periph_TIM4 \| RCC_APB1Periph_I2C1,
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	41 ENABLE);
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	42
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	43 RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 \| RCC_APB2Periph_GPIOA \| RCC_APB2Periph_GPIOB \| RCC_APB2Periph_GPIOB \|
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	44 RCC_APB2Periph_GPIOE \| RCC_APB2Periph_SPI1, ENABLE);
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	45
27 5c9d2e3d6591 Add flashread/writeblock commands which read/write a block of data to Daniel O'Connor <darius@dons.net.au> parents: 24 diff changeset	46 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC \| RCC_AHBPeriph_CRC, ENABLE);
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	47
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	48 /* Allow access to BKP Domain */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	49 PWR_BackupAccessCmd(ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	50
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	51 /* Reset Backup Domain
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	52 *
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	53 * This resets the RTC etc back to 0 so probably only useful under user command
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	54 BKP_DeInit();
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	55 */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	56
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	57 /* Enable Low Speed External clock */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	58 RCC_LSEConfig(RCC_LSE_ON);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	59
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	60 /* Wait till LSE is ready */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	61 while (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET)
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	62 ;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	63
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	64 /* Select LSE as RTC Clock Source */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	65 RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	66
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	67 /* Enable RTC Clock */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	68 RCC_RTCCLKCmd(ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	69
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	70 /* Wait for RTC registers synchronization */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	71 RTC_WaitForSynchro();
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	72
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	73 /* Wait until last write operation on RTC registers has finished */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	74 RTC_WaitForLastTask();
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	75
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	76 /* Wait until last write operation on RTC registers has finished */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	77 RTC_WaitForLastTask();
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	78
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	79 /* Set RTC prescaler: set RTC period to 1sec */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	80 RTC_SetPrescaler(32767); /* RTC period = RTCCLK/RTC_PR = (32.768 KHz)/(32767+1) */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	81
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	82 /* Wait until last write operation on RTC registers has finished */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	83 RTC_WaitForLastTask();
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	84
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	85 /* Port configuration */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	86 /* Configure USART1 TX (PA.09) as alternate function push-pull */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	87 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	88 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	89 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	90 GPIO_Init(GPIOA, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	91
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	92 /* Configure USART1 RX (PA.10) as input floating */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	93 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	94 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	95 GPIO_Init(GPIOA, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	96
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	97 /* Configure PB5 as output push-pull for LED */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	98 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	99 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	100 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	101 GPIO_Init(GPIOB, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	102
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	103 /* Configure PB15 as input pull-up push-pull for push button */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	104 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	105 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	106 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	107 GPIO_Init(GPIOB, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	108
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	109 /* USART configuration */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	110 /* USART1 - 115200 8n1, no flow control TX & RX enabled */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	111 USART_InitStructure.USART_BaudRate = 115200;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	112 USART_InitStructure.USART_WordLength = USART_WordLength_8b;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	113 USART_InitStructure.USART_StopBits = USART_StopBits_1;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	114 USART_InitStructure.USART_Parity = USART_Parity_No;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	115 USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	116 USART_InitStructure.USART_Mode = USART_Mode_Rx \| USART_Mode_Tx;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	117 USART_Init(USART1, &USART_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	118
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	119 /* Enable interrupts on receive data */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	120 USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	121
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	122 /* Enable USART */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	123 USART_Cmd(USART1, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	124
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	125 /* Enable FSMC clock */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	126
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	127 /* Configures LCD Control lines (FSMC Pins) in alternate function Push-Pull mode.
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	128 *
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	129 * PD0(D2), PD1(D3), PD4(NOE), PD5(NWE), PD7(NE1/CS), PD8(D13), PD9(D14),
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	130 * PD10(D15), PD11(A16/RS) PD14(D0), PD15(D1)
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	131 */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	132 GPIO_InitStructure.GPIO_Pin = (GPIO_Pin_0 \| GPIO_Pin_1 \| GPIO_Pin_4 \| GPIO_Pin_5 \| GPIO_Pin_7 \|
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	133 GPIO_Pin_8 \| GPIO_Pin_9 \| GPIO_Pin_10 \| GPIO_Pin_11 \|
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	134 GPIO_Pin_14 \| GPIO_Pin_15);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	135 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	136 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	137 GPIO_Init(GPIOD, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	138
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	139 /* PE7(D4), PE8(D5), PE9(D6), PE10(D7), PE11(D8), PE12(D9), PE13(D10),
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	140 * PE14(D11), PE15(D12)
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	141 */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	142 GPIO_InitStructure.GPIO_Pin = (GPIO_Pin_7 \| GPIO_Pin_8 \| GPIO_Pin_9 \| GPIO_Pin_10 \|
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	143 GPIO_Pin_11 \| GPIO_Pin_12 \| GPIO_Pin_13 \| GPIO_Pin_14 \|
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	144 GPIO_Pin_15);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	145 GPIO_Init(GPIOE, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	146
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	147 /* Configure backlight control (PD13/FSMC_A18 remapped to TIM4_CH2) */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	148
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	149 /* Enable timer function
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	150 * Note source clock is SYSCLK / 2 = 36MHz
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	151 */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	152 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	153 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	154 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	155 GPIO_Init(GPIOD, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	156
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	157 /* Remap TIM4_CH2 to PD13 */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	158 GPIO_PinRemapConfig(GPIO_Remap_TIM4, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	159
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	160 /* Reset TIM4 */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	161 TIM_DeInit(TIM4);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	162
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	163 /* Time Base configuration */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	164 TIM_TimeBaseStructure.TIM_Period = 999;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	165 TIM_TimeBaseStructure.TIM_Prescaler = 0;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	166 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	167 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Down;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	168
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	169 TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	170
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	171 /* Enable timer */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	172 TIM_OC2PreloadConfig(TIM4, TIM_OCPreload_Enable);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	173 TIM_ARRPreloadConfig(TIM4, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	174 TIM_Cmd(TIM4, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	175
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	176 /* Configure reset pin (PE1) as GPIO out PP */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	177 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	178 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	179 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	180 GPIO_Init(GPIOE, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	181
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	182 /* Configures the Parallel interface (FSMC) for LCD (Parallel mode) */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	183 /* Timing configuration */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	184 p.FSMC_AddressSetupTime = 5;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	185 p.FSMC_AddressHoldTime = 5;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	186 p.FSMC_DataSetupTime = 5;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	187 p.FSMC_BusTurnAroundDuration = 0;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	188 p.FSMC_CLKDivision = 0;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	189 p.FSMC_DataLatency = 0;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	190 p.FSMC_AccessMode = FSMC_AccessMode_A;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	191
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	192 /* FSMC_Bank1_NORSRAM1 configured as follows:
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	193 - Data/Address MUX = Disable
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	194 - Memory Type = SRAM
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	195 - Data Width = 16bit
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	196 - Write Operation = Enable
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	197 - Extended Mode = Disable
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	198 - Asynchronous Wait = Disable */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	199 FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	200 FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	201 FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	202 FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	203 FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	204 FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	205 FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	206 FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	207 FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	208 FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	209 FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	210 FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	211 FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	212 FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	213 FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	214 FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	215
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	216 /* Enable FSMC_Bank1_NORSRAM1 */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	217 FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	218
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	219 /* Configure touch screen controller
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	220 *
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	221 * Connected to SPI1 which is shared with the AT45DB161D.
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	222 *
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	223 * The touch screen is selected with PB7.
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	224 * The flash chip is selected with PA4.
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	225 */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	226
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	227 /* Configure MOSI, MISO and SCLK as alternate function PP */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	228 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 \| GPIO_Pin_6 \| GPIO_Pin_7;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	229 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	230 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	231 GPIO_Init(GPIOA, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	232
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	233 /* Configure flash chip select pin (PA4) as GPIO out PP */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	234 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	235 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	236 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	237 GPIO_Init(GPIOA, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	238
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	239 /* Configure touch chip select pin (PB7) as GPIO out PP */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	240 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	241 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	242 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	243 GPIO_Init(GPIOB, &GPIO_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	244
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	245 /* De-select touch & flash */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	246 GPIO_SetBits(GPIOA, GPIO_Pin_4);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	247 GPIO_SetBits(GPIOB, GPIO_Pin_7);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	248
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	249 /* SPI1 Config */
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	250 SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	251 SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	252 SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	253 SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	254 SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	255 SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
24 1e2fa7396f98 Reduce prescaler to 2, the flash is capable of 25MHz reads (although Daniel O'Connor <darius@dons.net.au> parents: 18 diff changeset	256 SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	257 SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	258 SPI_InitStructure.SPI_CRCPolynomial = 7;
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	259 SPI_Init(SPI1, &SPI_InitStructure);
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	260
58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	261 /* SPI1 enable */
10 0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	262 SPI_Cmd(SPI1, ENABLE);
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	263
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	264 /* Configure TIM6 for interval timing */
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	265 /* Reset TIM6 */
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	266 TIM_DeInit(TIM6);
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	267
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	268 /* Time Base configuration */
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	269 TIM_TimeBaseStructure.TIM_Period = 0;
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	270 TIM_TimeBaseStructure.TIM_Prescaler = (SystemCoreClock / 2 / 1000000) - 1; /* 1 MHz clock */
10 0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	271 TIM_TimeBaseInit(TIM6, &TIM_TimeBaseStructure);
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	272
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	273 TIM_Cmd(TIM6, DISABLE);
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	274
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	275 /* Setup for single pulse mode clear UDIS */
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	276 TIM_SelectOnePulseMode(TIM6, TIM_OPMode_Single);
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	277 TIM_UpdateDisableConfig(TIM6, DISABLE);
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	278
18 afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	279 /* Setup GPIO for delay test & 1-wire
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	280 * PE2 -> pin 3 on header
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	281 * PE3 -> pin 4 on header */
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	282 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2 \| GPIO_Pin_3;
10 0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	283 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	284 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	285 GPIO_Init(GPIOE, &GPIO_InitStructure);
0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	286
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	287 OWInit();
10 0b75cff7c570 Add _usleep16 - sleeps for cnt microseconds. Daniel O'Connor <darius@dons.net.au> parents: 8 diff changeset	288
13 96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	289 #if 0
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	290 while (1) {
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	291 GPIO_SetBits(GPIOE, GPIO_Pin_2);
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	292 _usleep16(10);
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	293 GPIO_ResetBits(GPIOE, GPIO_Pin_2);
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	294 _usleep16(20);
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	295 GPIO_SetBits(GPIOE, GPIO_Pin_2);
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	296 _usleep16(30);
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	297 GPIO_ResetBits(GPIOE, GPIO_Pin_2);
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	298 _usleep16(100);
96c345d304af Add 1wire code. Daniel O'Connor <darius@dons.net.au> parents: 10 diff changeset	299 }
18 afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	300 #endif
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	301
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	302 /* Setup I2C bus */
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	303
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	304 /* Configure SCL/SDA pins */
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	305 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 \| GPIO_Pin_9;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	306 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	307 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	308 GPIO_Init(GPIOB, &GPIO_InitStructure);
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	309
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	310 /* Reset I2C1 */
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	311 I2C_DeInit(I2C1);
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	312
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	313 /* Setup I2C1 */
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	314 I2C_InitStructure.I2C_Mode = I2C_Mode_I2C;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	315 I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_2;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	316 I2C_InitStructure.I2C_OwnAddress1 = 0x00;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	317 I2C_InitStructure.I2C_Ack = I2C_Ack_Enable;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	318 I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	319 I2C_InitStructure.I2C_ClockSpeed = 100000;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	320 I2C_Init(I2C1, &I2C_InitStructure);
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	321
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	322 /* Start I2C controller */
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	323 I2C_Cmd(I2C1, ENABLE);
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	324
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	325 #if 0
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	326 uint32_t I2C_TimeOut = I2C_TIMEOUT;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	327
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	328 /* Clear the I2C1 AF flag */
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	329 I2C_ClearFlag(I2C1, I2C_FLAG_AF);
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	330
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	331 /* Enable I2C1 acknowledgement if it is already disabled by other function */
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	332 I2C_AcknowledgeConfig(I2C1, ENABLE);
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	333
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	334 /---------------------------- Transmission Phase ---------------------------/
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	335
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	336 /* Send I2C1 START condition */
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	337 I2C_GenerateSTART(I2C1, ENABLE);
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	338
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	339 /!< Test on I2C1 EV5 and clear it /
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	340 while ((!I2C_GetFlagStatus(I2C1, I2C_FLAG_SB)) && I2C_TimeOut) {
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	341 I2C_TimeOut--;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	342 }
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	343
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	344 if (I2C_TimeOut == 0) {
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	345 return ERROR;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	346 }
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	347
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	348 I2C_TimeOut = I2C_TIMEOUT;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	349 /* Send STLM75 slave address for write */
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	350 I2C_Send7bitAddress(I2C1, LM75_ADDR, I2C_Direction_Transmitter);
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	351
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	352 while ((!I2C_CheckEvent(LM75_I2C, I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED)) && I2C_TimeOut) {
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	353 I2C_TimeOut--;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	354 }
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	355
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	356 if ((I2C_GetFlagStatus(LM75_I2C, I2C_FLAG_AF) != 0x00) \|\| (I2C_TimeOut == 0)) {
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	357 return ERROR;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	358 } else {
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	359 return SUCCESS;
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	360 }
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	361
afdd22502c2a Add i2c test code Daniel O'Connor <darius@dons.net.au> parents: 13 diff changeset	362 #endif
8 58d76cf522ff Split out code into separate files. Daniel O'Connor <darius@dons.net.au> parents: diff changeset	363 }

Mercurial > ~darius > hgwebdir.cgi > stm32temp

annotate hw.c @ 27:5c9d2e3d6591