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annotate libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/TIM/TIM1_Synchro/main.c @ 8:58d76cf522ff

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Split out code into separate files.
author Daniel O'Connor <darius@dons.net.au>
date Sat, 04 Feb 2012 13:29:31 +1030
parents c59513fd84fb
children
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1 /**
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2 ******************************************************************************
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3 * @file TIM/TIM1_Synchro/main.c
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4 * @author MCD Application Team
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5 * @version V3.5.0
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6 * @date 08-April-2011
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7 * @brief Main program body
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8 ******************************************************************************
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9 * @attention
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10 *
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11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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17 *
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18 * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
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19 ******************************************************************************
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20 */
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21
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22 /* Includes ------------------------------------------------------------------*/
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23 #include "stm32f10x.h"
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24
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25 /** @addtogroup STM32F10x_StdPeriph_Examples
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26 * @{
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27 */
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28
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29 /** @addtogroup TIM_TIM1_Synchro
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30 * @{
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31 */
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32
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33 /* Private typedef -----------------------------------------------------------*/
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34 /* Private define ------------------------------------------------------------*/
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35 /* Private macro -------------------------------------------------------------*/
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36 /* Private variables ---------------------------------------------------------*/
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37 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
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38 TIM_OCInitTypeDef TIM_OCInitStructure;
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39 TIM_BDTRInitTypeDef TIM_BDTRInitStructure;
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40
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41 /* Private function prototypes -----------------------------------------------*/
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42 void RCC_Configuration(void);
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43 void GPIO_Configuration(void);
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44
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45 /* Private functions ---------------------------------------------------------*/
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46
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47 /**
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48 * @brief Main program
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49 * @param None
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50 * @retval None
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51 */
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52 int main(void)
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53 {
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54 /*!< At this stage the microcontroller clock setting is already configured,
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55 this is done through SystemInit() function which is called from startup
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56 file (startup_stm32f10x_xx.s) before to branch to application main.
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57 To reconfigure the default setting of SystemInit() function, refer to
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58 system_stm32f10x.c file
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59 */
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60
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61 /* System Clocks Configuration */
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62 RCC_Configuration();
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63
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64 /* GPIO Configuration */
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65 GPIO_Configuration();
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66
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67 /* TIM1 and Timers(TIM3 and TIM4) synchronisation in parallel mode -----------
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68 1/TIM1 is configured as Master Timer:
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69 - PWM Mode is used
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70 - The TIM1 Update event is used as Trigger Output
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71
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72 2/TIM3 and TIM4 are slaves for TIM1,
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73 - PWM Mode is used
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74 - The ITR0(TIM1) is used as input trigger for both slaves
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75 - Gated mode is used, so starts and stops of slaves counters
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76 are controlled by the Master trigger output signal(update event).
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77
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78 o For Low-density, Medium-density, High-density and Connectivity line devices:
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79 The TIMxCLK is fixed to 72 MHz, Prescaler = 0 so the TIM1 counter clock is 72 MHz.
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80
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81 The Master Timer TIM1 is running at:
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82 TIM1 frequency = TIM1 counter clock / (TIM1_Period + 1) = 281.250 KHz
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83 and the duty cycle is equal to: TIM1_CCR1/(TIM1_ARR + 1) = 50%
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84
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85 The TIM3 is running at:
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86 (TIM1 frequency)/ ((TIM3 period +1)* (Repetition_Counter+1)) = 18.750 KHz and
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87 a duty cycle equal to TIM3_CCR1/(TIM3_ARR + 1) = 33.3%
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88
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89 The TIM4 is running at:
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90 (TIM1 frequency)/ ((TIM4 period +1)* (Repetition_Counter+1)) = 28.125 KHz and
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91 a duty cycle equal to TIM4_CCR1/(TIM4_ARR + 1) = 50%
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92
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93 o For Low-Density Value line and Medium-Density Value line devices:
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94 The TIMxCLK is fixed to 24 MHz, Prescaler = 0 so the TIM1 counter clock is 24 MHz.
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95 TIM1 frequency = 93.75 KHz
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96 TIM3 frequency = 6.25 KHz
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97 TIM4 frequency = 9.375 KHz
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98 --------------------------------------------------------------------------- */
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99
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100 /* TIM3 Peripheral Configuration ----------------------------------------*/
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101 /* TIM3 Slave Configuration: PWM1 Mode */
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102 TIM_TimeBaseStructure.TIM_Period = 2;
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103 TIM_TimeBaseStructure.TIM_Prescaler = 0;
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104 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
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105 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
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106
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107 TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure);
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108
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109 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
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110 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
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111 TIM_OCInitStructure.TIM_Pulse = 1;
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112
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113 TIM_OC1Init(TIM3, &TIM_OCInitStructure);
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114
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115 /* Slave Mode selection: TIM3 */
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116 TIM_SelectSlaveMode(TIM3, TIM_SlaveMode_Gated);
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117 TIM_SelectInputTrigger(TIM3, TIM_TS_ITR0);
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118
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119 /* TIM4 Peripheral Configuration ----------------------------------------*/
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120 /* TIM4 Slave Configuration: PWM1 Mode */
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121 TIM_TimeBaseStructure.TIM_Period = 1;
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122 TIM_TimeBaseStructure.TIM_Prescaler = 0;
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123 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
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124 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
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125
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126 TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure);
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127
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128 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
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129 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
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130 TIM_OCInitStructure.TIM_Pulse = 1;
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131
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132 TIM_OC1Init(TIM4, &TIM_OCInitStructure);
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133
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134 /* Slave Mode selection: TIM4 */
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135 TIM_SelectSlaveMode(TIM4, TIM_SlaveMode_Gated);
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136 TIM_SelectInputTrigger(TIM4, TIM_TS_ITR0);
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137
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138 /* TIM1 Peripheral Configuration ----------------------------------------*/
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139 /* Time Base configuration */
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140 TIM_TimeBaseStructure.TIM_Prescaler = 0;
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141 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
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142 TIM_TimeBaseStructure.TIM_Period = 255;
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143 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
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144 TIM_TimeBaseStructure.TIM_RepetitionCounter = 4;
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145
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146 TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);
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147
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148 /* Channel 1 Configuration in PWM mode */
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149 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM2;
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150 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
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151 TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
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152 TIM_OCInitStructure.TIM_Pulse = 127;
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153 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_Low;
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154 TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_Low;
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155 TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
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156 TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCIdleState_Reset;
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157
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158 TIM_OC1Init(TIM1, &TIM_OCInitStructure);
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159
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160 /* Automatic Output enable, Break, dead time and lock configuration*/
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161 TIM_BDTRInitStructure.TIM_OSSRState = TIM_OSSRState_Enable;
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162 TIM_BDTRInitStructure.TIM_OSSIState = TIM_OSSIState_Enable;
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163 TIM_BDTRInitStructure.TIM_LOCKLevel = TIM_LOCKLevel_1;
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164 TIM_BDTRInitStructure.TIM_DeadTime = 5;
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165 TIM_BDTRInitStructure.TIM_Break = TIM_Break_Disable;
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166 TIM_BDTRInitStructure.TIM_BreakPolarity = TIM_BreakPolarity_High;
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167 TIM_BDTRInitStructure.TIM_AutomaticOutput = TIM_AutomaticOutput_Disable;
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168
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169 TIM_BDTRConfig(TIM1, &TIM_BDTRInitStructure);
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170
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171 /* Master Mode selection */
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172 TIM_SelectOutputTrigger(TIM1, TIM_TRGOSource_Update);
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173
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174 /* Select the Master Slave Mode */
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175 TIM_SelectMasterSlaveMode(TIM1, TIM_MasterSlaveMode_Enable);
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176
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177 /* TIM1 counter enable */
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178 TIM_Cmd(TIM1, ENABLE);
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179
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180 /* TIM enable counter */
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181 TIM_Cmd(TIM3, ENABLE);
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182 TIM_Cmd(TIM4, ENABLE);
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183
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184 /* Main Output Enable */
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185 TIM_CtrlPWMOutputs(TIM1, ENABLE);
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186
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187 while (1)
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188 {}
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189 }
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190
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191 /**
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192 * @brief Configures the different system clocks.
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193 * @param None
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194 * @retval None
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195 */
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196 void RCC_Configuration(void)
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197 {
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198 /* TIM1, GPIOA and GPIOB clock enable */
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199 RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1 | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOE |
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200 RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO, ENABLE);
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201
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202 /* TIM3 and TIM4 clock enable */
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203 RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4, ENABLE);
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204 }
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205
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206 /**
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207 * @brief Configures TIM1, TIM3 and TIM4 Pins.
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208 * @param None
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209 * @retval None
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210 */
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211 void GPIO_Configuration(void)
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212 {
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213 GPIO_InitTypeDef GPIO_InitStructure;
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214
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215 #ifdef STM32F10X_CL
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216 /* GPIOC Configuration: TIM3 channel1 as alternate function push-pull */
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217 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
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218 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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219 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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220
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221 GPIO_Init(GPIOC, &GPIO_InitStructure);
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222
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223 GPIO_PinRemapConfig(GPIO_FullRemap_TIM3, ENABLE);
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224
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225 /* GPIOE Configuration: TIM1 channel1 as alternate function push-pull */
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226 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;
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227
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228 GPIO_Init(GPIOE, &GPIO_InitStructure);
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229
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230 GPIO_PinRemapConfig(GPIO_FullRemap_TIM1, ENABLE);
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231
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232 #else
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233
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234 /* GPIOA Configuration: TIM1 Channel1 and TIM3 Channel1 as alternate function push-pull */
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235 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 | GPIO_Pin_8;
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236 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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237 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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238 GPIO_Init(GPIOA, &GPIO_InitStructure);
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239 #endif
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240
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241 /* GPIOB Configuration: TIM4 Channel1 as alternate function push-pull */
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242 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
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243 GPIO_Init(GPIOB, &GPIO_InitStructure);
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244 }
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245
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246 #ifdef USE_FULL_ASSERT
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247
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248 /**
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249 * @brief Reports the name of the source file and the source line number
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250 * where the assert_param error has occurred.
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251 * @param file: pointer to the source file name
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252 * @param line: assert_param error line source number
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253 * @retval None
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254 */
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255 void assert_failed(uint8_t* file, uint32_t line)
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256 {
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257 /* User can add his own implementation to report the file name and line number,
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258 ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
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259
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260 while (1)
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261 {}
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262 }
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263
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264 #endif
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265
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266 /**
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267 * @}
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268 */
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269
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270 /**
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271 * @}
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272 */
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273
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274 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/