Mercurial > ~darius > hgwebdir.cgi > stm32temp
annotate libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/TIM/OnePulse/readme.txt @ 8:58d76cf522ff
Split out code into separate files.
author | Daniel O'Connor <darius@dons.net.au> |
---|---|
date | Sat, 04 Feb 2012 13:29:31 +1030 |
parents | c59513fd84fb |
children |
rev | line source |
---|---|
0
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
1 /** |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
2 @page TIM_OnePulse TIM One Pulse example |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
3 |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
4 @verbatim |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
5 ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
6 * @file TIM/OnePulse/readme.txt |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
7 * @author MCD Application Team |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
8 * @version V3.5.0 |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
9 * @date 08-April-2011 |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
10 * @brief Description of the TIM One Pulse example. |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
11 ****************************************************************************** |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
18 ****************************************************************************** |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
19 @endverbatim |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
20 |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
21 @par Example Description |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
22 |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
23 This example shows how to use the TIM peripheral to generate a One pulse Mode |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
24 after a Rising edge of an external signal is received in Timer Input pin. |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
25 |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
26 TIM2CLK = SystemCoreClock, we want to get TIM2 counter clock at 24 MHz: |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
27 - Prescaler = (TIM2CLK / TIM2 counter clock) - 1 |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
28 SystemCoreClock is set to 72 MHz for Low-density, Medium-density, High-density |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
29 and Connectivity line devices and to 24 MHz for Low-Density Value line, |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
30 Medium-Density Value line and High-Density devices. |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
31 |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
32 The Autoreload value is 65535 (TIM4->ARR), so the maximum frequency value to |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
33 trigger the TIM4 input is 24000000/65535 = 300 Hz. |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
34 |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
35 The TIM4 is configured as follows: |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
36 The One Pulse mode is used, the external signal is connected to TIM4 CH2 pin (PB.07), |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
37 the rising edge is used as active edge, the One Pulse signal is output |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
38 on TIM4_CH1 (PB.06). |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
39 |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
40 The TIM_Pulse defines the delay value, the delay value is fixed to: |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
41 delay = CCR1/TIM4 counter clock = 16383 / 24000000 = 682.6 us. |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
42 The (TIM_Period - TIM_Pulse) defines the One Pulse value, the pulse value is fixed to: |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
43 One Pulse value = (TIM_Period - TIM_Pulse)/TIM4 counter clock |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
44 = (65535 - 16383) / 24000000 = 2.048 ms. |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
45 |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
46 @par Directory contents |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
47 |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
48 - TIM/OnePulse/stm32f10x_conf.h Library Configuration file |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
49 - TIM/OnePulse/stm32f10x_it.c Interrupt handlers |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
50 - TIM/OnePulse/stm32f10x_it.h Interrupt handlers header file |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
51 - TIM/OnePulse/main.c Main program |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
52 - TIM/OnePulse/system_stm32f10x.c STM32F10x system source file |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
53 |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
54 @par Hardware and Software environment |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
55 |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
56 - This example runs on STM32F10x Connectivity line, High-Density, High-Density |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
57 Value line, Medium-Density, XL-Density, Medium-Density Value line, Low-Density |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
58 and Low-Density Value line Devices. |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
59 |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
60 - This example has been tested with STMicroelectronics STM32100E-EVAL (High-Density |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
61 Value line), STM32100B-EVAL (Medium-Density Value line), STM3210C-EVAL (Connectivity line), |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
62 STM3210E-EVAL (High-Density and XL-Density) and STM3210B-EVAL (Medium-Density) |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
63 evaluation boards and can be easily tailored to any other supported device |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
64 and development board. |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
65 |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
66 - STM32100B-EVAL, STM3210E-EVAL, STM3210B-EVAL, STM32100E-EVAL and STM3210C-EVAL Set-up |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
67 - Connect the external signal to the TIM4_CH2 pin (PB.07) |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
68 - Connect the TIM4_CH1 (PB.06) pin to an oscilloscope to monitor the waveform. |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
69 |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
70 @par How to use it ? |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
71 |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
72 In order to make the program work, you must do the following : |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
73 - Copy all source files from this example folder to the template folder under |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
74 Project\STM32F10x_StdPeriph_Template |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
75 - Open your preferred toolchain |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
76 - Rebuild all files and load your image into target memory |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
77 - Run the example |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
78 |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
79 @note |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
80 - Low-density Value line devices are STM32F100xx microcontrollers where the |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
81 Flash memory density ranges between 16 and 32 Kbytes. |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
82 - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
83 microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
84 - Medium-density Value line devices are STM32F100xx microcontrollers where |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
85 the Flash memory density ranges between 64 and 128 Kbytes. |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
86 - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
87 microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes. |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
88 - High-density Value line devices are STM32F100xx microcontrollers where |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
89 the Flash memory density ranges between 256 and 512 Kbytes. |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
90 - High-density devices are STM32F101xx and STM32F103xx microcontrollers where |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
91 the Flash memory density ranges between 256 and 512 Kbytes. |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
92 - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
93 the Flash memory density ranges between 512 and 1024 Kbytes. |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
94 - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
95 |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
96 * <h3><center>© COPYRIGHT 2011 STMicroelectronics</center></h3> |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
97 */ |