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annotate libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/TIM/OCInactive/readme.txt @ 8:58d76cf522ff

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author Daniel O'Connor <darius@dons.net.au>
date Sat, 04 Feb 2012 13:29:31 +1030
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1 /**
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2 @page TIM_OCInactive TIM OC Inactive example
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3
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4 @verbatim
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5 ******************** (C) COPYRIGHT 2011 STMicroelectronics *******************
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6 * @file TIM/OCInactive/readme.txt
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7 * @author MCD Application Team
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8 * @version V3.5.0
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9 * @date 08-April-2011
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10 * @brief Description of the TIM OC Inactive example.
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11 ******************************************************************************
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12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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18 ******************************************************************************
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19 @endverbatim
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20
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21 @par Example Description
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22
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23 This example shows how to configure the TIM peripheral in Output Compare Inactive
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24 mode with the corresponding Interrupt requests for each channel.
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25
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26 The TIM2CLK frequency is set to SystemCoreClock / 2 (Hz), and the objective is
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27 to get TIM2 counter clock at 1 KHz so the Prescaler is computed as following:
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28 - Prescaler = (TIM2CLK / TIM2 counter clock) - 1
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29 SystemCoreClock is set to 72 MHz for Low-density, Medium-density, High-density
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30 and Connectivity line devices and to 24 MHz for Value line devices.
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31
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32 The TIM2 CCR1 register value is equal to 1000:
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33 TIM2_CC1 delay = CCR1_Val/TIM2 counter clock = 1000 ms
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34 so the PC.06 is reset after a delay equal to 1000 ms.
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35
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36 The TIM2 CCR2 register value is equal to 500:
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37 TIM2_CC2 delay = CCR2_Val/TIM2 counter clock = 500 ms
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38 so the PC.07 is reset after a delay equal to 500 ms.
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39
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40 The TIM2 CCR3 register value is equal to 250:
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41 TIM2_CC3 delay = CCR3_Val/TIM2 counter clock = 250 ms
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42 so the PC.08 is reset after a delay equal to 250 ms.
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43
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44 The TIM2 CCR4 register value is equal to 125:
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45 TIM2_CC4 delay = CCR4_Val/TIM2 counter clock = 125 ms
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46 so the PC.09 is reset after a delay equal to 125 ms.
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47
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48 While the counter is lower than the Output compare registers values, which
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49 determines the Output delay, the PC.06, PC.07, PC.08 and PC.09 pin are turned on.
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50
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51 When the counter value reaches the Output compare registers values, the Output
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52 Compare interrupts are generated and, in the handler routine, these pins are turned off.
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53
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54 @par Directory contents
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55
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56 - TIM/OCInactive/stm32f10x_conf.h Library Configuration file
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57 - TIM/OCInactive/stm32f10x_it.c Interrupt handlers
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58 - TIM/OCInactive/stm32f10x_it.h Interrupt handlers header file
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59 - TIM/OCInactive/main.c Main program
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60 - TIM/OCInactive/system_stm32f10x.c STM32F10x system source file
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61
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62 @par Hardware and Software environment
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63
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64 - This example runs on STM32F10x Connectivity line, High-Density, High-Density
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65 Value line, Medium-Density, XL-Density, Medium-Density Value line, Low-Density
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66 and Low-Density Value line Devices.
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67
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68 - This example has been tested with STMicroelectronics STM32100E-EVAL (High-Density
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69 Value line), STM32100B-EVAL (Medium-Density Value line), STM3210C-EVAL (Connectivity line),
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70 STM3210E-EVAL (High-Density and XL-Density) and STM3210B-EVAL (Medium-Density)
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71 evaluation boards and can be easily tailored to any other supported device
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72 and development board.
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73
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74 - STM32100B-EVAL, STM3210E-EVAL, STM32100E-EVAL STM3210B-EVAL and STM3210C-EVAL Set-up
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75 - Connect the following pins to an oscilloscope to monitor the different
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76 waveforms:
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77 - PC.06
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78 - PC.07
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79 - PC.08
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80 - PC.09
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81
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82 @par How to use it ?
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83
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84 In order to make the program work, you must do the following :
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85 - Copy all source files from this example folder to the template folder under
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86 Project\STM32F10x_StdPeriph_Template
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87 - Open your preferred toolchain
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88 - Rebuild all files and load your image into target memory
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89 - Run the example
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90
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91 @note
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92 - Low-density Value line devices are STM32F100xx microcontrollers where the
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93 Flash memory density ranges between 16 and 32 Kbytes.
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94 - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx
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95 microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
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96 - Medium-density Value line devices are STM32F100xx microcontrollers where
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97 the Flash memory density ranges between 64 and 128 Kbytes.
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98 - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx
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99 microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
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100 - High-density Value line devices are STM32F100xx microcontrollers where
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101 the Flash memory density ranges between 256 and 512 Kbytes.
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102 - High-density devices are STM32F101xx and STM32F103xx microcontrollers where
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103 the Flash memory density ranges between 256 and 512 Kbytes.
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104 - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where
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105 the Flash memory density ranges between 512 and 1024 Kbytes.
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106 - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.
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107
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108 * <h3><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h3>
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109 */