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annotate libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/TIM/6Steps/readme.txt @ 8:58d76cf522ff
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author | Daniel O'Connor <darius@dons.net.au> |
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date | Sat, 04 Feb 2012 13:29:31 +1030 |
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1 /** |
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2 @page TIM_6Steps TIM 6 Steps example |
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3 |
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4 @verbatim |
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5 ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* |
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6 * @file TIM/6Steps/readme.txt |
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7 * @author MCD Application Team |
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8 * @version V3.5.0 |
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9 * @date 08-April-2011 |
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10 * @brief Description of the TIM 6 Steps example. |
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11 ****************************************************************************** |
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12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
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13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE |
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14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY |
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15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING |
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16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE |
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17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
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18 ****************************************************************************** |
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19 @endverbatim |
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20 |
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21 @par Example Description |
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22 |
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23 This example shows how to configure the TIM1 peripheral to generate 6 Steps. |
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24 The STM32F10x TIM1 peripheral offers the possibility to program in advance the |
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25 configuration for the next TIM1 outputs behaviour (step) and change the configuration |
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26 of all the channels at the same time. This operation is possible when the COM |
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27 (commutation) event is used. |
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28 The COM event can be generated by software by setting the COM bit in the TIM1_EGR |
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29 register or by hardware (on TRC rising edge). |
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30 In this example, a software COM event is generated each 100 ms: using the SysTick |
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31 interrupt. |
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32 The TIM1 is configured in Timing Mode, each time a COM event occurs, a new TIM1 |
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33 configuration will be set in advance. |
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34 |
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35 The break Polarity is used at High level. |
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36 |
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37 The following Table describes the TIM1 Channels states: |
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38 @verbatim |
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39 ----------------------------------------------- |
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40 | Step1 | Step2 | Step3 | Step4 | Step5 | Step6 | |
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41 ---------------------------------------------------------- |
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42 |Channel1 | 1 | 0 | 0 | 0 | 0 | 1 | |
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43 ---------------------------------------------------------- |
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44 |Channel1N | 0 | 0 | 1 | 1 | 0 | 0 | |
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45 ---------------------------------------------------------- |
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46 |Channel2 | 0 | 0 | 0 | 1 | 1 | 0 | |
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47 ---------------------------------------------------------- |
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48 |Channel2N | 1 | 1 | 0 | 0 | 0 | 0 | |
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49 ---------------------------------------------------------- |
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50 |Channel3 | 0 | 1 | 1 | 0 | 0 | 0 | |
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51 ---------------------------------------------------------- |
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52 |Channel3N | 0 | 0 | 0 | 0 | 1 | 1 | |
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53 ---------------------------------------------------------- |
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54 @endverbatim |
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55 |
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56 @par Directory contents |
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57 |
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58 - TIM/6Steps/stm32f10x_conf.h Library Configuration file |
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59 - TIM/6Steps/stm32f10x_it.c Interrupt handlers |
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60 - TIM/6Steps/stm32f10x_it.h Interrupt handlers header file |
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61 - TIM/6Steps/main.c Main program |
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62 - TIM/6Steps/system_stm32f10x.c STM32F10x system source file |
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63 |
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64 @par Hardware and Software environment |
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65 |
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66 - This example runs on STM32F10x Connectivity line, High-Density, High-Density |
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67 Value line, Medium-Density, XL-Density, Medium-Density Value line, Low-Density |
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68 and Low-Density Value line Devices. |
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69 |
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70 - This example has been tested with STMicroelectronics STM32100E-EVAL (High-Density |
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71 Value line), STM32100B-EVAL (Medium-Density Value line), STM3210C-EVAL (Connectivity line), |
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72 STM3210E-EVAL (High-Density and XL-Density) and STM3210B-EVAL (Medium-Density) |
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73 evaluation boards and can be easily tailored to any other supported device |
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74 and development board. |
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75 |
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76 |
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77 - STM3210C-EVAL Set-up |
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78 - Connect the TIM1 pins(TIM1 full remapped pins) to an oscilloscope to monitor the different waveforms: |
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79 - TIM1_CH3 pin (PE.13) |
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80 - TIM1_CH1N pin (PE.08) |
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81 - TIM1_CH2 pin (PE.11) |
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82 - TIM1_CH3N pin (PE.12) |
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83 - TIM1_CH1 pin (PE.09) |
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84 - TIM1_CH2N pin (PE.10) |
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85 - Connect the TIM1 break pin TIM1_BKIN pin (PE.15) to the GND. To generate a |
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86 break event, switch this pin level from 0V to 3.3V. |
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87 |
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88 - STM3210E-EVAL, STM3210B-EVAL, STM32100B-EVAL and STM32100E-EVAL Set-up |
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89 - Connect the TIM1 pins to an oscilloscope to monitor the different waveforms: |
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90 - TIM1_CH3 pin (PA.10) |
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91 - TIM1_CH1N pin (PB.13) |
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92 - TIM1_CH2 pin (PA.09) |
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93 - TIM1_CH3N pin (PB.15) |
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94 - TIM1_CH1 pin (PA.08) |
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95 - TIM1_CH2N pin (PB.14) |
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96 - Connect the TIM1 break pin TIM1_BKIN pin (PB.12) to the GND. To generate a |
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97 break event, switch this pin level from 0V to 3.3V. |
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98 |
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99 |
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100 @par How to use it ? |
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101 |
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102 In order to make the program work, you must do the following : |
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103 - Copy all source files from this example folder to the template folder under |
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104 Project\STM32F10x_StdPeriph_Template |
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105 - Open your preferred toolchain |
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106 - Rebuild all files and load your image into target memory |
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107 - Run the example |
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108 |
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109 @note |
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110 - Low-density Value line devices are STM32F100xx microcontrollers where the |
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111 Flash memory density ranges between 16 and 32 Kbytes. |
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112 - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx |
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113 microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. |
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114 - Medium-density Value line devices are STM32F100xx microcontrollers where |
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115 the Flash memory density ranges between 64 and 128 Kbytes. |
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116 - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx |
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117 microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes. |
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118 - High-density Value line devices are STM32F100xx microcontrollers where |
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119 the Flash memory density ranges between 256 and 512 Kbytes. |
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120 - High-density devices are STM32F101xx and STM32F103xx microcontrollers where |
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121 the Flash memory density ranges between 256 and 512 Kbytes. |
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122 - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where |
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123 the Flash memory density ranges between 512 and 1024 Kbytes. |
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124 - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. |
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Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
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125 |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
126 * <h3><center>© COPYRIGHT 2011 STMicroelectronics</center></h3> |
c59513fd84fb
Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff
changeset
|
127 */ |