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annotate hw.c @ 8:58d76cf522ff

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Split out code into separate files.
author Daniel O'Connor <darius@dons.net.au>
date Sat, 04 Feb 2012 13:29:31 +1030
parents
children 0b75cff7c570
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8
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1 #include <stdint.h>
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2 #include "stm32f10x.h"
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3 #include "lcd.h"
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4
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5 static void hw_port_cfg(void);
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6
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7
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8 void hw_init(void) {
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9 hw_port_cfg();
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10 lcd_init();
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11 lcd_setpwm(1000);
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12 }
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13
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14 static void
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15 hw_port_cfg(void) {
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16 GPIO_InitTypeDef GPIO_InitStructure;
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17 USART_InitTypeDef USART_InitStructure;
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18 SPI_InitTypeDef SPI_InitStructure;
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19 FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
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20 FSMC_NORSRAMTimingInitTypeDef p;
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21 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
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22
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23 /* RTC stuff */
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24 /* Enable PWR and BKP clocks */
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25 RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);
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26
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27 /* Allow access to BKP Domain */
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28 PWR_BackupAccessCmd(ENABLE);
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29
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30 /* Reset Backup Domain
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31 *
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32 * This resets the RTC etc back to 0 so probably only useful under user command
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33 BKP_DeInit();
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34 */
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35
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36 /* Enable Low Speed External clock */
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37 RCC_LSEConfig(RCC_LSE_ON);
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38
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39 /* Wait till LSE is ready */
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40 while (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET)
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41 ;
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42
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43 /* Select LSE as RTC Clock Source */
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44 RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
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45
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46 /* Enable RTC Clock */
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47 RCC_RTCCLKCmd(ENABLE);
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48
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49 /* Wait for RTC registers synchronization */
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50 RTC_WaitForSynchro();
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51
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52 /* Wait until last write operation on RTC registers has finished */
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53 RTC_WaitForLastTask();
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54
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55 /* Wait until last write operation on RTC registers has finished */
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56 RTC_WaitForLastTask();
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57
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58 /* Set RTC prescaler: set RTC period to 1sec */
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59 RTC_SetPrescaler(32767); /* RTC period = RTCCLK/RTC_PR = (32.768 KHz)/(32767+1) */
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60
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61 /* Wait until last write operation on RTC registers has finished */
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62 RTC_WaitForLastTask();
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63
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64 /* Clock setup */
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65 RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE);
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66
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67 /* Port configuration */
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68 /* Configure USART1 TX (PA.09) as alternate function push-pull */
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69 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
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70 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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71 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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72 GPIO_Init(GPIOA, &GPIO_InitStructure);
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73
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74 /* Configure USART1 RX (PA.10) as input floating */
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75 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
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76 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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77 GPIO_Init(GPIOA, &GPIO_InitStructure);
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78
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79 /* Enable GPIOB clock */
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80 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
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81
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82 /* Configure PB5 as output push-pull for LED */
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83 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
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84 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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85 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
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86 GPIO_Init(GPIOB, &GPIO_InitStructure);
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87
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88 /* Configure PB15 as input pull-up push-pull for push button */
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89 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15;
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90 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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91 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
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92 GPIO_Init(GPIOB, &GPIO_InitStructure);
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93
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94 /* USART configuration */
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95 /* USART1 - 115200 8n1, no flow control TX & RX enabled */
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96 USART_InitStructure.USART_BaudRate = 115200;
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97 USART_InitStructure.USART_WordLength = USART_WordLength_8b;
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98 USART_InitStructure.USART_StopBits = USART_StopBits_1;
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99 USART_InitStructure.USART_Parity = USART_Parity_No;
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100 USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
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101 USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
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102 USART_Init(USART1, &USART_InitStructure);
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103
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104 /* Enable interrupts on receive data */
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105 USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
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106
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107 /* Enable USART */
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108 USART_Cmd(USART1, ENABLE);
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109
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110 /* Enable FSMC clock */
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111 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
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112
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113 /* Enable alternate function IO clock */
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114 RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
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115
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116 /* Enable GPIOD clock */
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117 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD, ENABLE);
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118
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119 /* Enable GPIOD clock */
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120 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOE, ENABLE);
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121
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122 /* Configures LCD Control lines (FSMC Pins) in alternate function Push-Pull mode.
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123 *
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124 * PD0(D2), PD1(D3), PD4(NOE), PD5(NWE), PD7(NE1/CS), PD8(D13), PD9(D14),
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125 * PD10(D15), PD11(A16/RS) PD14(D0), PD15(D1)
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126 */
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127 GPIO_InitStructure.GPIO_Pin = (GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_7 |
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128 GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 |
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129 GPIO_Pin_14 | GPIO_Pin_15);
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130 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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131 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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132 GPIO_Init(GPIOD, &GPIO_InitStructure);
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133
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134 /* PE7(D4), PE8(D5), PE9(D6), PE10(D7), PE11(D8), PE12(D9), PE13(D10),
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135 * PE14(D11), PE15(D12)
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136 */
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137 GPIO_InitStructure.GPIO_Pin = (GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 |
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138 GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 |
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139 GPIO_Pin_15);
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140 GPIO_Init(GPIOE, &GPIO_InitStructure);
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141
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142 /* Configure backlight control (PD13/FSMC_A18 remapped to TIM4_CH2) */
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143 /* Enable TIM4 clock */
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144 RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE);
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145
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146 /* Enable timer function
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147 * Note source clock is SYSCLK / 2 = 36MHz
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148 */
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149 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13;
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150 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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151 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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152 GPIO_Init(GPIOD, &GPIO_InitStructure);
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153
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154 /* Remap TIM4_CH2 to PD13 */
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155 GPIO_PinRemapConfig(GPIO_Remap_TIM4, ENABLE);
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156
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157 /* Reset TIM4 */
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158 TIM_DeInit(TIM4);
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159
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160 /* Time Base configuration */
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161 TIM_TimeBaseStructure.TIM_Period = 999;
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162 TIM_TimeBaseStructure.TIM_Prescaler = 0;
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163 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
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164 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Down;
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165
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166 TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure);
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167
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168 /* Enable timer */
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169 TIM_OC2PreloadConfig(TIM4, TIM_OCPreload_Enable);
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170 TIM_ARRPreloadConfig(TIM4, ENABLE);
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171 TIM_Cmd(TIM4, ENABLE);
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172
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173 /* Configure reset pin (PE1) as GPIO out PP */
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174 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1;
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175 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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176 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
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177 GPIO_Init(GPIOE, &GPIO_InitStructure);
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178
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179 /* Configures the Parallel interface (FSMC) for LCD (Parallel mode) */
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180 /* Timing configuration */
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181 p.FSMC_AddressSetupTime = 5;
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182 p.FSMC_AddressHoldTime = 5;
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183 p.FSMC_DataSetupTime = 5;
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184 p.FSMC_BusTurnAroundDuration = 0;
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185 p.FSMC_CLKDivision = 0;
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186 p.FSMC_DataLatency = 0;
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187 p.FSMC_AccessMode = FSMC_AccessMode_A;
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188
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189 /* FSMC_Bank1_NORSRAM1 configured as follows:
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190 - Data/Address MUX = Disable
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191 - Memory Type = SRAM
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192 - Data Width = 16bit
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193 - Write Operation = Enable
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194 - Extended Mode = Disable
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195 - Asynchronous Wait = Disable */
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196 FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;
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197 FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
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198 FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
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199 FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
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200 FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
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201 FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
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202 FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
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203 FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
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204 FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
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205 FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
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206 FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
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207 FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
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208 FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
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209 FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
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210 FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
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211 FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
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212
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213 /* Enable FSMC_Bank1_NORSRAM1 */
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214 FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);
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215
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216 /* Configure touch screen controller
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217 *
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218 * Connected to SPI1 which is shared with the AT45DB161D.
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219 *
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220 * The touch screen is selected with PB7.
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221 * The flash chip is selected with PA4.
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222 */
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223
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224 /* Enable SPI1 clock */
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225 RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE);
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226
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227 /* Configure MOSI, MISO and SCLK as alternate function PP */
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228 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;
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229 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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230 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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231 GPIO_Init(GPIOA, &GPIO_InitStructure);
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232
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233 /* Configure flash chip select pin (PA4) as GPIO out PP */
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234 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;
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235 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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236 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
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237 GPIO_Init(GPIOA, &GPIO_InitStructure);
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238
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239 /* Configure touch chip select pin (PB7) as GPIO out PP */
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240 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;
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241 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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242 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
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243 GPIO_Init(GPIOB, &GPIO_InitStructure);
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244
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245 /* De-select touch & flash */
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246 GPIO_SetBits(GPIOA, GPIO_Pin_4);
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247 GPIO_SetBits(GPIOB, GPIO_Pin_7);
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248
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249 /* SPI1 Config */
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250 SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
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251 SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
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252 SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
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253 SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
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254 SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
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255 SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
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256 SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_64;
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257 SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
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258 SPI_InitStructure.SPI_CRCPolynomial = 7;
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259 SPI_Init(SPI1, &SPI_InitStructure);
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260
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261 /* SPI1 enable */
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262 SPI_Cmd(SPI1, ENABLE);
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263 }