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annotate STM32F10x_128k_20k_flash.ld @ 20:35cf31794a42

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Fix debug & load targets for BMP.
author Daniel O'Connor <darius@dons.net.au>
date Wed, 14 Nov 2012 12:47:10 +1030
parents c59513fd84fb
children f1c9a51e368a
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1 /*
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2 Default linker script for STM32F10x_128K_20K with GNU-ld
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3 Martin Thomas, 9/2009
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4 A heavily modified "Default linker script for STM32F10x_512K_64K"
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5 Copyright RAISONANCE S.A.S. 2008 found in the STM fw-library.
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6 (there is not much left from Raisonance's code and nearly everything
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7 has been modified or reordered)
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8 */
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9
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10 /* Program Entry, set to mark it as "used" and avoid gc */
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11 ENTRY(Reset_Handler)
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12
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13 /* Memory Spaces Definitions */
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14 MEMORY
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15 {
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16 RAM (RWX) : ORIGIN = 0x20000000+0, LENGTH = 20K-0
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17 EXTSRAM (RWX) : ORIGIN = 0x68000000, LENGTH = 0
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18 FLASH (RX) : ORIGIN = 0x08000000+0, LENGTH = 128K-2K-0
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19 EEMUL (RWX) : ORIGIN = 0x08000000+128k-2k, LENGTH = 2k
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20 FLASHB1 (RX) : ORIGIN = 0x00000000, LENGTH = 0
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21 EXTMEMB0 (RX) : ORIGIN = 0x00000000, LENGTH = 0
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22 EXTMEMB1 (RX) : ORIGIN = 0x00000000, LENGTH = 0
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23 EXTMEMB2 (RX) : ORIGIN = 0x00000000, LENGTH = 0
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24 EXTMEMB3 (RX) : ORIGIN = 0x00000000, LENGTH = 0
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25 }
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26
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27 /* higher address of the user mode stack */
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28 _estack = ORIGIN(RAM)+LENGTH(RAM);
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29
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30 /* start of the two 1kByte pages used by EEprom emulation at end of flash */
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31 _seemul = ORIGIN(EEMUL);
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32
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33 /* There will be a link error if there is not this amount of RAM free at the end. */
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34 _Minimum_Stack_Size = 0x100 ;
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35
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36 /* Check valid alignment for VTOR */
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37 ASSERT(ORIGIN(FLASH) == ALIGN(ORIGIN(FLASH), 0x80), "Start of memory region flash not aligned for startup vector table");
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38
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39 /* Sections Definitions */
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40
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41 SECTIONS
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42 {
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43
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44 /* the program code is stored in the .text section, which goes to Flash */
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45 .text :
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46 {
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47 . = ALIGN(0x80); /* PM0056, Rev.1 (4/2009), 4.3.3 */
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48 _isr_vectorsflash_offs = . - 0x08000000;
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49 KEEP(*(.isr_vectorsflash))
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50 . = ALIGN(4);
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51 CREATE_OBJECT_SYMBOLS
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52 *(.text .text.* .gnu.linkonce.t.*)
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53 *(.plt)
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54 *(.gnu.warning)
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55 *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
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56 *(.ARM.extab* .gnu.linkonce.armextab.*)
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57 *(.gcc_except_table)
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58 } >FLASH
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59
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60 .eh_frame_hdr : ALIGN (4)
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61 {
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62 KEEP (*(.eh_frame_hdr))
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63 } >FLASH
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64 .eh_frame : ALIGN (4)
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65 {
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66 KEEP (*(.eh_frame))
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67 } >FLASH
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68
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69 /* .ARM.exidx is sorted, so has to go in its own output section. */
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70 __exidx_start = .;
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71 .ARM.exidx :
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72 {
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73 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
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74 } >FLASH
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75 __exidx_end = .;
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76
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77 .rodata : ALIGN (4)
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78 {
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79 *(.rodata .rodata.* .gnu.linkonce.r.*)
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80
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81 . = ALIGN(4);
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82 KEEP(*(.init))
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83
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84 . = ALIGN(4);
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85 __preinit_array_start = .;
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86 KEEP (*(.preinit_array))
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87 __preinit_array_end = .;
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88
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89 . = ALIGN(4);
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90 __init_array_start = .;
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91 KEEP (*(SORT(.init_array.*)))
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92 KEEP (*(.init_array))
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93 __init_array_end = .;
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94
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95 . = ALIGN(4);
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96 KEEP(*(.fini))
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97
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98 . = ALIGN(4);
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99 __fini_array_start = .;
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100 KEEP (*(.fini_array))
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101 KEEP (*(SORT(.fini_array.*)))
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102 __fini_array_end = .;
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103
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104 . = ALIGN(0x4);
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105 KEEP (*crtbegin.o(.ctors))
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106 KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
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107 KEEP (*(SORT(.ctors.*)))
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108 KEEP (*crtend.o(.ctors))
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109
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110 . = ALIGN(0x4);
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111 KEEP (*crtbegin.o(.dtors))
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112 KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
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113 KEEP (*(SORT(.dtors.*)))
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114 KEEP (*crtend.o(.dtors))
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115
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116 *(.init .init.*)
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117 *(.fini .fini.*)
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118
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119 PROVIDE_HIDDEN (__preinit_array_start = .);
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120 KEEP (*(.preinit_array))
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121 PROVIDE_HIDDEN (__preinit_array_end = .);
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122 PROVIDE_HIDDEN (__init_array_start = .);
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123 KEEP (*(SORT(.init_array.*)))
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124 KEEP (*(.init_array))
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125 PROVIDE_HIDDEN (__init_array_end = .);
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126 PROVIDE_HIDDEN (__fini_array_start = .);
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127 KEEP (*(.fini_array))
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128 KEEP (*(SORT(.fini_array.*)))
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129 PROVIDE_HIDDEN (__fini_array_end = .);
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130
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131 . = ALIGN (8);
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132 *(.rom)
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133 *(.rom.b)
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134 _etext = .;
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135 /* This is used by the startup in order to initialize the .data secion */
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136 _sidata = _etext;
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137 } >FLASH
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138
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139 /* This is the initialized data section
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140 The program executes knowing that the data is in the RAM
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141 but the loader puts the initial values in the FLASH (inidata).
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142 It is one task of the startup to copy the initial values from FLASH to RAM. */
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143 .data : ALIGN (8)
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144 {
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145 /* This is used by the startup in order to initialize the .data section */
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146 _sdata = . ;
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147
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diff changeset
148 . = ALIGN(0x80);
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149 _isr_vectorsram_offs = . - 0x20000000;
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diff changeset
150 KEEP(*(.isr_vectorsram))
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parents:
diff changeset
151
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parents:
diff changeset
152 . = ALIGN(4);
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parents:
diff changeset
153 KEEP(*(.jcr))
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diff changeset
154 *(.got.plt) *(.got)
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diff changeset
155 *(.shdata)
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parents:
diff changeset
156 *(.data .data.* .gnu.linkonce.d.*)
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parents:
diff changeset
157 . = ALIGN (8);
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parents:
diff changeset
158 *(.ram)
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parents:
diff changeset
159 *(.ramfunc*)
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diff changeset
160 . = ALIGN(4);
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parents:
diff changeset
161 /* This is used by the startup in order to initialize the .data section */
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parents:
diff changeset
162 _edata = .;
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parents:
diff changeset
163 } >RAM AT>FLASH
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parents:
diff changeset
164
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parents:
diff changeset
165 /* This is the uninitialized data section */
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parents:
diff changeset
166 .bss (NOLOAD):
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parents:
diff changeset
167 {
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parents:
diff changeset
168 . = ALIGN(4);
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parents:
diff changeset
169 /* This is used by the startup in order to initialize the .bss section */
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parents:
diff changeset
170 _sbss = .;
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parents:
diff changeset
171 *(.shbss)
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diff changeset
172 *(.bss .bss.* .gnu.linkonce.b.*)
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Daniel O'Connor <darius@dons.net.au>
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diff changeset
173 *(COMMON)
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parents:
diff changeset
174 . = ALIGN (8);
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parents:
diff changeset
175 *(.ram.b)
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parents:
diff changeset
176 . = ALIGN(4);
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Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
177 /* This is used by the startup in order to initialize the .bss section */
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diff changeset
178 _ebss = . ;
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diff changeset
179 _end = .;
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diff changeset
180 __end = .;
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diff changeset
181 } >RAM AT>FLASH
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182
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183
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
184 /* This is the user stack section
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185 This is just to check that there is enough RAM left for the User mode stack
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186 It should generate an error if it's full.
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187 */
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diff changeset
188 ._usrstack (NOLOAD):
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parents:
diff changeset
189 {
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parents:
diff changeset
190 . = ALIGN(4);
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Daniel O'Connor <darius@dons.net.au>
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diff changeset
191 _susrstack = . ;
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Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
192 . = . + _Minimum_Stack_Size ;
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parents:
diff changeset
193 . = ALIGN(4);
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diff changeset
194 _eusrstack = . ;
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Daniel O'Connor <darius@dons.net.au>
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diff changeset
195 } >RAM
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diff changeset
196
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diff changeset
197
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parents:
diff changeset
198 /* this is the FLASH Bank1 */
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diff changeset
199 /* the C or assembly source must explicitly place the code or data there
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diff changeset
200 using the "section" attribute */
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diff changeset
201 .b1text :
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parents:
diff changeset
202 {
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diff changeset
203 *(.b1text) /* remaining code */
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diff changeset
204 *(.b1rodata) /* read-only data (constants) */
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diff changeset
205 *(.b1rodata*)
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parents:
diff changeset
206 } >FLASHB1
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diff changeset
207
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Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
208 /* this is the EXTMEM */
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diff changeset
209 /* the C or assembly source must explicitly place the code or data there
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diff changeset
210 using the "section" attribute */
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diff changeset
211
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parents:
diff changeset
212 /* EXTMEM Bank0 */
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diff changeset
213 .eb0text :
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diff changeset
214 {
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Daniel O'Connor <darius@dons.net.au>
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diff changeset
215 *(.eb0text) /* remaining code */
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parents:
diff changeset
216 *(.eb0rodata) /* read-only data (constants) */
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diff changeset
217 *(.eb0rodata*)
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diff changeset
218 } >EXTMEMB0
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diff changeset
219
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diff changeset
220 /* EXTMEM Bank1 */
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diff changeset
221 .eb1text :
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diff changeset
222 {
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diff changeset
223 *(.eb1text) /* remaining code */
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parents:
diff changeset
224 *(.eb1rodata) /* read-only data (constants) */
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parents:
diff changeset
225 *(.eb1rodata*)
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parents:
diff changeset
226 } >EXTMEMB1
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diff changeset
227
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diff changeset
228 /* EXTMEM Bank2 */
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diff changeset
229 .eb2text :
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diff changeset
230 {
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Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
231 *(.eb2text) /* remaining code */
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diff changeset
232 *(.eb2rodata) /* read-only data (constants) */
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diff changeset
233 *(.eb2rodata*)
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diff changeset
234 } >EXTMEMB2
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diff changeset
235
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
236 /* EXTMEM Bank0 */
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Daniel O'Connor <darius@dons.net.au>
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diff changeset
237 .eb3text :
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Daniel O'Connor <darius@dons.net.au>
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diff changeset
238 {
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Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
239 *(.eb3text) /* remaining code */
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parents:
diff changeset
240 *(.eb3rodata) /* read-only data (constants) */
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Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
241 *(.eb3rodata*)
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
242 } >EXTMEMB3
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Daniel O'Connor <darius@dons.net.au>
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diff changeset
243
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
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diff changeset
244
c59513fd84fb Initial commit of STM32 test code.
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diff changeset
245
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
246 /* after that it's only debugging information. */
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diff changeset
247
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
248 /* remove the debugging information from the standard libraries */
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Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
249 /* DISCARD :
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Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
250 {
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Daniel O'Connor <darius@dons.net.au>
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diff changeset
251 libc.a ( * )
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Daniel O'Connor <darius@dons.net.au>
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diff changeset
252 libm.a ( * )
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Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
253 libgcc.a ( * )
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
254 }
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
255 */
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parents:
diff changeset
256
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
257 /* Stabs debugging sections. */
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Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
258 .stab 0 : { *(.stab) }
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Daniel O'Connor <darius@dons.net.au>
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diff changeset
259 .stabstr 0 : { *(.stabstr) }
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parents:
diff changeset
260 .stab.excl 0 : { *(.stab.excl) }
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Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
261 .stab.exclstr 0 : { *(.stab.exclstr) }
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Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
262 .stab.index 0 : { *(.stab.index) }
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Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
263 .stab.indexstr 0 : { *(.stab.indexstr) }
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Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
264 .comment 0 : { *(.comment) }
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Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
265 /* DWARF debug sections.
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Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
266 Symbols in the DWARF debugging sections are relative to the beginning
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
267 of the section so we begin them at 0. */
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parents:
diff changeset
268 /* DWARF 1 */
c59513fd84fb Initial commit of STM32 test code.
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parents:
diff changeset
269 .debug 0 : { *(.debug) }
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Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
270 .line 0 : { *(.line) }
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parents:
diff changeset
271 /* GNU DWARF 1 extensions */
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parents:
diff changeset
272 .debug_srcinfo 0 : { *(.debug_srcinfo) }
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Daniel O'Connor <darius@dons.net.au>
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diff changeset
273 .debug_sfnames 0 : { *(.debug_sfnames) }
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Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
274 /* DWARF 1.1 and DWARF 2 */
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diff changeset
275 .debug_aranges 0 : { *(.debug_aranges) }
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parents:
diff changeset
276 .debug_pubnames 0 : { *(.debug_pubnames) }
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Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
277 /* DWARF 2 */
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diff changeset
278 .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
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parents:
diff changeset
279 .debug_abbrev 0 : { *(.debug_abbrev) }
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parents:
diff changeset
280 .debug_line 0 : { *(.debug_line) }
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
281 .debug_frame 0 : { *(.debug_frame) }
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
282 .debug_str 0 : { *(.debug_str) }
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
283 .debug_loc 0 : { *(.debug_loc) }
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
284 .debug_macinfo 0 : { *(.debug_macinfo) }
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
285 /* SGI/MIPS DWARF 2 extensions */
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
286 .debug_weaknames 0 : { *(.debug_weaknames) }
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
287 .debug_funcnames 0 : { *(.debug_funcnames) }
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
288 .debug_typenames 0 : { *(.debug_typenames) }
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
289 .debug_varnames 0 : { *(.debug_varnames) }
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
290 /* DWARF 3 */
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Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
291 .debug_pubtypes 0 : { *(.debug_pubtypes) }
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
292 .debug_ranges 0 : { *(.debug_ranges) }
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
293
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
294 .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) KEEP (*(.gnu.attributes)) }
c59513fd84fb Initial commit of STM32 test code.
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parents:
diff changeset
295 .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
c59513fd84fb Initial commit of STM32 test code.
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parents:
diff changeset
296 /DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) }
c59513fd84fb Initial commit of STM32 test code.
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parents:
diff changeset
297 }
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
298
c59513fd84fb Initial commit of STM32 test code.
Daniel O'Connor <darius@dons.net.au>
parents:
diff changeset
299 /* mthomas: from the STM example - moved here for now to keep it as reference, not
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parents:
diff changeset
300 used in the project (useful anyway?)*/
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301
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302 /* default stack size(s). These are used by the startup in order to allocate stacks for
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303 the different modes. */
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304 __Stack_Size = 1024 ;
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305
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306 PROVIDE ( _Stack_Size = __Stack_Size ) ;
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307 __Stack_Init = _estack - __Stack_Size ;
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308
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309 /*"PROVIDE" allows to easily override these values from an object file or the commmand line.*/
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310 PROVIDE ( _Stack_Init = __Stack_Init ) ;