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annotate libs/STM32F10x_StdPeriph_Lib_V3.5.0/Utilities/STM32_EVAL/STM32100B_EVAL/stm32100b_eval_cec.h @ 48:2f336d212c74

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author Daniel O'Connor <darius@dons.net.au>
date Wed, 03 Apr 2013 23:33:47 +1030
parents c59513fd84fb
children
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1 /**
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2 ******************************************************************************
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3 * @file stm32100b_eval_cec.h
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4 * @author MCD Application Team
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5 * @version V4.5.0
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6 * @date 07-March-2011
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7 * @brief This file contains all the functions prototypes for the stm32100b_eval_cec
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8 * firmware driver.
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9 ******************************************************************************
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10 * @attention
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11 *
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12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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18 *
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19 * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
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20 ******************************************************************************
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21 */
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22
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23 /* Define to prevent recursive inclusion -------------------------------------*/
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24 #ifndef __STM32100B_EVAL_CEC_H
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25 #define __STM32100B_EVAL_CEC_H
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26
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27 #ifdef __cplusplus
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28 extern "C"
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29 {
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30 #endif
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31
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32 /* Includes ------------------------------------------------------------------*/
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33 #include "stm32f10x.h"
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34
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35 /** @addtogroup Utilities
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36 * @{
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37 */
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38
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39 /** @addtogroup STM32_EVAL
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40 * @{
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41 */
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42
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43 /** @addtogroup STM32100B_EVAL
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44 * @{
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45 */
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46
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47 /** @defgroup STM32100B_EVAL_CEC
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48 * @{
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49 */
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50
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51 /** @defgroup STM32100B_EVAL_CEC_Exported_Types
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52 * @{
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53 */
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54 typedef enum
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55 {
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56 HDMI_CEC_BIT_TIMING = (1), /*!< CEC Bit Timing Error */
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57 HDMI_CEC_BIT_PERIOD = (2), /*!< CEC Bit Period Error */
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58 HDMI_CEC_RX_BLOCK_FINISHED = (3), /*!< CEC Receive Block finished Error */
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59 HDMI_CEC_START_BIT = (4), /*!< CEC Start Bit Error */
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60 HDMI_CEC_BLOCK_ACKNOWLEDGE = (5), /*!< CEC Block Acknowledge Error */
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61 HDMI_CEC_LINE = (6), /*!< CEC Line Error */
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62 HDMI_CEC_TX_BLOCK_FINISHED = (7), /*!< CEC Transmit Block Transfer finished Error */
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63 HDMI_CEC_DEVICE_UNREGISTRED = (8), /*!< CEC Device Unregistred */
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64 HDMI_CEC_TIMEOUT = (9), /*!< CEC TimeOut */
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65 HDMI_CEC_OK = (10) /*!< CEC OK */
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66 }HDMI_CEC_Error;
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67
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68 typedef struct
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69 {
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70 __IO uint8_t PhysicalAddress_A;
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71 __IO uint8_t PhysicalAddress_B;
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72 __IO uint8_t PhysicalAddress_C;
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73 __IO uint8_t PhysicalAddress_D;
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74 __IO uint8_t LogicalAddress;
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75 __IO uint8_t DeviceType;
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76 }HDMI_CEC_Map;
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77
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78
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79 #define HDMI_CEC_TX_MESSAGE_LENGTH_MAX ((uint32_t)0x0000000E)
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80 #define HDMI_CEC_TIMEOUT_VALUE ((uint32_t)0x001FFFFF)
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81
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82 /**
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83 * @brief CEC Init Structure definition
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84 */
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85 typedef struct
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86 {
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87 __IO uint8_t Header;
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88 __IO uint8_t Opcode;
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89 __IO uint8_t Operande[HDMI_CEC_TX_MESSAGE_LENGTH_MAX];
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90 __IO uint8_t TxMessageLength;
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91 __IO uint8_t RxMessageLength;
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92 }HDMI_CEC_Message;
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93
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94 /**
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95 * @}
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96 */
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97
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98 /** @defgroup STM32100B_EVAL_CEC_Exported_Constants
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99 * @{
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100 */
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101
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102 /**
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103 * @brief CEC device types
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104 */
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105 #define HDMI_CEC_TV 0x00
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106 #define HDMI_CEC_RECORDING 0x01
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107 #define HDMI_CEC_TUNER 0x03
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108 #define HDMI_CEC_PLAYBACK 0x04
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109 #define HDMI_CEC_AUDIOSYSTEM 0x05
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110
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111
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112 /**
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113 * @brief HDMI CEC I2C Interface pins
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114 */
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115 #define HDMI_CEC_I2C_SCL_PIN GPIO_Pin_10
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116 #define HDMI_CEC_I2C_SDA_PIN GPIO_Pin_11
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117 #define HDMI_CEC_I2C_GPIO_PORT GPIOB
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118 #define HDMI_CEC_I2C_GPIO_CLK RCC_APB2Periph_GPIOB
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119 #define HDMI_CEC_I2C I2C2
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120 #define HDMI_CEC_I2C_CLK RCC_APB1Periph_I2C2
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121
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122 /**
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123 * @brief HDMI CEC HPD (Hot Plug Detect) Interface pin
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124 */
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125 #define HDMI_CEC_HPD_PIN GPIO_Pin_12
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126 #define HDMI_CEC_HPD_GPIO_PORT GPIOB
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127 #define HDMI_CEC_HPD_GPIO_CLK RCC_APB2Periph_GPIOB
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128
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129 /**
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130 * @brief HDMI CEC Interface pin
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131 */
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132 #define HDMI_CEC_LINE_PIN GPIO_Pin_8
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133 #define HDMI_CEC_LINE_GPIO_PORT GPIOB
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134 #define HDMI_CEC_LINE_GPIO_CLK RCC_APB2Periph_GPIOB
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135
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136 #define HDMI_CEC_I2C_SLAVE_ADDRESS7 0xA0
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137 #define HDMI_CEC_I2C_CLOCK_SPEED 100000
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138
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139 /**
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140 * @brief HDMI CEC Root (Mainly for TV with a fixed physical address (0.0.0.0))
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141 * If you want to configure the STM32100B-EVAL board as CEC Root (Sink)
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142 * change the following define to 0x1
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143 */
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144 #define HDMI_CEC_ROOT 0x00
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145
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146 /**
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147 * @brief To select if the DDC Channel will be used for physical address discovery
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148 * or not. To use the DDC Channel to read the EDID structure uncomment
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149 * the following line.
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150 * If the device is configured as HMDI source it should read his own physical
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151 * address from the sink that is connected to.
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152 */
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153 /* #define HDMI_CEC_USE_DDC */
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154
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155 /**
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156 * @brief CEC version: V1.3a
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157 */
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158 #define HDMI_CEC_VERSION 0x04
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159
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160 /**
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161 * @brief Reason for Abort feature
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162 */
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163 #define HDMI_CEC_UNRECOGNIZED_OPCODE 0x00
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164 #define HDMI_CEC_NOT_CORRECT_MODETORESPOND 0x01
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165 #define HDMI_CEC_CANNOTPROVIDE_SOURCE 0x02
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166 #define HDMI_CEC_INVALID_OPERAND 0x03
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167 #define HDMI_CEC_REFUSED 0x04
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168
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169 /**
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170 * @brief HDMI CEC specific commands
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171 */
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172 #define HDMI_CEC_OPCODE_ACTIVE_SOURCE ((uint8_t) 0x82)
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173 #define HDMI_CEC_OPCODE_IMAGE_VIEW_ON ((uint8_t) 0x04)
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174 #define HDMI_CEC_OPCODE_TEXT_VIEW_ON ((uint8_t) 0x0D)
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175 #define HDMI_CEC_OPCODE_INACTIVE_SOURCE ((uint8_t) 0x9D)
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176 #define HDMI_CEC_OPCODE_REQUEST_ACTIVE_SOURCE ((uint8_t) 0x85)
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177 #define HDMI_CEC_OPCODE_ROUTING_CHANGE ((uint8_t) 0x80)
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178 #define HDMI_CEC_OPCODE_ROUTING_INFORMATION ((uint8_t) 0x81)
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179 #define HDMI_CEC_OPCODE_SET_STREAM_PATH ((uint8_t) 0x86)
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180 #define HDMI_CEC_OPCODE_STANDBY ((uint8_t) 0x36)
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181 #define HDMI_CEC_OPCODE_RECORD_OFF ((uint8_t) 0x0B)
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182 #define HDMI_CEC_OPCODE_RECORD_ON ((uint8_t) 0x09)
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183 #define HDMI_CEC_OPCODE_RECORD_STATUS ((uint8_t) 0x0A)
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184 #define HDMI_CEC_OPCODE_RECORD_TV_SCREEN ((uint8_t) 0x0F)
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185 #define HDMI_CEC_OPCODE_CLEAR_ANALOGUE_TIMER ((uint8_t) 0x33)
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186 #define HDMI_CEC_OPCODE_CLEAR_DIGITAL_TIMER ((uint8_t) 0x99)
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187 #define HDMI_CEC_OPCODE_CLEAR_EXTERNAL_TIMER ((uint8_t) 0xA1)
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188 #define HDMI_CEC_OPCODE_SET_ANALOGUE_TIMER ((uint8_t) 0x34)
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189 #define HDMI_CEC_OPCODE_SET_DIGITAL_TIMER ((uint8_t) 0x97)
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190 #define HDMI_CEC_OPCODE_SET_EXTERNAL_TIMER ((uint8_t) 0xA2)
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191 #define HDMI_CEC_OPCODE_SET_TIMER_PROGRAM_TITLE ((uint8_t) 0x67)
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192 #define HDMI_CEC_OPCODE_TIMER_CLEARED_STATUS ((uint8_t) 0x43)
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193 #define HDMI_CEC_OPCODE_TIMER_STATUS ((uint8_t) 0x35)
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194 #define HDMI_CEC_OPCODE_CEC_VERSION ((uint8_t) 0x9E)
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195 #define HDMI_CEC_OPCODE_GET_CEC_VERSION ((uint8_t) 0x9F)
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196 #define HDMI_CEC_OPCODE_GIVE_PHYSICAL_ADDRESS ((uint8_t) 0x83)
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197 #define HDMI_CEC_OPCODE_GET_MENU_LANGUAGE ((uint8_t) 0x91)
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198 #define HDMI_CEC_OPCODE_REPORT_PHYSICAL_ADDRESS ((uint8_t) 0x84)
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199 #define HDMI_CEC_OPCODE_SET_MENU_LANGUAGE ((uint8_t) 0x32)
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200 #define HDMI_CEC_OPCODE_DECK_CONTROL ((uint8_t) 0x42)
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201 #define HDMI_CEC_OPCODE_DECK_STATUS ((uint8_t) 0x1B)
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202 #define HDMI_CEC_OPCODE_GIVE_DECK_STATUS ((uint8_t) 0x1A)
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203 #define HDMI_CEC_OPCODE_PLAY ((uint8_t) 0x41)
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204 #define HDMI_CEC_OPCODE_GIVE_TUNER_DEVICE_STATUS ((uint8_t) 0x08)
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205 #define HDMI_CEC_OPCODE_SELECT_ANALOGUE_SERVICE ((uint8_t) 0x92)
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206 #define HDMI_CEC_OPCODE_SELECT_DIGITAL_SERVICE ((uint8_t) 0x93)
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207 #define HDMI_CEC_OPCODE_TUNER_DEVICE_STATUS ((uint8_t) 0x07)
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208 #define HDMI_CEC_OPCODE_TUNER_STEP_DECREMENT ((uint8_t) 0x06)
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209 #define HDMI_CEC_OPCODE_TUNER_STEP_INCREMENT ((uint8_t) 0x05)
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210 #define HDMI_CEC_OPCODE_DEVICE_VENDOR_ID ((uint8_t) 0x87)
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211 #define HDMI_CEC_OPCODE_GIVE_DEVICE_VENDOR_ID ((uint8_t) 0x8C)
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212 #define HDMI_CEC_OPCODE_VENDOR_COMMAND ((uint8_t) 0x89)
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213 #define HDMI_CEC_OPCODE_VENDOR_COMMAND_WITH_ID ((uint8_t) 0xA0)
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214 #define HDMI_CEC_OPCODE_VENDOR_REMOTE_BUTTON_DOWN ((uint8_t) 0x8A)
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215 #define HDMI_CEC_OPCODE_VENDOR_REMOTE_BUTTON_UP ((uint8_t) 0x8B)
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216 #define HDMI_CEC_OPCODE_SET_OSD_STRING ((uint8_t) 0x64)
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217 #define HDMI_CEC_OPCODE_GIVE_OSD_NAME ((uint8_t) 0x46)
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218 #define HDMI_CEC_OPCODE_SET_OSD_NAME ((uint8_t) 0x47)
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219 #define HDMI_CEC_OPCODE_MENU_REQUEST ((uint8_t) 0x8D)
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220 #define HDMI_CEC_OPCODE_MENU_STATUS ((uint8_t) 0x8E)
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221 #define HDMI_CEC_OPCODE_USER_CONTROL_PRESSED ((uint8_t) 0x44)
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222 #define HDMI_CEC_OPCODE_USER_CONTROL_RELEASED ((uint8_t) 0x45)
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223 #define HDMI_CEC_OPCODE_GIVE_DEVICE_POWER_STATUS ((uint8_t) 0x8F)
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224 #define HDMI_CEC_OPCODE_REPORT_POWER_STATUS ((uint8_t) 0x90)
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225 #define HDMI_CEC_OPCODE_FEATURE_ABORT ((uint8_t) 0x00)
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226 #define HDMI_CEC_OPCODE_ABORT ((uint8_t) 0xFF)
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227 #define HDMI_CEC_OPCODE_GIVE_AUDIO_STATUS ((uint8_t) 0x71)
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228 #define HDMI_CEC_OPCODE_GIVE_SYSTEM_AUDIO_MODE_STATUS ((uint8_t) 0x7D)
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229 #define HDMI_CEC_OPCODE_REPORT_AUDIO_STATUS ((uint8_t) 0x7A)
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230 #define HDMI_CEC_OPCODE_SET_SYSTEM_AUDIO_MODE ((uint8_t) 0x72)
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231 #define HDMI_CEC_OPCODE_SYSTEM_AUDIO_MODE_REQUEST ((uint8_t) 0x70)
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232 #define HDMI_CEC_OPCODE_SYSTEM_AUDIO_MODE_STATUS ((uint8_t) 0x7E)
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233 #define HDMI_CEC_OPCODE_SET_AUDIO_RATE ((uint8_t) 0x9A)
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234
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235
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236 /**
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237 * @}
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238 */
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239
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240 /** @defgroup STM32100B_EVAL_CEC_Exported_Macros
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241 * @{
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242 */
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243 /* HDMI_CEC_HPD: HDMI HPD pin low */
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244 #define HDMI_CEC_HPD_LOW() GPIO_ResetBits(HDMI_CEC_HPD_GPIO_PORT, HDMI_CEC_HPD_PIN)
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245 /* HDMI_CEC_HPD: HDMI HPD pin high */
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246 #define HDMI_CEC_HPD_HIGH() GPIO_SetBits(HDMI_CEC_HPD_GPIO_PORT, HDMI_CEC_HPD_PIN)
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247
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248 /**
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249 * @}
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250 */
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251
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252 /** @defgroup STM32100B_EVAL_CEC_Exported_Functions
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253 * @{
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254 */
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255 HDMI_CEC_Error HDMI_CEC_Init(void);
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256 HDMI_CEC_Error HDMI_CEC_TransmitMessage(HDMI_CEC_Message *HDMI_CEC_TX_MessageStructure);
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257 HDMI_CEC_Error HDMI_CEC_GetErrorStatus (void);
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258 void HDMI_CEC_ProcessIRQSrc(void);
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259 HDMI_CEC_Error HDMI_CEC_ReportPhysicalAddress(void);
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260 void HDMI_CEC_CommandCallBack(void);
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261 HDMI_CEC_Error HDMI_CEC_CheckConnectedDevices(void);
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262
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263 #ifdef __cplusplus
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264 }
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265 #endif
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266
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267 #endif /* __STM32100B_EVAL_CEC_H */
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268
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269 /**
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270 * @}
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271 */
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272
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273 /**
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274 * @}
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275 */
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276
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277 /**
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278 * @}
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279 */
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280
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281 /**
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282 * @}
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283 */
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284
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285 /**
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286 * @}
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287 */
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288
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289 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
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290