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annotate libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/TIM/ComplementarySignals/main.c @ 48:2f336d212c74
Ignore more emacs crap.
author | Daniel O'Connor <darius@dons.net.au> |
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date | Wed, 03 Apr 2013 23:33:47 +1030 |
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1 /** |
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2 ****************************************************************************** |
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3 * @file TIM/ComplementarySignals/main.c |
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4 * @author MCD Application Team |
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5 * @version V3.5.0 |
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6 * @date 08-April-2011 |
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7 * @brief Main program body |
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8 ****************************************************************************** |
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9 * @attention |
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10 * |
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11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
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12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE |
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13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY |
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14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING |
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15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE |
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16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
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17 * |
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18 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> |
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19 ****************************************************************************** |
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20 */ |
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21 |
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22 /* Includes ------------------------------------------------------------------*/ |
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23 #include "stm32f10x.h" |
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24 |
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25 /** @addtogroup STM32F10x_StdPeriph_Examples |
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26 * @{ |
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27 */ |
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28 |
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29 /** @addtogroup TIM_ComplementarySignals |
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30 * @{ |
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31 */ |
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32 |
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33 /* Private typedef -----------------------------------------------------------*/ |
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34 /* Private define ------------------------------------------------------------*/ |
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35 /* Private macro -------------------------------------------------------------*/ |
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36 /* Private variables ---------------------------------------------------------*/ |
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37 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; |
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38 TIM_OCInitTypeDef TIM_OCInitStructure; |
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39 TIM_BDTRInitTypeDef TIM_BDTRInitStructure; |
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40 uint16_t TimerPeriod = 0; |
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41 uint16_t Channel1Pulse = 0, Channel2Pulse = 0, Channel3Pulse = 0; |
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42 |
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43 /* Private function prototypes -----------------------------------------------*/ |
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44 void RCC_Configuration(void); |
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45 void GPIO_Configuration(void); |
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46 |
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47 /* Private functions ---------------------------------------------------------*/ |
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48 |
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49 /** |
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50 * @brief Main program |
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51 * @param None |
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52 * @retval None |
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53 */ |
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54 int main(void) |
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55 { |
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56 /*!< At this stage the microcontroller clock setting is already configured, |
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57 this is done through SystemInit() function which is called from startup |
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58 file (startup_stm32f10x_xx.s) before to branch to application main. |
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59 To reconfigure the default setting of SystemInit() function, refer to |
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60 system_stm32f10x.c file |
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61 */ |
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62 |
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63 /* System Clocks Configuration */ |
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64 RCC_Configuration(); |
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65 |
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66 /* GPIO Configuration */ |
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67 GPIO_Configuration(); |
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68 |
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69 /* ----------------------------------------------------------------------- |
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70 TIM1 Configuration to: |
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71 |
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72 1/ Generate 3 complementary PWM signals with 3 different duty cycles: |
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73 TIM1CLK is fixed to SystemCoreClock, the TIM1 Prescaler is equal to 0 so the |
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74 TIM1 counter clock used is SystemCoreClock. |
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75 * SystemCoreClock is set to 72 MHz for Low-density, Medium-density, High-density |
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76 and Connectivity line devices. For Low-Density Value line and Medium-Density |
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77 Value line devices, SystemCoreClock is set to 24 MHz. |
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78 |
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79 The objective is to generate PWM signal at 17.57 KHz: |
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80 - TIM1_Period = (SystemCoreClock / 17570) - 1 |
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81 |
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82 The Three Duty cycles are computed as the following description: |
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83 |
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84 The channel 1 duty cycle is set to 50% so channel 1N is set to 50%. |
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85 The channel 2 duty cycle is set to 25% so channel 2N is set to 75%. |
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86 The channel 3 duty cycle is set to 12.5% so channel 3N is set to 87.5%. |
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87 The Timer pulse is calculated as follows: |
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88 - ChannelxPulse = DutyCycle * (TIM1_Period - 1) / 100 |
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89 |
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90 2/ Insert a dead time equal to 11/SystemCoreClock ns |
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91 3/ Configure the break feature, active at High level, and using the automatic |
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92 output enable feature |
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93 4/ Use the Locking parameters level1. |
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94 ----------------------------------------------------------------------- */ |
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95 |
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96 /* Compute the value to be set in ARR register to generate signal frequency at 17.57 Khz */ |
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97 TimerPeriod = (SystemCoreClock / 17570) - 1; |
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98 /* Compute CCR1 value to generate a duty cycle at 50% for channel 1 */ |
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99 Channel1Pulse = (uint16_t) (((uint32_t) 5 * (TimerPeriod - 1)) / 10); |
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100 /* Compute CCR2 value to generate a duty cycle at 25% for channel 2 */ |
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101 Channel2Pulse = (uint16_t) (((uint32_t) 25 * (TimerPeriod - 1)) / 100); |
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102 /* Compute CCR3 value to generate a duty cycle at 12.5% for channel 3 */ |
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103 Channel3Pulse = (uint16_t) (((uint32_t) 125 * (TimerPeriod - 1)) / 1000); |
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104 |
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105 /* Time Base configuration */ |
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106 TIM_TimeBaseStructure.TIM_Prescaler = 0; |
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107 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; |
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108 TIM_TimeBaseStructure.TIM_Period = TimerPeriod; |
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109 TIM_TimeBaseStructure.TIM_ClockDivision = 0; |
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110 TIM_TimeBaseStructure.TIM_RepetitionCounter = 0; |
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111 |
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112 TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure); |
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113 |
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114 /* Channel 1, 2 and 3 Configuration in PWM mode */ |
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115 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM2; |
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116 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; |
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117 TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable; |
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118 TIM_OCInitStructure.TIM_Pulse = Channel1Pulse; |
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119 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_Low; |
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120 TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_Low; |
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121 TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set; |
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122 TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCIdleState_Reset; |
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123 |
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124 TIM_OC1Init(TIM1, &TIM_OCInitStructure); |
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125 |
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126 TIM_OCInitStructure.TIM_Pulse = Channel2Pulse; |
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127 TIM_OC2Init(TIM1, &TIM_OCInitStructure); |
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128 |
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129 TIM_OCInitStructure.TIM_Pulse = Channel3Pulse; |
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130 TIM_OC3Init(TIM1, &TIM_OCInitStructure); |
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131 |
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132 /* Automatic Output enable, Break, dead time and lock configuration*/ |
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133 TIM_BDTRInitStructure.TIM_OSSRState = TIM_OSSRState_Enable; |
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134 TIM_BDTRInitStructure.TIM_OSSIState = TIM_OSSIState_Enable; |
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135 TIM_BDTRInitStructure.TIM_LOCKLevel = TIM_LOCKLevel_1; |
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136 TIM_BDTRInitStructure.TIM_DeadTime = 11; |
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137 TIM_BDTRInitStructure.TIM_Break = TIM_Break_Enable; |
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138 TIM_BDTRInitStructure.TIM_BreakPolarity = TIM_BreakPolarity_High; |
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139 TIM_BDTRInitStructure.TIM_AutomaticOutput = TIM_AutomaticOutput_Enable; |
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140 |
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141 TIM_BDTRConfig(TIM1, &TIM_BDTRInitStructure); |
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142 |
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143 /* TIM1 counter enable */ |
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144 TIM_Cmd(TIM1, ENABLE); |
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145 |
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146 /* Main Output Enable */ |
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147 TIM_CtrlPWMOutputs(TIM1, ENABLE); |
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148 |
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149 while (1) |
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150 { |
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151 } |
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152 } |
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153 |
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154 /** |
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155 * @brief Configures the different system clocks. |
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156 * @param None |
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157 * @retval None |
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158 */ |
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159 void RCC_Configuration(void) |
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160 { |
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161 /* TIM1, GPIOA, GPIOB, GPIOE and AFIO clocks enable */ |
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162 RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1 | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOE| |
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163 RCC_APB2Periph_GPIOB |RCC_APB2Periph_AFIO, ENABLE); |
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164 } |
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165 |
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166 /** |
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167 * @brief Configure the TIM1 Pins. |
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168 * @param None |
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169 * @retval None |
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170 */ |
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171 void GPIO_Configuration(void) |
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172 { |
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173 GPIO_InitTypeDef GPIO_InitStructure; |
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174 |
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175 #ifdef STM32F10X_CL |
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176 /* GPIOE Configuration: Channel 1/1N, 2/2N, 3/3N as alternate function push-pull */ |
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177 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9|GPIO_Pin_11|GPIO_Pin_13| |
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178 GPIO_Pin_8|GPIO_Pin_10|GPIO_Pin_12; |
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179 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; |
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180 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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181 |
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182 GPIO_Init(GPIOE, &GPIO_InitStructure); |
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183 |
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184 /* GPIOE Configuration: BKIN pin */ |
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185 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15; |
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186 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; |
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187 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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188 |
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189 GPIO_Init(GPIOE, &GPIO_InitStructure); |
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190 |
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191 /* TIM1 Full remapping pins */ |
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192 GPIO_PinRemapConfig(GPIO_FullRemap_TIM1, ENABLE); |
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193 |
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194 #else |
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195 /* GPIOA Configuration: Channel 1, 2 and 3 as alternate function push-pull */ |
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196 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10; |
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197 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; |
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198 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
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199 GPIO_Init(GPIOA, &GPIO_InitStructure); |
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200 |
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201 /* GPIOB Configuration: Channel 1N, 2N and 3N as alternate function push-pull */ |
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202 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15; |
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203 GPIO_Init(GPIOB, &GPIO_InitStructure); |
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204 |
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205 /* GPIOB Configuration: BKIN pin */ |
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206 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12; |
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207 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; |
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208 GPIO_Init(GPIOB, &GPIO_InitStructure); |
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209 #endif |
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210 } |
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211 |
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212 #ifdef USE_FULL_ASSERT |
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213 |
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214 /** |
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215 * @brief Reports the name of the source file and the source line number |
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216 * where the assert_param error has occurred. |
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217 * @param file: pointer to the source file name |
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218 * @param line: assert_param error line source number |
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219 * @retval None |
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220 */ |
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221 void assert_failed(uint8_t* file, uint32_t line) |
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222 { |
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223 /* User can add his own implementation to report the file name and line number, |
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224 ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ |
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225 |
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226 while (1) |
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227 {} |
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228 } |
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229 |
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230 #endif |
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231 |
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232 /** |
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233 * @} |
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234 */ |
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235 |
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236 /** |
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237 * @} |
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238 */ |
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239 |
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240 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |