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annotate libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/SPI/Simplex_Interrupt/readme.txt @ 48:2f336d212c74

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author Daniel O'Connor <darius@dons.net.au>
date Wed, 03 Apr 2013 23:33:47 +1030
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1 /**
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2 @page SPI_Simplex_Interrupt SPI Simplex Interrupt example
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3
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4 @verbatim
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5 ******************** (C) COPYRIGHT 2011 STMicroelectronics *******************
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6 * @file SPI/Simplex_Interrupt/readme.txt
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7 * @author MCD Application Team
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8 * @version V3.5.0
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9 * @date 08-April-2011
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10 * @brief Description of the SPI Simplex Interrupt example.
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11 ******************************************************************************
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12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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18 ******************************************************************************
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19 @endverbatim
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20
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21 @par Example Description
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22
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23 This example provides a description of how to set a communication between two
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24 SPIs in simplex mode and performs a data buffer transfer from SPI_MASTER to
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25 SPI_SLAVE using TxE interrupt for master and RxNE interrupt for slave.
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26 SPI_MASTER and SPI_SLAVE can be SPI1 and SPI2 or SPI3 and SPI2, depending on the
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27 STMicroelectronics EVAL board you are using.
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28
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29 Both SPIs are configured with 8bit data frame and a 9Mbit/s communication speed
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30 (for Value line devices the communication speed is set to 3Mbit/s).
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31 The TxE interrupt is enabled for the master and the RxNE interrupt is enabled for
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32 the slave.
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33
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34 Once both SPIs are enabled, first TxE interrupt is generated for the master
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35 and in its interrupt service routine the first data is sent from SPI_MASTER_Buffer_Tx.
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36 Once this data is received by the slave the RxNE interrupt is generated and in
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37 the routine this data is stored in the SPI_SLAVE_Buffer_Rx.
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38
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39 The same procedure is followed for the remaining SPI_MASTER_Buffer_Tx data.
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40 Once all data buffer are received by the slave the TxE interrupt is disabled.
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41 A comparison is done and TransferStatus variable gives the data transfer status
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42 where it is PASSED if transmitted and received data are the same otherwise it is FAILED.
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43
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44
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45 @par Directory contents
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46
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47 - SPI/Simplex_Interrupt/platform_config.h Evaluation board specific configuration file
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48 - SPI/Simplex_Interrupt/stm32f10x_conf.h Library Configuration file
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49 - SPI/Simplex_Interrupt/stm32f10x_it.c Interrupt handlers
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50 - SPI/Simplex_Interrupt/stm32f10x_it.h Header for stm32f10x_it.c
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51 - SPI/Simplex_Interrupt/main.c Main program
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52 - SPI/Simplex_Interrupt/system_stm32f10x.c STM32F10x system source file
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53
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54 @par Hardware and Software environment
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55
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56 - This example runs on STM32F10x Connectivity line, High-Density, High-Density
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57 Value line, Medium-Density, XL-Density, Medium-Density Value line, Low-Density
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58 and Low-Density Value line Devices.
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59
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60 - This example has been tested with STMicroelectronics STM32100E-EVAL (High-Density
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61 Value line), STM32100B-EVAL (Medium-Density Value line), STM3210C-EVAL (Connectivity line),
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62 STM3210E-EVAL (High-Density and XL-Density) and STM3210B-EVAL (Medium-Density)
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63 evaluation boards and can be easily tailored to any other supported device
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64 and development board.
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65 To select the STMicroelectronics evaluation board used to run the example,
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66 uncomment the corresponding line in SPI/Simplex_Interrupt/platform_config.h file.
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67
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68 - STM32100E-EVAL Set-up
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69 - Connect SPI1 SCK pin (PA.05) to SPI2 SCK pin (PB.13)
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70 - Connect SPI1 MOSI pin (PA.07) to SPI2 MISO pin (PB.14)
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71
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72 - STM32100B-EVAL Set-up
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73 - Connect SPI1 SCK pin (PA.05) to SPI2 SCK pin (PB.13)
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74 - Connect SPI1 MOSI pin (PA.07) to SPI2 MISO pin (PB.14)
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75
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76 - STM3210C-EVAL Set-up
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77 - Connect SPI3 SCK pin (PC.10) to SPI2 SCK pin (PB.13)
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78 - Connect SPI3 MOSI pin (PC.12) to SPI2 MISO pin (PB.14)
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79 @note In this case SPI3 pins are remapped by software.
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80
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81 - STM3210E-EVAL Set-up
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82 - Connect SPI1 SCK pin (PA.05) to SPI2 SCK pin (PB.13)
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83 - Connect SPI1 MOSI pin (PA.07) to SPI2 MISO pin (PB.14)
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84 @note The jumper 14 (USB Disconnect) must be set in position 1<->2 in order
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85 to not interfer with SPI2 MISO pin PB14.
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86
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87 - STM3210B-EVAL Set-up
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88 - Connect SPI1 SCK pin (PA.05) to SPI2 SCK pin (PB.13)
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89 - Connect SPI1 MOSI pin (PA.07) to SPI2 MISO pin (PB.14)
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90
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91 @par How to use it ?
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92
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93 In order to make the program work, you must do the following :
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94 - Copy all source files from this example folder to the template folder under
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95 Project\STM32F10x_StdPeriph_Template
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96 - Open your preferred toolchain
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97 - Rebuild all files and load your image into target memory
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98 - Run the example
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99
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100 @note
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101 - Low-density Value line devices are STM32F100xx microcontrollers where the
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102 Flash memory density ranges between 16 and 32 Kbytes.
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103 - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx
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104 microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
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105 - Medium-density Value line devices are STM32F100xx microcontrollers where
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106 the Flash memory density ranges between 64 and 128 Kbytes.
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107 - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx
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108 microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
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109 - High-density Value line devices are STM32F100xx microcontrollers where
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110 the Flash memory density ranges between 256 and 512 Kbytes.
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111 - High-density devices are STM32F101xx and STM32F103xx microcontrollers where
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112 the Flash memory density ranges between 256 and 512 Kbytes.
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113 - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where
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114 the Flash memory density ranges between 512 and 1024 Kbytes.
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115 - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.
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116
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117 * <h3><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h3>
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118 */