Mercurial > ~darius > hgwebdir.cgi > stm32temp
annotate spiflash.h @ 80:1a4573062b37
Reshuffle in preparation for being able to have a common API for SPI flash and (emulated) EEPROM.
author | Daniel O'Connor <darius@dons.net.au> |
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date | Sun, 07 Jul 2013 22:49:02 +0930 |
parents | flash.h@aaf0603d7f88 |
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rev | line source |
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80
1a4573062b37
Reshuffle in preparation for being able to have a common API for SPI flash and (emulated) EEPROM.
Daniel O'Connor <darius@dons.net.au>
parents:
70
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1 void spiflashcmd(int argc, char **argv); |
1a4573062b37
Reshuffle in preparation for being able to have a common API for SPI flash and (emulated) EEPROM.
Daniel O'Connor <darius@dons.net.au>
parents:
70
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2 uint16_t spiflashreadid(void); |
1a4573062b37
Reshuffle in preparation for being able to have a common API for SPI flash and (emulated) EEPROM.
Daniel O'Connor <darius@dons.net.au>
parents:
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3 uint8_t spiflashreadstatus(void); |
1a4573062b37
Reshuffle in preparation for being able to have a common API for SPI flash and (emulated) EEPROM.
Daniel O'Connor <darius@dons.net.au>
parents:
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4 void spiflashwritestatus(uint8_t status); |
1a4573062b37
Reshuffle in preparation for being able to have a common API for SPI flash and (emulated) EEPROM.
Daniel O'Connor <darius@dons.net.au>
parents:
70
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5 void spiflashwritectl(int enable); |
1a4573062b37
Reshuffle in preparation for being able to have a common API for SPI flash and (emulated) EEPROM.
Daniel O'Connor <darius@dons.net.au>
parents:
70
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6 void spiflash4kerase(uint32_t addr); |
1a4573062b37
Reshuffle in preparation for being able to have a common API for SPI flash and (emulated) EEPROM.
Daniel O'Connor <darius@dons.net.au>
parents:
70
diff
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7 uint8_t spiflashread(uint32_t addr); |
1a4573062b37
Reshuffle in preparation for being able to have a common API for SPI flash and (emulated) EEPROM.
Daniel O'Connor <darius@dons.net.au>
parents:
70
diff
changeset
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8 void spiflashenablewrite(void); |
1a4573062b37
Reshuffle in preparation for being able to have a common API for SPI flash and (emulated) EEPROM.
Daniel O'Connor <darius@dons.net.au>
parents:
70
diff
changeset
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9 void spiflashwrite(uint32_t addr, uint8_t data); |
1a4573062b37
Reshuffle in preparation for being able to have a common API for SPI flash and (emulated) EEPROM.
Daniel O'Connor <darius@dons.net.au>
parents:
70
diff
changeset
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10 void spiflashwait(void); |
1a4573062b37
Reshuffle in preparation for being able to have a common API for SPI flash and (emulated) EEPROM.
Daniel O'Connor <darius@dons.net.au>
parents:
70
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11 int spiflashreadblock(uint32_t addr, uint32_t len, void *_data); |
1a4573062b37
Reshuffle in preparation for being able to have a common API for SPI flash and (emulated) EEPROM.
Daniel O'Connor <darius@dons.net.au>
parents:
70
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12 int spiflashwriteblock(uint32_t addr, uint32_t len, void *_data); |
1a4573062b37
Reshuffle in preparation for being able to have a common API for SPI flash and (emulated) EEPROM.
Daniel O'Connor <darius@dons.net.au>
parents:
70
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13 uint32_t spiflashcrcblock(uint32_t addr, uint32_t len); |
1a4573062b37
Reshuffle in preparation for being able to have a common API for SPI flash and (emulated) EEPROM.
Daniel O'Connor <darius@dons.net.au>
parents:
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14 void spiflashprintstatus(uint8_t status, FILE *out); |
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15 |
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16 /* Streaming read/write */ |
80
1a4573062b37
Reshuffle in preparation for being able to have a common API for SPI flash and (emulated) EEPROM.
Daniel O'Connor <darius@dons.net.au>
parents:
70
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17 void spiflashstartread(uint32_t addr); |
1a4573062b37
Reshuffle in preparation for being able to have a common API for SPI flash and (emulated) EEPROM.
Daniel O'Connor <darius@dons.net.au>
parents:
70
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18 uint8_t spiflashreadbyte(void); |
1a4573062b37
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Daniel O'Connor <darius@dons.net.au>
parents:
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19 void spiflashstartwrite(uint32_t addr, uint16_t data); |
1a4573062b37
Reshuffle in preparation for being able to have a common API for SPI flash and (emulated) EEPROM.
Daniel O'Connor <darius@dons.net.au>
parents:
70
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20 void spiflashwriteword(uint16_t data); |
1a4573062b37
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Daniel O'Connor <darius@dons.net.au>
parents:
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21 void spiflashstopread(void); |
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22 void spiflashstopwrite(void); |
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24 #define FL_BUSY (1<<0) |
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25 #define FL_WEL (1<<1) |
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26 #define FL_BP0 (1<<2) |
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27 #define FL_BP1 (1<<3) |
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28 #define FL_BP2 (1<<4) |
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29 #define FL_BP3 (1<<5) |
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30 #define FL_AAI (1<<6) |
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31 #define FL_BPL (1<<7) |
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32 |
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33 #define FL_READ 0x03 |
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34 #define FL_HSREAD 0x0b |
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35 #define FL_4KERASE 0x20 |
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36 #define FL_32KERASE 0x52 |
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37 #define FL_64KERASE 0xd8 |
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38 #define FL_CHIPERASE 0x60 |
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39 #define FL_BYTEPROG 0x02 |
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40 #define FL_AAIWP 0xad |
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41 #define FL_RDSR 0x05 |
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42 #define FL_EWSR 0x50 |
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43 #define FL_WRSR 0x01 |
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44 #define FL_WREN 0x06 |
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45 #define FL_WRDI 0x04 |
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46 #define FL_RDID 0x90 |
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47 #define FL_JEDECID 0x9f |
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48 #define FL_EBSY 0x70 |
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49 #define FL_DBSY 0x80 |
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50 |