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annotate libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/RCC/RCC_ClockConfig/stm32f10x_it.c @ 85:18b154c447bb

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Add note about 1-wire wiring
author Daniel O'Connor <darius@dons.net.au>
date Thu, 12 Mar 2015 23:22:11 +1030
parents c59513fd84fb
children
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1 /**
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2 ******************************************************************************
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3 * @file RCC/RCC_ClockConfig/stm32f10x_it.c
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4 * @author MCD Application Team
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5 * @version V3.5.0
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6 * @date 08-April-2011
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7 * @brief Main Interrupt Service Routines.
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8 * This file provides template for all exceptions handler and peripherals
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9 * interrupt service routine.
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10 ******************************************************************************
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11 * @attention
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12 *
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13 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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14 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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15 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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16 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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17 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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18 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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19 *
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20 * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
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21 ******************************************************************************
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22 */
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23
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24 /* Includes ------------------------------------------------------------------*/
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25 #include "stm32f10x_it.h"
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26 #include "main.h"
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27
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28 /** @addtogroup STM32F10x_StdPeriph_Examples
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29 * @{
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30 */
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31
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32 /** @addtogroup RCC_ClockConfig
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33 * @{
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34 */
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35
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36 /* Private typedef -----------------------------------------------------------*/
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37 /* Private define ------------------------------------------------------------*/
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38 /* Private macro -------------------------------------------------------------*/
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39 /* Private variables ---------------------------------------------------------*/
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40 /* Private function prototypes -----------------------------------------------*/
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41 /* Private functions ---------------------------------------------------------*/
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42
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43 /******************************************************************************/
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44 /* Cortex-M3 Processor Exceptions Handlers */
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45 /******************************************************************************/
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46
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47 /**
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48 * @brief This function handles NMI exception.
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49 * @param None
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50 * @retval None
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51 */
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52 void NMI_Handler(void)
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53 {
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54 /* This interrupt is generated when HSE clock fails */
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55
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56 if (RCC_GetITStatus(RCC_IT_CSS) != RESET)
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57 {/* At this stage: HSE, PLL are disabled (but no change on PLL config) and HSI
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58 is selected as system clock source */
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59
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60 /* Enable HSE */
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61 RCC_HSEConfig(RCC_HSE_ON);
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62
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63 /* Enable HSE Ready interrupt */
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64 RCC_ITConfig(RCC_IT_HSERDY, ENABLE);
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65
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66 #ifndef SYSCLK_HSE
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67 #ifdef STM32F10X_CL
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68 /* Enable PLL and PLL2 Ready interrupts */
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69 RCC_ITConfig(RCC_IT_PLLRDY | RCC_IT_PLL2RDY, ENABLE);
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70 #else
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71 /* Enable PLL Ready interrupt */
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72 RCC_ITConfig(RCC_IT_PLLRDY, ENABLE);
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73 #endif /* STM32F10X_CL */
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74 #endif /* SYSCLK_HSE */
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75
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76 /* Clear Clock Security System interrupt pending bit */
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77 RCC_ClearITPendingBit(RCC_IT_CSS);
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78
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79 /* Once HSE clock recover, the HSERDY interrupt is generated and in the RCC ISR
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80 routine the system clock will be reconfigured to its previous state (before
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81 HSE clock failure) */
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82 }
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83 }
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84
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85 /**
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86 * @brief This function handles Hard Fault exception.
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87 * @param None
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88 * @retval None
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89 */
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90 void HardFault_Handler(void)
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91 {
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92 /* Go to infinite loop when Hard Fault exception occurs */
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93 while (1)
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94 {
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95 }
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96 }
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97
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98 /**
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99 * @brief This function handles Memory Manage exception.
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100 * @param None
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101 * @retval None
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102 */
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103 void MemManage_Handler(void)
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104 {
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105 /* Go to infinite loop when Memory Manage exception occurs */
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106 while (1)
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107 {
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108 }
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109 }
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110
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111 /**
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112 * @brief This function handles Bus Fault exception.
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113 * @param None
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114 * @retval None
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115 */
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116 void BusFault_Handler(void)
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117 {
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118 /* Go to infinite loop when Bus Fault exception occurs */
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119 while (1)
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120 {
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121 }
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122 }
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123
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124 /**
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125 * @brief This function handles Usage Fault exception.
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126 * @param None
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127 * @retval None
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128 */
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129 void UsageFault_Handler(void)
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130 {
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131 /* Go to infinite loop when Usage Fault exception occurs */
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132 while (1)
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133 {
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134 }
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135 }
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136
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137 /**
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138 * @brief This function handles SVCall exception.
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139 * @param None
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140 * @retval None
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141 */
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142 void SVC_Handler(void)
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143 {
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144 }
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145
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146 /**
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147 * @brief This function handles Debug Monitor exception.
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148 * @param None
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149 * @retval None
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150 */
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151 void DebugMon_Handler(void)
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152 {
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153 }
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154
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155 /**
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156 * @brief This function handles PendSV_Handler exception.
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157 * @param None
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158 * @retval None
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159 */
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160 void PendSV_Handler(void)
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161 {
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162 }
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163
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164 /**
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165 * @brief This function handles SysTick Handler.
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166 * @param None
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167 * @retval None
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168 */
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169 void SysTick_Handler(void)
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170 {
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171 }
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172
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173 /******************************************************************************/
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174 /* STM32F10x Peripherals Interrupt Handlers */
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175 /******************************************************************************/
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176
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177 /**
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178 * @brief This function handles RCC interrupt request.
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179 * @param None
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180 * @retval None
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181 */
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182 void RCC_IRQHandler(void)
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183 {
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184 if(RCC_GetITStatus(RCC_IT_HSERDY) != RESET)
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185 {
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186 /* Clear HSERDY interrupt pending bit */
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187 RCC_ClearITPendingBit(RCC_IT_HSERDY);
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188
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189 /* Check if the HSE clock is still available */
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190 if (RCC_GetFlagStatus(RCC_FLAG_HSERDY) != RESET)
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191 {
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192 #ifdef SYSCLK_HSE
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193 /* Select HSE as system clock source */
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194 RCC_SYSCLKConfig(RCC_SYSCLKSource_HSE);
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195 #else
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196 #ifdef STM32F10X_CL
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197 /* Enable PLL2 */
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198 RCC_PLL2Cmd(ENABLE);
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199 #else
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200 /* Enable PLL: once the PLL is ready the PLLRDY interrupt is generated */
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201 RCC_PLLCmd(ENABLE);
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202 #endif /* STM32F10X_CL */
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203 #endif /* SYSCLK_HSE */
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204 }
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205 }
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206
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207 #ifdef STM32F10X_CL
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208 if(RCC_GetITStatus(RCC_IT_PLL2RDY) != RESET)
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209 {
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210 /* Clear PLL2RDY interrupt pending bit */
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211 RCC_ClearITPendingBit(RCC_IT_PLL2RDY);
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212
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213 /* Enable PLL: once the PLL is ready the PLLRDY interrupt is generated */
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214 RCC_PLLCmd(ENABLE);
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215 }
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216 #endif /* STM32F10X_CL */
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217
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218 if(RCC_GetITStatus(RCC_IT_PLLRDY) != RESET)
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219 {
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220 /* Clear PLLRDY interrupt pending bit */
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221 RCC_ClearITPendingBit(RCC_IT_PLLRDY);
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222
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223 /* Check if the PLL is still locked */
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224 if (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) != RESET)
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225 {
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226 /* Select PLL as system clock source */
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227 RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
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228 }
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229 }
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230 }
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231
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232 /******************************************************************************/
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233 /* STM32F10x Peripherals Interrupt Handlers */
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234 /* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
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235 /* available peripheral interrupt handler's name please refer to the startup */
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236 /* file (startup_stm32f10x_xx.s). */
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237 /******************************************************************************/
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238
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239 /**
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240 * @brief This function handles PPP interrupt request.
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241 * @param None
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242 * @retval None
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243 */
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244 /*void PPP_IRQHandler(void)
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245 {
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246 }*/
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247
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248 /**
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249 * @}
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250 */
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251
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252 /**
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253 * @}
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254 */
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255
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256 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/