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annotate libs/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/RIDE/stm32f10x_flash_offset.ld @ 85:18b154c447bb

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Add note about 1-wire wiring
author Daniel O'Connor <darius@dons.net.au>
date Thu, 12 Mar 2015 23:22:11 +1030
parents c59513fd84fb
children
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1 /*
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2 Default linker script for STM32F10x_1024K_96K
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3 Copyright RAISONANCE S.A.S. 2008
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4 */
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5
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6 /* include the common STM32F10x sub-script */
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7
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8 /* Common part of the linker scripts for STM32 devices*/
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9
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10
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11 /* default stack sizes.
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12
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13 These are used by the startup in order to allocate stacks for the different modes.
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14 */
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15
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16 __Stack_Size = 1024 ;
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17
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18 PROVIDE ( _Stack_Size = __Stack_Size ) ;
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19
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20 __Stack_Init = _estack - __Stack_Size ;
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21
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22 /*"PROVIDE" allows to easily override these values from an object file or the commmand line.*/
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23 PROVIDE ( _Stack_Init = __Stack_Init ) ;
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24
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25 /*
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26 There will be a link error if there is not this amount of RAM free at the end.
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27 */
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28 _Minimum_Stack_Size = 0x100 ;
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29
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30
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31 /* include the memory spaces definitions sub-script */
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32 /*
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33 Linker subscript for STM32F10x definitions with 1024K Flash and 96K RAM */
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34
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35 /* Memory Spaces Definitions */
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36
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37 MEMORY
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38 {
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39 RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K
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40 FLASH (rx) : ORIGIN = 0x8003000, LENGTH = 1024K-0x3000
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41 FLASHB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0
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42 EXTMEMB0 (rx) : ORIGIN = 0x00000000, LENGTH = 0
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43 EXTMEMB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0
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44 EXTMEMB2 (rx) : ORIGIN = 0x00000000, LENGTH = 0
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45 EXTMEMB3 (rx) : ORIGIN = 0x00000000, LENGTH = 0
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46 }
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47
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48 /* higher address of the user mode stack */
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49 _estack = 0x20018000;
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50
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51
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52
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53 /* include the sections management sub-script for FLASH mode */
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54 /*
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55 Common part of the linker scripts for STR71x devices in FLASH mode
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56 (that is, the FLASH is seen at 0)
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57 Copyright RAISONANCE 2005
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58 You can use, modify and distribute thisfile freely, but without any waranty.
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59 */
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60
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61
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62
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63 /* Sections Definitions */
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64
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65 SECTIONS
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66 {
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67 /* for Cortex devices, the beginning of the startup code is stored in the .isr_vector section, which goes to FLASH */
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68 .isr_vector :
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69 {
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70 . = ALIGN(4);
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71 KEEP(*(.isr_vector)) /* Startup code */
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72 . = ALIGN(4);
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73 } >FLASH
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74
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75 /* for some STRx devices, the beginning of the startup code is stored in the .flashtext section, which goes to FLASH */
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76 .flashtext :
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77 {
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78 . = ALIGN(4);
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79 *(.flashtext) /* Startup code */
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80 . = ALIGN(4);
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81 } >FLASH
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82
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83
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84 /* the program code is stored in the .text section, which goes to Flash */
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85 .text :
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86 {
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87 . = ALIGN(4);
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88
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89 *(.text) /* remaining code */
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90 *(.text.*) /* remaining code */
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91 *(.rodata) /* read-only data (constants) */
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92 *(.rodata*)
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93 *(.glue_7)
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94 *(.glue_7t)
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95
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96 . = ALIGN(4);
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97 _etext = .;
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98 /* This is used by the startup in order to initialize the .data secion */
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99 _sidata = _etext;
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100 } >FLASH
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101
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102
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103
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104 /* This is the initialized data section
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105 The program executes knowing that the data is in the RAM
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106 but the loader puts the initial values in the FLASH (inidata).
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107 It is one task of the startup to copy the initial values from FLASH to RAM. */
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108 .data : AT ( _sidata )
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109 {
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110 . = ALIGN(4);
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111 /* This is used by the startup in order to initialize the .data secion */
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112 _sdata = . ;
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113
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114 *(.data)
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115 *(.data.*)
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116
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117 . = ALIGN(4);
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118 /* This is used by the startup in order to initialize the .data secion */
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119 _edata = . ;
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120 } >RAM
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121
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122
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123
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124 /* This is the uninitialized data section */
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125 .bss :
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126 {
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127 . = ALIGN(4);
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128 /* This is used by the startup in order to initialize the .bss secion */
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129 _sbss = .;
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130
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131 *(.bss)
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132 *(COMMON)
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133
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134 . = ALIGN(4);
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135 /* This is used by the startup in order to initialize the .bss secion */
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136 _ebss = . ;
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137 } >RAM
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138
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139 PROVIDE ( end = _ebss );
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140 PROVIDE ( _end = _ebss );
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141
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142 /* This is the user stack section
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143 This is just to check that there is enough RAM left for the User mode stack
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144 It should generate an error if it's full.
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145 */
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146 ._usrstack :
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147 {
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148 . = ALIGN(4);
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149 _susrstack = . ;
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150
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151 . = . + _Minimum_Stack_Size ;
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152
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153 . = ALIGN(4);
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154 _eusrstack = . ;
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155 } >RAM
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156
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157
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158
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159 /* this is the FLASH Bank1 */
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160 /* the C or assembly source must explicitly place the code or data there
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161 using the "section" attribute */
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162 .b1text :
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163 {
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164 *(.b1text) /* remaining code */
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165 *(.b1rodata) /* read-only data (constants) */
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166 *(.b1rodata*)
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167 } >FLASHB1
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168
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169 /* this is the EXTMEM */
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170 /* the C or assembly source must explicitly place the code or data there
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171 using the "section" attribute */
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172
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173 /* EXTMEM Bank0 */
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174 .eb0text :
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175 {
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176 *(.eb0text) /* remaining code */
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177 *(.eb0rodata) /* read-only data (constants) */
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178 *(.eb0rodata*)
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179 } >EXTMEMB0
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180
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181 /* EXTMEM Bank1 */
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182 .eb1text :
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183 {
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184 *(.eb1text) /* remaining code */
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185 *(.eb1rodata) /* read-only data (constants) */
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186 *(.eb1rodata*)
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187 } >EXTMEMB1
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188
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189 /* EXTMEM Bank2 */
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190 .eb2text :
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191 {
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192 *(.eb2text) /* remaining code */
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193 *(.eb2rodata) /* read-only data (constants) */
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194 *(.eb2rodata*)
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195 } >EXTMEMB2
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196
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197 /* EXTMEM Bank0 */
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198 .eb3text :
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199 {
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200 *(.eb3text) /* remaining code */
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201 *(.eb3rodata) /* read-only data (constants) */
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202 *(.eb3rodata*)
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203 } >EXTMEMB3
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204
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205
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206
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207 /* after that it's only debugging information. */
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208
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209 /* remove the debugging information from the standard libraries */
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210 DISCARD :
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211 {
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212 libc.a ( * )
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213 libm.a ( * )
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214 libgcc.a ( * )
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215 }
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216
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217 /* Stabs debugging sections. */
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218 .stab 0 : { *(.stab) }
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219 .stabstr 0 : { *(.stabstr) }
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220 .stab.excl 0 : { *(.stab.excl) }
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221 .stab.exclstr 0 : { *(.stab.exclstr) }
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222 .stab.index 0 : { *(.stab.index) }
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223 .stab.indexstr 0 : { *(.stab.indexstr) }
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224 .comment 0 : { *(.comment) }
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225 /* DWARF debug sections.
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226 Symbols in the DWARF debugging sections are relative to the beginning
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227 of the section so we begin them at 0. */
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228 /* DWARF 1 */
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229 .debug 0 : { *(.debug) }
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230 .line 0 : { *(.line) }
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231 /* GNU DWARF 1 extensions */
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232 .debug_srcinfo 0 : { *(.debug_srcinfo) }
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233 .debug_sfnames 0 : { *(.debug_sfnames) }
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234 /* DWARF 1.1 and DWARF 2 */
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235 .debug_aranges 0 : { *(.debug_aranges) }
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236 .debug_pubnames 0 : { *(.debug_pubnames) }
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237 /* DWARF 2 */
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238 .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
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239 .debug_abbrev 0 : { *(.debug_abbrev) }
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240 .debug_line 0 : { *(.debug_line) }
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241 .debug_frame 0 : { *(.debug_frame) }
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242 .debug_str 0 : { *(.debug_str) }
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243 .debug_loc 0 : { *(.debug_loc) }
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244 .debug_macinfo 0 : { *(.debug_macinfo) }
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245 /* SGI/MIPS DWARF 2 extensions */
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246 .debug_weaknames 0 : { *(.debug_weaknames) }
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247 .debug_funcnames 0 : { *(.debug_funcnames) }
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248 .debug_typenames 0 : { *(.debug_typenames) }
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249 .debug_varnames 0 : { *(.debug_varnames) }
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250 }