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comparison 1wire-config.h @ 0:93d4ddff7dd0

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Jumbo commit since I appear to have forgotten to do this before..
author Daniel O'Connor <darius@dons.net.au>
date Wed, 04 Jan 2012 23:19:12 +1030
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children be930b34fcd3
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-1:000000000000 0:93d4ddff7dd0
1 /*
2 * 1 wire header
3 *
4 * This is the user servicable stuff - how to do delays and how to
5 * frob the IO pins.
6 *
7 * Copyright (c) 2004-2009
8 * Daniel O'Connor <darius@dons.net.au>. All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 */
31
32 /*
33 * Alter these for your configuration
34 */
35
36 #define OWBUSINIT()
37
38 /* Set the IO to input */
39 #define OWSETREAD() \
40 do { \
41 __asm__ volatile ("" ::: "memory"); \
42 DDRB &= ~_BV(0); \
43 PORTB &= ~_BV(0); \
44 __asm__ volatile ("" ::: "memory"); \
45 } while (0)
46
47 /* Read the 1-wire bus, non-inverting logic */
48 #define OWREADBUS() (PINB & _BV(0) ? 1 : 0)
49
50 /* Set the 1-wire bus to 0
51 * Drive output low
52 */
53 #define OWSETBUSLOW() \
54 do { \
55 __asm__ volatile ("" ::: "memory"); \
56 DDRB |= _BV(0); \
57 PORTB &= ~_BV(0); \
58 __asm__ volatile ("" ::: "memory"); \
59 } while (0)
60
61 /* Set the 1-wire bus to 1
62 * Allow to float, use pullup
63 */
64 #define OWSETBUSHIGH() \
65 do { \
66 __asm__ volatile ("" ::: "memory"); \
67 DDRB &= ~_BV(0); \
68 __asm__ volatile ("" ::: "memory"); \
69 } while (0)
70
71 /* _delay_us can only do a delay of 768/clock_freq */
72 #if F_CPU > 16000000
73 #error F_CPU > 16MHz, delays need adjusting
74 #endif
75
76 #define OWDELAY_A _delay_us(6) /* 6 usec */
77 #define OWDELAY_B do { _delay_us(48); _delay_us(16); } while (0) /* 64 usec */
78 #define OWDELAY_C do { _delay_us(48); _delay_us(12); } while (0) /* 60 usec */
79 #define OWDELAY_D _delay_us(10) /* 10 usec */
80 #define OWDELAY_E _delay_us(9) /* 9 usec */
81 #define OWDELAY_F do { _delay_us(55); } while (0) /* 55 usec */
82 #define OWDELAY_G /* 0 usec */
83 #define OWDELAY_H do { _delay_us(48); _delay_us(48); _delay_us(48); \
84 _delay_us(48); _delay_us(48); _delay_us(48); _delay_us(48); \
85 _delay_us(48);_delay_us(48); _delay_us(48); } while (0) /* 480 usec */
86 #define OWDELAY_I do { _delay_us(48); _delay_us(22); } while (0) /* 70 usec */
87
88 #ifdef OW_DEBUG
89 #define OWPUTS(x) puts_P(x)
90 #define OWPUTSP(x) puts_P(x)
91 #define OWPRINTFP(fmt, ...) printf_P(fmt, ## __VA_ARGS__)
92 #else
93 #define OWPUTS(x)
94 #define OWPUTSP(x)
95 #define OWPRINTFP(fmt, ...)
96 #endif
97