Mercurial > ~darius > hgwebdir.cgi > pyinst
changeset 63:c90db15a497e
Add simple spectrum analyser example
author | Daniel O'Connor <doconnor@gsoft.com.au> |
---|---|
date | Fri, 08 Jan 2021 14:10:20 +1030 |
parents | ffc9292eb00b |
children | 4ca9fdf0795a |
files | example2.py |
diffstat | 1 files changed, 63 insertions(+), 0 deletions(-) [+] |
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--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/example2.py Fri Jan 08 14:10:20 2021 +1030 @@ -0,0 +1,63 @@ +#!/usr/bin/env python + +# Copyright (c) 2009 +# Daniel O'Connor <darius@dons.net.au>. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND +# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +# ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE +# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +# SUCH DAMAGE. +# + +import rsib +import numpy +from matplotlib import pylab + +def test(r): + r.write('*IDN?') + print("ID is " + r.read(5)) + r.write("*RST") + r.write("INIT:CONT OFF") + r.write("SYST:DISP:UPD ON") + r.write("FREQ:STAR 85MHz;STOP 125MHz") + r.write("DISP:WIND:TRAC:T:RLEV -20dBm") + r.write("INIT;*WAI") + r.write("*OPC?") + print("OPC - " + r.read(10)) + r.write("CALC:MARK:PEXC 6DB") + r.write("CALC:MARK:FUNC:TOI ON") + r.write("CALC:MARK:FUNC:TOI:RES?") + print("Result " + r.read(10)) + + r.write("FORM:DATA ASC") + r.write("CALC:LIM5:NAME 'TEST1'") + r.write("CALC:LIM5:COMM 'Upper limit line'") + r.write("CALC1:LIM5:TRAC 2") + r.write("TRAC1? TRACE1") + data = r.read(10) + #print "Data - " + dat + data = list(map(float, data.split(','))) + ary = numpy.array(data) + pylab.plot(ary) + pylab.show() + +if __name__ == '__main__': + r = rsib.RSIBDevice('analyzer') + test(r) +