Mercurial > ~darius > hgwebdir.cgi > pyinst
annotate example2.py @ 85:60ad91b4c67c default tip
Add 'quick' option to use a faster sweep time with no averaging.
Useful for testing the hardware is setup correctly without having to wait 3 minutes.
author | Daniel O'Connor <doconnor@gsoft.com.au> |
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date | Mon, 21 Oct 2024 14:12:50 +1030 |
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1 #!/usr/bin/env python |
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2 |
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3 # Copyright (c) 2009 |
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4 # Daniel O'Connor <darius@dons.net.au>. All rights reserved. |
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5 # |
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6 # Redistribution and use in source and binary forms, with or without |
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7 # modification, are permitted provided that the following conditions |
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8 # are met: |
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9 # 1. Redistributions of source code must retain the above copyright |
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10 # notice, this list of conditions and the following disclaimer. |
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11 # 2. Redistributions in binary form must reproduce the above copyright |
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12 # notice, this list of conditions and the following disclaimer in the |
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13 # documentation and/or other materials provided with the distribution. |
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14 # |
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15 # THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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16 # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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17 # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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18 # ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE |
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19 # FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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20 # DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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21 # OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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22 # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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23 # LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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24 # OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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25 # SUCH DAMAGE. |
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26 # |
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27 |
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28 import rsib |
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29 import numpy |
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30 from matplotlib import pylab |
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31 |
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32 def test(r): |
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33 r.write('*IDN?') |
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34 print("ID is " + r.read(5)) |
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35 r.write("*RST") |
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36 r.write("INIT:CONT OFF") |
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37 r.write("SYST:DISP:UPD ON") |
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38 r.write("FREQ:STAR 85MHz;STOP 125MHz") |
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39 r.write("DISP:WIND:TRAC:T:RLEV -20dBm") |
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40 r.write("INIT;*WAI") |
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41 r.write("*OPC?") |
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42 print("OPC - " + r.read(10)) |
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43 r.write("CALC:MARK:PEXC 6DB") |
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44 r.write("CALC:MARK:FUNC:TOI ON") |
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45 r.write("CALC:MARK:FUNC:TOI:RES?") |
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46 print("Result " + r.read(10)) |
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47 |
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48 r.write("FORM:DATA ASC") |
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49 r.write("CALC:LIM5:NAME 'TEST1'") |
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50 r.write("CALC:LIM5:COMM 'Upper limit line'") |
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51 r.write("CALC1:LIM5:TRAC 2") |
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52 r.write("TRAC1? TRACE1") |
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53 data = r.read(10) |
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54 #print "Data - " + dat |
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55 data = list(map(float, data.split(','))) |
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56 ary = numpy.array(data) |
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57 pylab.plot(ary) |
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58 pylab.show() |
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59 |
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60 if __name__ == '__main__': |
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61 r = rsib.RSIBDevice('analyzer') |
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62 test(r) |
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63 |