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Add 'no driver' version which can simulate in normal mode. Add Python code to optimise design.
author Daniel O'Connor <darius@dons.net.au>
date Fri, 17 Nov 2023 23:47:05 +1030
parents 761dddb53b99
children 3341ef03cb66
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9:66aa1acc90cd 10:2832aefd442c
1 Version 4 1 (binary file application/octet-stream, hash: 0176ef3abedce1760baf96c789f01994244890c7)
2 SHEET 1 2852 784
3 WIRE 224 144 128 144
4 WIRE 384 144 224 144
5 WIRE 576 144 512 144
6 WIRE 816 144 576 144
7 WIRE 1040 144 944 144
8 WIRE 1120 144 1040 144
9 WIRE 1312 144 1200 144
10 WIRE 1424 144 1312 144
11 WIRE 1584 144 1424 144
12 WIRE 1664 144 1648 144
13 WIRE 1824 144 1744 144
14 WIRE 1936 144 1904 144
15 WIRE 2048 144 1936 144
16 WIRE 240 192 224 192
17 WIRE 288 192 240 192
18 WIRE 384 192 288 192
19 WIRE 576 192 512 192
20 WIRE 656 192 576 192
21 WIRE 1312 192 1312 144
22 WIRE 128 240 128 144
23 WIRE 224 240 224 192
24 WIRE 288 240 288 192
25 WIRE 384 240 288 240
26 WIRE 576 240 512 240
27 WIRE 816 240 816 224
28 WIRE 944 240 944 224
29 WIRE 384 272 288 272
30 WIRE 656 272 656 192
31 WIRE 704 272 656 272
32 WIRE 1216 272 784 272
33 WIRE 1584 272 1584 144
34 WIRE 1936 272 1936 144
35 WIRE 2048 272 2048 144
36 WIRE 288 304 288 272
37 WIRE 384 304 288 304
38 WIRE 1424 304 1424 144
39 WIRE 576 384 576 240
40 WIRE 704 384 576 384
41 WIRE 1328 384 784 384
42 WIRE 128 480 128 320
43 WIRE 224 480 224 320
44 WIRE 224 480 128 480
45 WIRE 288 480 288 304
46 WIRE 288 480 224 480
47 WIRE 448 480 448 336
48 WIRE 448 480 288 480
49 WIRE 1312 480 1312 352
50 WIRE 1424 480 1424 464
51 WIRE 1424 480 1312 480
52 WIRE 1584 480 1584 336
53 WIRE 1584 480 1424 480
54 WIRE 1936 480 1936 336
55 WIRE 1936 480 1584 480
56 WIRE 2048 480 2048 352
57 WIRE 2048 480 1936 480
58 WIRE 448 512 448 480
59 WIRE 1424 512 1424 480
60 FLAG 448 512 0
61 FLAG 576 192 D0
62 FLAG 240 192 RFDrive
63 FLAG 576 144 MOD_RAIL
64 FLAG 2048 144 RFOut
65 FLAG 1040 144 HV
66 FLAG 1312 144 SW
67 FLAG 816 240 0
68 FLAG 944 240 0
69 FLAG 1424 512 0
70 FLAG 224 144 VCC
71 SYMBOL Voltage 128 224 R0
72 WINDOW 3 37 53 Left 2
73 SYMATTR Value 5
74 SYMATTR InstName V1
75 SYMBOL Voltage 816 128 R0
76 WINDOW 3 -70 51 Left 2
77 SYMATTR Value 12
78 SYMATTR InstName V2
79 SYMATTR SpiceLine Rser=10m Cpar=1p
80 SYMBOL Voltage 224 224 R0
81 WINDOW 3 -51 126 Left 2
82 SYMATTR Value PULSE(0 5 0 200p 200p {Ton} {Tperiod})
83 SYMATTR InstName V3
84 SYMBOL ISL55110 416 176 R0
85 WINDOW 3 -55 -78 Top 2
86 SYMATTR InstName U1
87 SYMBOL Voltage 944 128 R0
88 WINDOW 0 -8 -4 Left 2
89 SYMATTR InstName V4
90 SYMATTR Value 120
91 SYMATTR SpiceLine Rser=10m Cpar=1p
92 SYMBOL ind 1104 160 R270
93 WINDOW 0 32 56 VTop 2
94 WINDOW 3 5 56 VBottom 2
95 SYMATTR InstName L1
96 SYMATTR Value {L1}
97 SYMATTR SpiceLine Rser=35m
98 SYMBOL ind 1648 160 R270
99 WINDOW 0 32 56 VTop 2
100 WINDOW 3 -8 58 VBottom 2
101 SYMATTR InstName L2
102 SYMATTR Value {L2}
103 SYMATTR SpiceLine Rser=35m
104 SYMBOL cap 1648 128 R90
105 WINDOW 0 0 32 VBottom 2
106 WINDOW 3 40 27 VTop 2
107 SYMATTR InstName C2
108 SYMATTR Value {C2}
109 SYMBOL cap 1600 336 R180
110 WINDOW 0 24 56 Left 2
111 WINDOW 3 30 8 Left 2
112 SYMATTR InstName C1
113 SYMATTR Value {C1}
114 SYMBOL Res 2032 256 R0
115 WINDOW 0 32 43 Left 2
116 SYMATTR InstName R1
117 SYMATTR Value {R1}
118 SYMBOL Res 800 256 R90
119 WINDOW 0 0 56 VBottom 2
120 WINDOW 3 35 59 VTop 2
121 SYMATTR InstName R4
122 SYMATTR Value 0
123 SYMBOL Res 800 368 R90
124 WINDOW 0 0 56 VBottom 2
125 WINDOW 3 36 53 VTop 2
126 SYMATTR InstName R2
127 SYMATTR Value 0
128 SYMBOL GAN190-650FBE 1296 272 R0
129 WINDOW 3 -54 59 Left 1
130 SYMATTR InstName U2
131 SYMBOL GAN190-650FBE 1408 384 R0
132 WINDOW 3 -62 66 Left 1
133 SYMATTR InstName U3
134 SYMBOL ind 1808 160 R270
135 WINDOW 0 32 56 VTop 2
136 WINDOW 3 5 56 VBottom 2
137 SYMATTR InstName L3
138 SYMATTR Value 72n
139 SYMBOL cap 1920 272 R0
140 SYMATTR InstName C3
141 SYMATTR Value 251p
142 TEXT 504 448 Left 2 !.param F0 = 35.24Meg\n.param Tperiod = 1 / {F0}\n.param dutypct = 40\n.param Ton = 1 / {F0} * {dutypct} / 100\n.param C1 = 5p\n.param C2 = 176p\n.param L1 = 3u\n.param L2 = 140n\n.param R1 = 50
143 TEXT 952 608 Left 2 !.meas PIN_HV AVG abs(V(HV)*I(V4))\n.meas PIN_MOD AVG abs(V(MOD_RAIL)*I(V2))\n.meas PIN_LV AVG abs(V(VCC)*I(V1))\n.meas POUT AVG abs(V(RFOut)*I(R1))\n.meas Efficiency Param 100*POUT/(PIN_HV + PIN_LV + PIN_MOD)
144 TEXT 1712 528 Left 2 !*.tran 0 1.8u 1.7u\n.tran 0 5u 1.7u\n*.tran 0 2.5u 1.5u\n*.tran 5u
145 TEXT 1720 624 Left 2 !.fourier {F0} 9 -1 V(rfout)
146 TEXT 496 664 Left 2 !*.step param dutypct 20 60 1\n*.step param C1 5p 80p 5p\n*.step param C2 120p 200p 5p\n*.step param L2 80n 220n 10n