Mercurial > ~darius > hgwebdir.cgi > pa
annotate pa-STP6N60M2.asc @ 22:8d7aa773caeb
Add VHFPA04F using GAN190s
author | Daniel O'Connor <darius@dons.net.au> |
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date | Mon, 27 Nov 2023 13:23:31 +1030 |
parents | f0665f53b854 |
children |
rev | line source |
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15 | 1 Version 4 |
2 SHEET 1 2388 1192 | |
3 WIRE 320 144 128 144 | |
4 WIRE 384 144 320 144 | |
5 WIRE 560 144 512 144 | |
6 WIRE 576 144 560 144 | |
7 WIRE 944 144 576 144 | |
8 WIRE 944 160 944 144 | |
9 WIRE 1136 160 1040 160 | |
10 WIRE 1216 160 1136 160 | |
11 WIRE 1408 160 1296 160 | |
12 WIRE 1536 160 1408 160 | |
13 WIRE 1632 160 1616 160 | |
14 WIRE 1760 160 1696 160 | |
15 WIRE 1824 160 1760 160 | |
16 WIRE 1856 160 1824 160 | |
17 WIRE 240 192 224 192 | |
18 WIRE 272 192 240 192 | |
19 WIRE 384 192 272 192 | |
20 WIRE 576 192 512 192 | |
21 WIRE 736 192 576 192 | |
22 WIRE 128 240 128 144 | |
23 WIRE 224 240 224 192 | |
24 WIRE 272 240 272 192 | |
25 WIRE 384 240 272 240 | |
26 WIRE 688 240 512 240 | |
27 WIRE 992 240 944 240 | |
28 WIRE 1040 240 992 240 | |
29 WIRE 992 256 992 240 | |
30 WIRE 384 272 288 272 | |
31 WIRE 1344 272 1328 272 | |
32 WIRE 1408 272 1408 160 | |
33 WIRE 1408 272 1344 272 | |
34 WIRE 1856 272 1856 160 | |
35 WIRE 736 288 736 192 | |
36 WIRE 1264 288 736 288 | |
37 WIRE 288 304 288 272 | |
38 WIRE 384 304 288 304 | |
39 WIRE 1376 304 1328 304 | |
40 WIRE 128 336 128 320 | |
41 WIRE 176 336 128 336 | |
42 WIRE 224 336 224 320 | |
43 WIRE 224 336 176 336 | |
44 WIRE 288 336 288 304 | |
45 WIRE 288 336 224 336 | |
46 WIRE 1408 336 1408 272 | |
47 WIRE 1408 336 1232 336 | |
48 WIRE 688 352 688 240 | |
49 WIRE 1168 352 688 352 | |
50 WIRE 176 368 176 336 | |
51 WIRE 1248 368 1232 368 | |
52 WIRE 320 400 320 144 | |
53 WIRE 384 400 320 400 | |
54 WIRE 560 400 560 144 | |
55 WIRE 560 400 512 400 | |
56 WIRE 1408 400 1408 336 | |
57 WIRE 1408 400 1328 400 | |
58 WIRE 1760 400 1760 160 | |
59 WIRE 1264 416 960 416 | |
60 WIRE 1376 432 1376 304 | |
61 WIRE 1376 432 1328 432 | |
62 WIRE 272 448 272 240 | |
63 WIRE 384 448 272 448 | |
64 WIRE 960 448 960 416 | |
65 WIRE 960 448 512 448 | |
66 WIRE 272 496 272 448 | |
67 WIRE 384 496 272 496 | |
68 WIRE 960 496 512 496 | |
69 WIRE 1408 512 1408 400 | |
70 WIRE 1408 512 1232 512 | |
71 WIRE 1760 512 1760 464 | |
72 WIRE 1808 512 1760 512 | |
73 WIRE 1856 512 1856 352 | |
74 WIRE 1856 512 1808 512 | |
75 WIRE 384 528 352 528 | |
76 WIRE 960 528 960 496 | |
77 WIRE 1168 528 960 528 | |
78 WIRE 1248 544 1248 368 | |
79 WIRE 1248 544 1232 544 | |
80 WIRE 1808 544 1808 512 | |
81 WIRE 352 560 352 528 | |
82 WIRE 384 560 352 560 | |
83 WIRE 1408 592 1408 512 | |
84 WIRE 1408 592 1328 592 | |
85 WIRE 352 608 352 560 | |
86 WIRE 448 608 448 592 | |
87 WIRE 448 608 352 608 | |
88 WIRE 1264 608 960 608 | |
89 WIRE 1376 624 1376 432 | |
90 WIRE 1376 624 1328 624 | |
91 WIRE 320 640 320 400 | |
92 WIRE 384 640 320 640 | |
93 WIRE 560 640 560 400 | |
94 WIRE 560 640 512 640 | |
95 WIRE 1408 656 1408 592 | |
96 WIRE 1408 656 1232 656 | |
97 WIRE 1168 672 1024 672 | |
98 WIRE 272 688 272 496 | |
99 WIRE 384 688 272 688 | |
100 WIRE 960 688 960 608 | |
101 WIRE 960 688 512 688 | |
102 WIRE 1248 688 1248 544 | |
103 WIRE 1248 688 1232 688 | |
104 WIRE 1408 720 1408 656 | |
105 WIRE 1408 720 1328 720 | |
106 WIRE 272 736 272 688 | |
107 WIRE 384 736 272 736 | |
108 WIRE 1024 736 1024 672 | |
109 WIRE 1024 736 512 736 | |
110 WIRE 1264 736 1088 736 | |
111 WIRE 1376 752 1376 624 | |
112 WIRE 1376 752 1328 752 | |
113 WIRE 384 768 352 768 | |
114 WIRE 1088 784 1088 736 | |
115 WIRE 1088 784 768 784 | |
116 WIRE 352 800 352 768 | |
117 WIRE 384 800 352 800 | |
118 WIRE 1408 832 1408 720 | |
119 WIRE 1408 832 1232 832 | |
120 WIRE 352 848 352 800 | |
121 WIRE 448 848 448 832 | |
122 WIRE 448 848 352 848 | |
123 WIRE 1168 848 832 848 | |
124 WIRE 1248 864 1248 688 | |
125 WIRE 1248 864 1232 864 | |
126 WIRE 1376 864 1376 752 | |
127 WIRE 1376 864 1248 864 | |
128 WIRE 320 880 320 640 | |
129 WIRE 384 880 320 880 | |
130 WIRE 560 880 560 640 | |
131 WIRE 560 880 512 880 | |
132 WIRE 1376 896 1376 864 | |
133 WIRE 272 928 272 736 | |
134 WIRE 384 928 272 928 | |
135 WIRE 768 928 768 784 | |
136 WIRE 768 928 512 928 | |
137 WIRE 272 976 272 928 | |
138 WIRE 384 976 272 976 | |
139 WIRE 832 976 832 848 | |
140 WIRE 832 976 512 976 | |
141 WIRE 384 1008 368 1008 | |
142 WIRE 368 1040 368 1008 | |
143 WIRE 384 1040 368 1040 | |
144 WIRE 368 1088 368 1040 | |
145 WIRE 448 1088 448 1072 | |
146 WIRE 448 1088 368 1088 | |
147 FLAG 576 192 D0 | |
148 FLAG 240 192 RFDrive | |
149 FLAG 576 144 MOD_RAIL | |
150 FLAG 1824 160 RFOut | |
151 FLAG 1136 160 HV | |
152 FLAG 1344 272 SW | |
153 FLAG 1808 544 0 | |
154 FLAG 176 368 0 | |
155 FLAG 352 608 0 | |
156 FLAG 352 848 0 | |
157 FLAG 368 1088 0 | |
158 FLAG 1376 896 0 | |
159 FLAG 992 256 0 | |
160 FLAG 320 144 VCC | |
161 SYMBOL Voltage 128 224 R0 | |
162 WINDOW 3 37 53 Left 2 | |
163 SYMATTR Value 5 | |
164 SYMATTR InstName V1 | |
165 SYMBOL Voltage 944 144 R0 | |
166 WINDOW 3 10 99 Left 2 | |
167 SYMATTR Value 12 | |
168 SYMATTR InstName V2 | |
169 SYMBOL Voltage 224 224 R0 | |
170 WINDOW 3 -179 118 Left 2 | |
171 SYMATTR Value PULSE(0 5 0 200p 200p {Ton} {Tperiod}) | |
172 SYMATTR InstName V3 | |
173 SYMBOL AutoGenerated/ISL55110 416 176 R0 | |
174 WINDOW 3 161 133 Top 2 | |
175 SYMATTR InstName U1 | |
176 SYMBOL Voltage 1040 144 R0 | |
177 SYMATTR InstName V4 | |
178 SYMATTR Value 120 | |
179 SYMBOL ind 1200 176 R270 | |
180 WINDOW 0 32 56 VTop 2 | |
181 WINDOW 3 5 56 VBottom 2 | |
182 SYMATTR InstName L1 | |
183 SYMATTR Value {L1} | |
184 SYMBOL ind 1520 176 R270 | |
185 WINDOW 0 32 56 VTop 2 | |
186 WINDOW 3 5 56 VBottom 2 | |
187 SYMATTR InstName L2 | |
188 SYMATTR Value {L2} | |
189 SYMBOL cap 1696 144 R90 | |
190 WINDOW 0 0 32 VBottom 2 | |
191 WINDOW 3 32 32 VTop 2 | |
192 SYMATTR InstName C2 | |
193 SYMATTR Value {C2} | |
194 SYMBOL cap 1776 464 R180 | |
195 WINDOW 0 24 56 Left 2 | |
196 WINDOW 3 24 8 Left 2 | |
197 SYMATTR InstName C1 | |
198 SYMATTR Value {C1} | |
199 SYMBOL Res 1840 256 R0 | |
200 WINDOW 0 32 43 Left 2 | |
201 SYMATTR InstName R1 | |
202 SYMATTR Value {R1} | |
203 SYMBOL AutoGenerated/STP7N60M2_V2 1296 288 R0 | |
204 SYMATTR InstName U2 | |
205 SYMBOL AutoGenerated/STP7N60M2_V2 1200 352 R0 | |
206 SYMATTR InstName U3 | |
207 SYMBOL AutoGenerated/STP7N60M2_V2 1296 416 R0 | |
208 SYMATTR InstName U4 | |
209 SYMBOL AutoGenerated/STP7N60M2_V2 1200 528 R0 | |
210 SYMATTR InstName U5 | |
211 SYMBOL AutoGenerated/STP7N60M2_V2 1296 608 R0 | |
212 SYMATTR InstName U6 | |
213 SYMBOL AutoGenerated/STP7N60M2_V2 1200 672 R0 | |
214 SYMATTR InstName U7 | |
215 SYMBOL AutoGenerated/STP7N60M2_V2 1296 736 R0 | |
216 SYMATTR InstName U8 | |
217 SYMBOL AutoGenerated/STP7N60M2_V2 1200 848 R0 | |
218 SYMATTR InstName U9 | |
219 SYMBOL AutoGenerated/ISL55110 416 432 R0 | |
220 WINDOW 3 161 133 Top 2 | |
221 SYMATTR InstName U10 | |
222 SYMBOL AutoGenerated/ISL55110 416 672 R0 | |
223 WINDOW 3 161 133 Top 2 | |
224 SYMATTR InstName U11 | |
225 SYMBOL AutoGenerated/ISL55110 416 912 R0 | |
226 WINDOW 3 161 133 Top 2 | |
227 SYMATTR InstName U12 | |
17
f0665f53b854
Show FET power dissipation, don't bother with mod rail
Daniel O'Connor <darius@dons.net.au>
parents:
16
diff
changeset
|
228 TEXT 1440 576 Left 2 !*.tran 0 440n 240n\n*.tran 0 1.8u 1.7u\n.tran 0 5u 1.7u\n*.tran 0 2.5u 1.5u\n*.tran 0 5u |
15 | 229 TEXT 880 968 Left 2 !.meas PIN_HV AVG abs(V(HV)*I(V4))\n.meas PIN_MOD AVG abs(V(MOD_RAIL)*I(V2))\n.meas PIN_LV AVG abs(V(VCC)*I(V1))\n.meas POUT AVG abs(V(RFOut)*I(R1))\n.meas Efficiency Param 100*POUT/(PIN_HV + PIN_LV + PIN_MOD)\n.meas IPEAK_U2 max(abs(Ix(U2:D)))\n.meas V_IPEAK_U2 FIND abs(V(SW)) WHEN Ix(U2:D) = IPEAK_U2 * 0.999 cross=1\n.meas VPEAK_U2 max(abs(V(SW)))\n.meas I_VPEAK_U2 FIND abs(Ix(U2:D)) WHEN V(SW) = VPEAK_U2 * 0.999 cross=1 |
16 | 230 TEXT 1448 696 Left 2 !.param F0 = 35.24Meg\n.param Tperiod = 1 / {F0}\n.param dutypct = 34\n.param Ton = 1 / {F0} * {dutypct} / 100\n.param C1 = 220p\n.param C2 = 230p\n.param L1 = 130n\n.param L2 = 178n\n.param R1 = 50 |
15 | 231 TEXT 1448 904 Left 2 !.fourier {F0} 9 -1 V(rfout) |
17
f0665f53b854
Show FET power dissipation, don't bother with mod rail
Daniel O'Connor <darius@dons.net.au>
parents:
16
diff
changeset
|
232 TEXT 488 1112 Left 2 !*.step param dutypct 20 60 7\n*.step param C1 10p 300p 10p\n*.step param C2 80p 300p 5p\n*.step param L2 80n 300n 15n |