diff dac.pio @ 18:f1e44afb41a3

WIP with control and DAC in sync and not hanging. Control data is wrong but baby steps.
author Daniel O'Connor <darius@dons.net.au>
date Tue, 25 Feb 2025 14:36:10 +1030
parents 98880b18bcc1
children 9ad0dd5c638c
line wrap: on
line diff
--- a/dac.pio	Tue Feb 25 13:40:57 2025 +1030
+++ b/dac.pio	Tue Feb 25 14:36:10 2025 +1030
@@ -11,10 +11,10 @@
     mov pins, null side 0
     nop side 1
 ; Wait for start trigger and clear IRQ
-    wait 1 irq TRIGGER_IRQ side 0
+    wait 1 irq 1 side 0
+    irq clear 1 side 0
 ; Clock DAC and write data from the FIFO
 ; DAC clocks data in on the rising clock edge
-; Autopull is enabled so no need to pull
 .wrap_target
     out pins 8 side 0
     nop side 1